|
@@ -23,12 +23,21 @@ static struct port_params tx_dummy[SWR_MSTR_PORT_LEN] = {
|
|
|
};
|
|
|
|
|
|
/* AMIC 9.6 MHz clock */
|
|
|
+#ifdef CONFIG_SND_SOC_HOLI
|
|
|
+static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = {
|
|
|
+ {3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */
|
|
|
+ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
|
|
|
+ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
|
|
|
+ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
|
|
|
+};
|
|
|
+#else
|
|
|
static struct port_params tx_wcd_9p6MHz[SWR_MSTR_PORT_LEN] = {
|
|
|
{3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX1 */
|
|
|
{7, 5, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
|
|
|
{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
|
|
|
{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
|
|
|
};
|
|
|
+#endif
|
|
|
|
|
|
/* AMIC 4.8 MHz clock */
|
|
|
static struct port_params tx_wcd_4p8MHz[SWR_MSTR_PORT_LEN] = {
|