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asoc: lpass-cdc: Enable compile lpass-cdc

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Update lpass-cdc to compile on 5.10 kernel

Change-Id: I0782c2f80531aa798794a8a4140a0b77bca7c9b1
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2020-12-01 18:20:18 +05:30
committed by Gerrit - the friendly Code Review server
parent e3ab630202
commit 9e61f25f98
7 changed files with 89 additions and 79 deletions
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4
asoc/codecs/lpass-cdc/Kbuild
View File

@@ -30,6 +30,10 @@ ifeq ($(KERNEL_BUILD), 0)
include $(AUDIO_ROOT)/config/konaauto.conf
INCS += -include $(AUDIO_ROOT)/config/konaautoconf.h
endif
ifeq ($(CONFIG_ARCH_WAIPIO), y)
include $(AUDIO_ROOT)/config/waipioauto.conf
INCS += -include $(AUDIO_ROOT)/config/waipioautoconf.h
endif
ifeq ($(CONFIG_ARCH_LITO), y)
include $(AUDIO_ROOT)/config/litoauto.conf
export

6
asoc/codecs/lpass-cdc/Makefile Normal file
View File

@@ -0,0 +1,6 @@
modules:
$(MAKE) -C $(KERNEL_SRC) M=$(M) modules $(KBUILD_OPTIONS) VERBOSE=1
modules_install:
$(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install
clean:
$(MAKE) -C $(KERNEL_SRC) M=$(M) clean

78
asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c
View File

@@ -356,7 +356,7 @@ static int lpass_cdc_rx_macro_hw_params(struct snd_pcm_substream *substream,
static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
unsigned int *tx_num, unsigned int *tx_slot,
unsigned int *rx_num, unsigned int *rx_slot);
static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute);
static int lpass_cdc_rx_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream);
static int lpass_cdc_rx_macro_int_dem_inp_mux_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
static int lpass_cdc_rx_macro_mux_get(struct snd_kcontrol *kcontrol,
@@ -653,7 +653,7 @@ static const struct snd_kcontrol_new rx_mix_tx0_mux =
static struct snd_soc_dai_ops lpass_cdc_rx_macro_dai_ops = {
.hw_params = lpass_cdc_rx_macro_hw_params,
.get_channel_map = lpass_cdc_rx_macro_get_channel_map,
.digital_mute = lpass_cdc_rx_macro_digital_mute,
.mute_stream = lpass_cdc_rx_macro_mute_stream,
};
static struct snd_soc_dai_driver lpass_cdc_rx_macro_dai[] = {
@@ -952,9 +952,9 @@ static int lpass_cdc_rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai
for (j = 0; j < INTERP_MAX; j++) {
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read32(
int_mux_cfg0_val = snd_soc_component_read(
component, int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(
int_mux_cfg1_val = snd_soc_component_read(
component, int_mux_cfg1);
inp0_sel = int_mux_cfg0_val & 0x0F;
inp1_sel = (int_mux_cfg0_val >> 4) & 0x0F;
@@ -1007,7 +1007,7 @@ static int lpass_cdc_rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
int_mux_cfg1 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG1;
for (j = 0; j < INTERP_MAX; j++) {
int_mux_cfg1_val = snd_soc_component_read32(
int_mux_cfg1_val = snd_soc_component_read(
component, int_mux_cfg1) &
0x0F;
if (int_mux_cfg1_val == int_2_inp +
@@ -1175,7 +1175,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
__func__, dai->id, *rx_slot, *rx_num);
break;
case RX_MACRO_AIF_ECHO:
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_RX_INP_MUX_RX_MIX_CFG4);
if (val & LPASS_CDC_RX_MACRO_EC_MIX_TX0_MASK) {
mask |= 0x1;
@@ -1185,7 +1185,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
mask |= 0x2;
cnt++;
}
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_RX_INP_MUX_RX_MIX_CFG5);
if (val & LPASS_CDC_RX_MACRO_EC_MIX_TX2_MASK) {
mask |= 0x4;
@@ -1201,7 +1201,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
return 0;
}
static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
static int lpass_cdc_rx_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
struct snd_soc_component *component = dai->component;
struct device *rx_dev = NULL;
@@ -1232,11 +1232,11 @@ static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
dsm_reg = LPASS_CDC_RX_RX2_RX_PATH_DSM_CTL;
int_mux_cfg0 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read32(component,
int_mux_cfg0_val = snd_soc_component_read(component,
int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(component,
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1);
if (snd_soc_component_read32(component, dsm_reg) & 0x01) {
if (snd_soc_component_read(component, dsm_reg) & 0x01) {
if (int_mux_cfg0_val || (int_mux_cfg1_val & 0xF0))
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
@@ -1414,7 +1414,7 @@ static int lpass_cdc_rx_macro_event_handler(struct snd_soc_component *component,
reg = LPASS_CDC_RX_COMPANDER0_CTL0 +
(rx_idx * LPASS_CDC_RX_MACRO_COMP_OFFSET);
snd_soc_component_write(component, reg,
snd_soc_component_read32(component, reg));
snd_soc_component_read(component, reg));
break;
case LPASS_CDC_MACRO_EVT_IMPED_TRUE:
lpass_cdc_rx_macro_wcd_clsh_imped_config(component, data, true);
@@ -1469,9 +1469,9 @@ static int lpass_cdc_rx_macro_event_handler(struct snd_soc_component *component,
lpass_cdc_rsc_clk_reset(rx_dev, RX_CORE_CLK);
break;
case LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE:
rx_priv->rx0_gain_val = snd_soc_component_read32(component,
rx_priv->rx0_gain_val = snd_soc_component_read(component,
LPASS_CDC_RX_RX0_RX_VOL_CTL);
rx_priv->rx1_gain_val = snd_soc_component_read32(component,
rx_priv->rx1_gain_val = snd_soc_component_read(component,
LPASS_CDC_RX_RX1_RX_VOL_CTL);
if (data) {
/* Reduce gain by half only if its greater than -6DB */
@@ -1564,7 +1564,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
if (path_type == INTERP_MIX_PATH) {
mux_reg = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG1 +
2 * interp;
mux_reg_val = snd_soc_component_read32(component, mux_reg) &
mux_reg_val = snd_soc_component_read(component, mux_reg) &
0x0f;
if ((mux_reg_val >= INTn_2_INP_SEL_RX0) &&
@@ -1577,7 +1577,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
if (path_type == INTERP_MAIN_PATH) {
mux_reg = LPASS_CDC_RX_INP_MUX_RX_INT1_CFG0 +
2 * (interp - 1);
mux_reg_val = snd_soc_component_read32(component, mux_reg) &
mux_reg_val = snd_soc_component_read(component, mux_reg) &
0x0f;
i = LPASS_CDC_RX_MACRO_INTERP_MUX_NUM_INPUTS;
@@ -1589,7 +1589,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
num_ports++;
}
mux_reg_val =
(snd_soc_component_read32(component, mux_reg) &
(snd_soc_component_read(component, mux_reg) &
0xf0) >> 4;
mux_reg += 1;
i--;
@@ -1675,7 +1675,7 @@ static int lpass_cdc_rx_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
break;
case SND_SOC_DAPM_POST_PMU:
snd_soc_component_write(component, gain_reg,
snd_soc_component_read32(component, gain_reg));
snd_soc_component_read(component, gain_reg));
break;
case SND_SOC_DAPM_POST_PMD:
/* Clk Disable */
@@ -1699,8 +1699,8 @@ static bool lpass_cdc_rx_macro_adie_lb(struct snd_soc_component *component,
int_mux_cfg0 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG0 + interp_idx * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read32(component, int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(component, int_mux_cfg1);
int_mux_cfg0_val = snd_soc_component_read(component, int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read(component, int_mux_cfg1);
int_n_inp0 = int_mux_cfg0_val & 0x0F;
if (int_n_inp0 == INTn_1_INP_SEL_DEC0 ||
@@ -1764,7 +1764,7 @@ static int lpass_cdc_rx_macro_enable_main_path(struct snd_soc_dapm_widget *w,
break;
case SND_SOC_DAPM_POST_PMU:
snd_soc_component_write(component, gain_reg,
snd_soc_component_read32(component, gain_reg));
snd_soc_component_read(component, gain_reg));
break;
case SND_SOC_DAPM_POST_PMD:
lpass_cdc_rx_macro_enable_interp_clk(component, event, w->shift);
@@ -1795,7 +1795,7 @@ static int lpass_cdc_rx_macro_config_compander(struct snd_soc_component *compone
(comp * LPASS_CDC_RX_MACRO_RX_PATH_OFFSET);
rx0_path_ctl_reg = LPASS_CDC_RX_RX0_RX_PATH_CTL +
(comp * LPASS_CDC_RX_MACRO_RX_PATH_OFFSET);
pcm_rate = (snd_soc_component_read32(component, rx0_path_ctl_reg)
pcm_rate = (snd_soc_component_read(component, rx0_path_ctl_reg)
& 0x0F);
if (pcm_rate < 0x06)
val = 0x03;
@@ -2325,7 +2325,7 @@ static int lpass_cdc_rx_macro_vbat_bcl_gsm_mode_func_get(struct snd_kcontrol *kc
snd_soc_kcontrol_component(kcontrol);
ucontrol->value.integer.value[0] =
((snd_soc_component_read32(
((snd_soc_component_read(
component, LPASS_CDC_RX_BCL_VBAT_CFG) & 0x04) ?
1 : 0);
@@ -2818,7 +2818,7 @@ static int lpass_cdc_rx_macro_iir_enable_audio_mixer_get(struct snd_kcontrol *kc
u16 iir_reg = LPASS_CDC_RX_SIDETONE_IIR0_IIR_CTL + 0x80 * iir_idx;
ucontrol->value.integer.value[0] = (
snd_soc_component_read32(component, iir_reg) &
snd_soc_component_read(component, iir_reg) &
(1 << band_idx)) != 0;
dev_dbg(component->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
@@ -2851,7 +2851,7 @@ static int lpass_cdc_rx_macro_iir_enable_audio_mixer_put(struct snd_kcontrol *kc
snd_soc_component_update_bits(component, iir_reg, (1 << band_idx),
(value << band_idx));
iir_band_en_status = ((snd_soc_component_read32(component, iir_reg) &
iir_band_en_status = ((snd_soc_component_read(component, iir_reg) &
(1 << band_idx)) != 0);
dev_dbg(component->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
iir_idx, band_idx, iir_band_en_status);
@@ -2870,7 +2870,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t)) & 0x7F);
value |= snd_soc_component_read32(component,
value |= snd_soc_component_read(component,
(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL + 0x80 * iir_idx));
snd_soc_component_write(component,
@@ -2878,7 +2878,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t) + 1) & 0x7F);
value |= (snd_soc_component_read32(component,
value |= (snd_soc_component_read(component,
(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
0x80 * iir_idx)) << 8);
@@ -2887,7 +2887,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t) + 2) & 0x7F);
value |= (snd_soc_component_read32(component,
value |= (snd_soc_component_read(component,
(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
0x80 * iir_idx)) << 16);
@@ -2897,7 +2897,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
* sizeof(uint32_t) + 3) & 0x7F);
/* Mask bits top 2 bits since they are reserved */
value |= ((snd_soc_component_read32(component,
value |= ((snd_soc_component_read(component,
(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
16 * iir_idx)) & 0x3F) << 24);
@@ -3039,36 +3039,36 @@ static int lpass_cdc_rx_macro_set_iir_gain(struct snd_soc_dapm_widget *w,
if (strnstr(w->name, "IIR0", sizeof("IIR0"))) {
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL));
} else {
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL));
snd_soc_component_write(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL,
snd_soc_component_read32(component,
snd_soc_component_read(component,
LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL));
}
break;
@@ -3227,14 +3227,14 @@ static int lpass_cdc_rx_macro_enable_echo(struct snd_soc_dapm_widget *w,
dev_dbg(rx_dev, "%s %d %s\n", __func__, event, w->name);
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_RX_INP_MUX_RX_MIX_CFG4);
if (!(strcmp(w->name, "RX MIX TX0 MUX")))
ec_tx = ((val & 0xf0) >> 0x4) - 1;
else if (!(strcmp(w->name, "RX MIX TX1 MUX")))
ec_tx = (val & 0x0f) - 1;
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_RX_INP_MUX_RX_MIX_CFG5);
if (!(strcmp(w->name, "RX MIX TX2 MUX")))
ec_tx = (val & 0x0f) - 1;

20
asoc/codecs/lpass-cdc/lpass-cdc-tx-macro.c
View File

@@ -493,12 +493,12 @@ static bool is_amic_enabled(struct snd_soc_component *component, int decimator)
adc_mux_reg = LPASS_CDC_TX_INP_MUX_ADC_MUX0_CFG1 +
LPASS_CDC_TX_MACRO_ADC_MUX_CFG_OFFSET * decimator;
if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) {
if (snd_soc_component_read(component, adc_mux_reg) & SWR_MIC) {
if (tx_priv->version == LPASS_CDC_VERSION_2_1)
return true;
adc_reg = LPASS_CDC_TX_INP_MUX_ADC_MUX0_CFG0 +
LPASS_CDC_TX_MACRO_ADC_MUX_CFG_OFFSET * decimator;
adc_n = snd_soc_component_read32(component, adc_reg) &
adc_n = snd_soc_component_read(component, adc_reg) &
LPASS_CDC_TX_MACRO_SWR_MIC_MUX_SEL_MASK;
if (adc_n < LPASS_CDC_ADC_MAX)
return true;
@@ -534,7 +534,7 @@ static void lpass_cdc_tx_macro_tx_hpf_corner_freq_callback(struct work_struct *w
if (is_amic_enabled(component, hpf_work->decimator)) {
adc_reg = LPASS_CDC_TX_INP_MUX_ADC_MUX0_CFG0 +
LPASS_CDC_TX_MACRO_ADC_MUX_CFG_OFFSET * hpf_work->decimator;
adc_n = snd_soc_component_read32(component, adc_reg) &
adc_n = snd_soc_component_read(component, adc_reg) &
LPASS_CDC_TX_MACRO_SWR_MIC_MUX_SEL_MASK;
/* analog mic clear TX hold */
lpass_cdc_clear_amic_tx_hold(component->dev, adc_n);
@@ -949,10 +949,10 @@ static int lpass_cdc_tx_macro_get_bcs_ch_sel(struct snd_kcontrol *kcontrol,
return -EINVAL;
if (tx_priv->version == LPASS_CDC_VERSION_2_1)
value = (snd_soc_component_read32(component,
value = (snd_soc_component_read(component,
LPASS_CDC_VA_TOP_CSR_SWR_CTRL)) & 0x0F;
else if (tx_priv->version == LPASS_CDC_VERSION_2_0)
value = (snd_soc_component_read32(component,
value = (snd_soc_component_read(component,
LPASS_CDC_TX_TOP_CSR_SWR_CTRL)) & 0x0F;
ucontrol->value.integer.value[0] = value;
@@ -1062,7 +1062,7 @@ static int lpass_cdc_tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
tx_fs_reg = LPASS_CDC_TX0_TX_PATH_CTL +
LPASS_CDC_TX_MACRO_TX_PATH_OFFSET * decimator;
tx_priv->amic_sample_rate = (snd_soc_component_read32(component,
tx_priv->amic_sample_rate = (snd_soc_component_read(component,
tx_fs_reg) & 0x0F);
switch (event) {
@@ -1086,7 +1086,7 @@ static int lpass_cdc_tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
usleep_range(1000, 1010);
}
hpf_cut_off_freq = (
snd_soc_component_read32(component, dec_cfg_reg) &
snd_soc_component_read(component, dec_cfg_reg) &
TX_HPF_CUT_OFF_FREQ_MASK) >> 5;
tx_priv->tx_hpf_work[decimator].hpf_cut_off_freq =
@@ -1126,7 +1126,7 @@ static int lpass_cdc_tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
}
/* apply gain after decimator is enabled */
snd_soc_component_write(component, tx_gain_ctl_reg,
snd_soc_component_read32(component,
snd_soc_component_read(component,
tx_gain_ctl_reg));
if (tx_priv->bcs_enable) {
if (tx_priv->version == LPASS_CDC_VERSION_2_1)
@@ -1147,7 +1147,7 @@ static int lpass_cdc_tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
0x40);
}
if (tx_priv->version == LPASS_CDC_VERSION_2_0) {
if (snd_soc_component_read32(component, adc_mux_reg)
if (snd_soc_component_read(component, adc_mux_reg)
& SWR_MIC) {
snd_soc_component_update_bits(component,
LPASS_CDC_TX_TOP_CSR_SWR_CTRL,
@@ -1208,7 +1208,7 @@ static int lpass_cdc_tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
&tx_priv->tx_mute_dwork[decimator].dwork);
if (tx_priv->version == LPASS_CDC_VERSION_2_0) {
if (snd_soc_component_read32(component, adc_mux_reg)
if (snd_soc_component_read(component, adc_mux_reg)
& SWR_MIC)
snd_soc_component_update_bits(component,
LPASS_CDC_TX_TOP_CSR_SWR_CTRL,

14
asoc/codecs/lpass-cdc/lpass-cdc-va-macro.c
View File

@@ -781,12 +781,12 @@ static bool is_amic_enabled(struct snd_soc_component *component, int decimator)
adc_mux_reg = LPASS_CDC_VA_INP_MUX_ADC_MUX0_CFG1 +
LPASS_CDC_VA_MACRO_ADC_MUX_CFG_OFFSET * decimator;
if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) {
if (snd_soc_component_read(component, adc_mux_reg) & SWR_MIC) {
if (va_priv->version == LPASS_CDC_VERSION_2_1)
return true;
adc_reg = LPASS_CDC_VA_INP_MUX_ADC_MUX0_CFG0 +
LPASS_CDC_VA_MACRO_ADC_MUX_CFG_OFFSET * decimator;
adc_n = snd_soc_component_read32(component, adc_reg) &
adc_n = snd_soc_component_read(component, adc_reg) &
LPASS_CDC_VA_MACRO_SWR_MIC_MUX_SEL_MASK;
if (adc_n < LPASS_CDC_ADC_MAX)
return true;
@@ -824,7 +824,7 @@ static void lpass_cdc_va_macro_tx_hpf_corner_freq_callback(
adc_reg = LPASS_CDC_VA_INP_MUX_ADC_MUX0_CFG0 +
LPASS_CDC_VA_MACRO_ADC_MUX_CFG_OFFSET *
hpf_work->decimator;
adc_n = snd_soc_component_read32(component, adc_reg) &
adc_n = snd_soc_component_read(component, adc_reg) &
LPASS_CDC_VA_MACRO_SWR_MIC_MUX_SEL_MASK;
/* analog mic clear TX hold */
lpass_cdc_clear_amic_tx_hold(component->dev, adc_n);
@@ -1142,7 +1142,7 @@ static int lpass_cdc_va_macro_enable_dec(struct snd_soc_dapm_widget *w,
*/
usleep_range(1000, 1010);
}
hpf_cut_off_freq = (snd_soc_component_read32(
hpf_cut_off_freq = (snd_soc_component_read(
component, dec_cfg_reg) &
TX_HPF_CUT_OFF_FREQ_MASK) >> 5;
va_priv->va_hpf_work[decimator].hpf_cut_off_freq =
@@ -1185,9 +1185,9 @@ static int lpass_cdc_va_macro_enable_dec(struct snd_soc_dapm_widget *w,
msecs_to_jiffies(hpf_delay));
/* apply gain after decimator is enabled */
snd_soc_component_write(component, tx_gain_ctl_reg,
snd_soc_component_read32(component, tx_gain_ctl_reg));
snd_soc_component_read(component, tx_gain_ctl_reg));
if (va_priv->version == LPASS_CDC_VERSION_2_0) {
if (snd_soc_component_read32(component, adc_mux_reg)
if (snd_soc_component_read(component, adc_mux_reg)
& SWR_MIC) {
snd_soc_component_update_bits(component,
LPASS_CDC_TX_TOP_CSR_SWR_CTRL,
@@ -1246,7 +1246,7 @@ static int lpass_cdc_va_macro_enable_dec(struct snd_soc_dapm_widget *w,
cancel_delayed_work_sync(
&va_priv->va_mute_dwork[decimator].dwork);
if (va_priv->version == LPASS_CDC_VERSION_2_0) {
if (snd_soc_component_read32(component, adc_mux_reg)
if (snd_soc_component_read(component, adc_mux_reg)
& SWR_MIC)
snd_soc_component_update_bits(component,
LPASS_CDC_TX_TOP_CSR_SWR_CTRL,

42
asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c
View File

@@ -148,7 +148,7 @@ static int lpass_cdc_wsa_macro_hw_params(struct snd_pcm_substream *substream,
static int lpass_cdc_wsa_macro_get_channel_map(struct snd_soc_dai *dai,
unsigned int *tx_num, unsigned int *tx_slot,
unsigned int *rx_num, unsigned int *rx_slot);
static int lpass_cdc_wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute);
static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream);
/* Hold instance to soundwire platform device */
struct lpass_cdc_wsa_macro_swr_ctrl_data {
struct platform_device *wsa_swr_pdev;
@@ -380,7 +380,7 @@ static const struct snd_kcontrol_new rx_mix_ec1_mux =
static struct snd_soc_dai_ops lpass_cdc_wsa_macro_dai_ops = {
.hw_params = lpass_cdc_wsa_macro_hw_params,
.get_channel_map = lpass_cdc_wsa_macro_get_channel_map,
.digital_mute = lpass_cdc_wsa_macro_digital_mute,
.mute_stream = lpass_cdc_wsa_macro_mute_stream,
};
static struct snd_soc_dai_driver lpass_cdc_wsa_macro_dai[] = {
@@ -617,9 +617,9 @@ static int lpass_cdc_wsa_macro_set_prim_interpolator_rate(struct snd_soc_dai *da
for (j = 0; j < NUM_INTERPOLATORS; j++) {
int_mux_cfg1 = int_mux_cfg0 + LPASS_CDC_WSA_MACRO_MUX_CFG1_OFFSET;
int_mux_cfg0_val = snd_soc_component_read32(component,
int_mux_cfg0_val = snd_soc_component_read(component,
int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(component,
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1);
inp0_sel = int_mux_cfg0_val & LPASS_CDC_WSA_MACRO_MUX_INP_MASK1;
inp1_sel = (int_mux_cfg0_val >>
@@ -681,7 +681,7 @@ static int lpass_cdc_wsa_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai
int_mux_cfg1 = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1;
for (j = 0; j < NUM_INTERPOLATORS; j++) {
int_mux_cfg1_val = snd_soc_component_read32(component,
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1) &
LPASS_CDC_WSA_MACRO_MUX_INP_MASK1;
if (int_mux_cfg1_val == int_2_inp +
@@ -820,7 +820,7 @@ static int lpass_cdc_wsa_macro_get_channel_map(struct snd_soc_dai *dai,
*rx_num = cnt;
break;
case LPASS_CDC_WSA_MACRO_AIF_ECHO:
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_WSA_RX_INP_MUX_RX_MIX_CFG0);
if (val & LPASS_CDC_WSA_MACRO_EC_MIX_TX1_MASK) {
mask |= 0x2;
@@ -840,7 +840,7 @@ static int lpass_cdc_wsa_macro_get_channel_map(struct snd_soc_dai *dai,
return 0;
}
static int lpass_cdc_wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute)
static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
struct snd_soc_component *component = dai->component;
struct device *wsa_dev = NULL;
@@ -869,11 +869,11 @@ static int lpass_cdc_wsa_macro_digital_mute(struct snd_soc_dai *dai, int mute)
LPASS_CDC_WSA_MACRO_RX_PATH_DSMDEM_OFFSET;
int_mux_cfg0 = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read32(component,
int_mux_cfg0_val = snd_soc_component_read(component,
int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(component,
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1);
if (snd_soc_component_read32(component, dsm_reg) & 0x01) {
if (snd_soc_component_read(component, dsm_reg) & 0x01) {
if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
snd_soc_component_update_bits(component, reg,
0x20, 0x20);
@@ -1295,7 +1295,7 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
lpass_cdc_wsa_macro_enable_swr(w, kcontrol, event);
val = snd_soc_component_read32(component, gain_reg);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
snd_soc_component_write(component, gain_reg, val);
break;
@@ -1447,8 +1447,8 @@ static bool lpass_cdc_wsa_macro_adie_lb(struct snd_soc_component *component,
int_mux_cfg0 = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + interp_idx * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read32(component, int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read32(component, int_mux_cfg1);
int_mux_cfg0_val = snd_soc_component_read(component, int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read(component, int_mux_cfg1);
int_n_inp0 = int_mux_cfg0_val & 0x0F;
if (int_n_inp0 == INTn_1_INP_SEL_DEC0 ||
@@ -1549,7 +1549,7 @@ static int lpass_cdc_wsa_macro_enable_prim_interpolator(
0x1, 0x1);
}
if ((reg != prim_int_reg) &&
((snd_soc_component_read32(
((snd_soc_component_read(
component, prim_int_reg)) & 0x10))
snd_soc_component_update_bits(component, reg,
0x10, 0x10);
@@ -1635,7 +1635,7 @@ static int lpass_cdc_wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w
0x01, 0x01);
offset_val = -2;
}
val = snd_soc_component_read32(component, gain_reg);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
snd_soc_component_write(component, gain_reg, val);
lpass_cdc_wsa_macro_config_ear_spkr_gain(component, wsa_priv,
@@ -1664,7 +1664,7 @@ static int lpass_cdc_wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w
LPASS_CDC_WSA_RX1_RX_PATH_MIX_SEC0,
0x01, 0x00);
offset_val = 2;
val = snd_soc_component_read32(component, gain_reg);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
snd_soc_component_write(component, gain_reg, val);
}
@@ -1759,7 +1759,7 @@ static int lpass_cdc_wsa_macro_spk_boost_event(struct snd_soc_dapm_widget *w,
0x01, 0x01);
snd_soc_component_update_bits(component, boost_path_ctl,
0x10, 0x10);
if ((snd_soc_component_read32(component, reg_mix)) & 0x10)
if ((snd_soc_component_read(component, reg_mix)) & 0x10)
snd_soc_component_update_bits(component, reg_mix,
0x10, 0x00);
break;
@@ -1919,7 +1919,7 @@ static int lpass_cdc_wsa_macro_enable_echo(struct snd_soc_dapm_widget *w,
dev_dbg(wsa_dev, "%s %d %s\n", __func__, event, w->name);
val = snd_soc_component_read32(component,
val = snd_soc_component_read(component,
LPASS_CDC_WSA_RX_INP_MUX_RX_MIX_CFG0);
if (!(strcmp(w->name, "WSA RX_MIX EC0_MUX")))
ec_tx = (val & 0x07) - 1;
@@ -2141,7 +2141,7 @@ static int lpass_cdc_wsa_macro_spkr_left_boost_stage_get(struct snd_kcontrol *kc
struct snd_soc_component *component =
snd_soc_kcontrol_component(kcontrol);
bst_state_max = snd_soc_component_read32(component,
bst_state_max = snd_soc_component_read(component,
LPASS_CDC_WSA_BOOST0_BOOST_CTL);
bst_state_max = (bst_state_max & 0x0c) >> 2;
ucontrol->value.integer.value[0] = bst_state_max;
@@ -2173,7 +2173,7 @@ static int lpass_cdc_wsa_macro_spkr_right_boost_stage_get(struct snd_kcontrol *k
struct snd_soc_component *component =
snd_soc_kcontrol_component(kcontrol);
bst_state_max = snd_soc_component_read32(component,
bst_state_max = snd_soc_component_read(component,
LPASS_CDC_WSA_BOOST1_BOOST_CTL);
bst_state_max = (bst_state_max & 0x0c) >> 2;
ucontrol->value.integer.value[0] = bst_state_max;
@@ -2286,7 +2286,7 @@ static int lpass_cdc_wsa_macro_vbat_bcl_gsm_mode_func_get(struct snd_kcontrol *k
snd_soc_kcontrol_component(kcontrol);
ucontrol->value.integer.value[0] =
((snd_soc_component_read32(
((snd_soc_component_read(
component, LPASS_CDC_WSA_VBAT_BCL_VBAT_CFG) & 0x04) ?
1 : 0);

4
asoc/codecs/lpass-cdc/lpass-cdc.c
View File

@@ -1155,9 +1155,9 @@ static int lpass_cdc_soc_codec_probe(struct snd_soc_component *component)
}
/* Assign lpass_cdc version */
core_id_0 = snd_soc_component_read32(component,
core_id_0 = snd_soc_component_read(component,
LPASS_CDC_VA_TOP_CSR_CORE_ID_0);
core_id_1 = snd_soc_component_read32(component,
core_id_1 = snd_soc_component_read(component,
LPASS_CDC_VA_TOP_CSR_CORE_ID_1);
if ((core_id_0 == 0x01) && (core_id_1 == 0x0F))
priv->version = LPASS_CDC_VERSION_2_0;