asoc: lpass-cdc: Enable compile lpass-cdc
Update lpass-cdc to compile on 5.10 kernel Change-Id: I0782c2f80531aa798794a8a4140a0b77bca7c9b1 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:

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Gerrit - the friendly Code Review server

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e3ab630202
commit
9e61f25f98
@@ -356,7 +356,7 @@ static int lpass_cdc_rx_macro_hw_params(struct snd_pcm_substream *substream,
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static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
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unsigned int *tx_num, unsigned int *tx_slot,
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unsigned int *rx_num, unsigned int *rx_slot);
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static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute);
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static int lpass_cdc_rx_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream);
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static int lpass_cdc_rx_macro_int_dem_inp_mux_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol);
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static int lpass_cdc_rx_macro_mux_get(struct snd_kcontrol *kcontrol,
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@@ -653,7 +653,7 @@ static const struct snd_kcontrol_new rx_mix_tx0_mux =
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static struct snd_soc_dai_ops lpass_cdc_rx_macro_dai_ops = {
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.hw_params = lpass_cdc_rx_macro_hw_params,
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.get_channel_map = lpass_cdc_rx_macro_get_channel_map,
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.digital_mute = lpass_cdc_rx_macro_digital_mute,
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.mute_stream = lpass_cdc_rx_macro_mute_stream,
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};
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static struct snd_soc_dai_driver lpass_cdc_rx_macro_dai[] = {
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@@ -952,9 +952,9 @@ static int lpass_cdc_rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai
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for (j = 0; j < INTERP_MAX; j++) {
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int_mux_cfg1 = int_mux_cfg0 + 4;
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int_mux_cfg0_val = snd_soc_component_read32(
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int_mux_cfg0_val = snd_soc_component_read(
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component, int_mux_cfg0);
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int_mux_cfg1_val = snd_soc_component_read32(
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int_mux_cfg1_val = snd_soc_component_read(
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component, int_mux_cfg1);
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inp0_sel = int_mux_cfg0_val & 0x0F;
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inp1_sel = (int_mux_cfg0_val >> 4) & 0x0F;
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@@ -1007,7 +1007,7 @@ static int lpass_cdc_rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
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int_mux_cfg1 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG1;
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for (j = 0; j < INTERP_MAX; j++) {
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int_mux_cfg1_val = snd_soc_component_read32(
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int_mux_cfg1_val = snd_soc_component_read(
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component, int_mux_cfg1) &
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0x0F;
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if (int_mux_cfg1_val == int_2_inp +
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@@ -1175,7 +1175,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
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__func__, dai->id, *rx_slot, *rx_num);
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break;
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case RX_MACRO_AIF_ECHO:
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val = snd_soc_component_read32(component,
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val = snd_soc_component_read(component,
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LPASS_CDC_RX_INP_MUX_RX_MIX_CFG4);
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if (val & LPASS_CDC_RX_MACRO_EC_MIX_TX0_MASK) {
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mask |= 0x1;
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@@ -1185,7 +1185,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
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mask |= 0x2;
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cnt++;
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}
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val = snd_soc_component_read32(component,
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val = snd_soc_component_read(component,
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LPASS_CDC_RX_INP_MUX_RX_MIX_CFG5);
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if (val & LPASS_CDC_RX_MACRO_EC_MIX_TX2_MASK) {
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mask |= 0x4;
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@@ -1201,7 +1201,7 @@ static int lpass_cdc_rx_macro_get_channel_map(struct snd_soc_dai *dai,
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return 0;
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}
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static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
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static int lpass_cdc_rx_macro_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
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{
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struct snd_soc_component *component = dai->component;
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struct device *rx_dev = NULL;
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@@ -1232,11 +1232,11 @@ static int lpass_cdc_rx_macro_digital_mute(struct snd_soc_dai *dai, int mute)
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dsm_reg = LPASS_CDC_RX_RX2_RX_PATH_DSM_CTL;
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int_mux_cfg0 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
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int_mux_cfg1 = int_mux_cfg0 + 4;
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int_mux_cfg0_val = snd_soc_component_read32(component,
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int_mux_cfg0_val = snd_soc_component_read(component,
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int_mux_cfg0);
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int_mux_cfg1_val = snd_soc_component_read32(component,
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int_mux_cfg1_val = snd_soc_component_read(component,
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int_mux_cfg1);
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if (snd_soc_component_read32(component, dsm_reg) & 0x01) {
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if (snd_soc_component_read(component, dsm_reg) & 0x01) {
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if (int_mux_cfg0_val || (int_mux_cfg1_val & 0xF0))
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snd_soc_component_update_bits(component,
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reg, 0x20, 0x20);
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@@ -1414,7 +1414,7 @@ static int lpass_cdc_rx_macro_event_handler(struct snd_soc_component *component,
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reg = LPASS_CDC_RX_COMPANDER0_CTL0 +
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(rx_idx * LPASS_CDC_RX_MACRO_COMP_OFFSET);
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snd_soc_component_write(component, reg,
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snd_soc_component_read32(component, reg));
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snd_soc_component_read(component, reg));
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break;
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case LPASS_CDC_MACRO_EVT_IMPED_TRUE:
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lpass_cdc_rx_macro_wcd_clsh_imped_config(component, data, true);
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@@ -1469,9 +1469,9 @@ static int lpass_cdc_rx_macro_event_handler(struct snd_soc_component *component,
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lpass_cdc_rsc_clk_reset(rx_dev, RX_CORE_CLK);
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break;
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case LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE:
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rx_priv->rx0_gain_val = snd_soc_component_read32(component,
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rx_priv->rx0_gain_val = snd_soc_component_read(component,
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LPASS_CDC_RX_RX0_RX_VOL_CTL);
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rx_priv->rx1_gain_val = snd_soc_component_read32(component,
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rx_priv->rx1_gain_val = snd_soc_component_read(component,
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LPASS_CDC_RX_RX1_RX_VOL_CTL);
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if (data) {
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/* Reduce gain by half only if its greater than -6DB */
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@@ -1564,7 +1564,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
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if (path_type == INTERP_MIX_PATH) {
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mux_reg = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG1 +
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2 * interp;
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mux_reg_val = snd_soc_component_read32(component, mux_reg) &
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mux_reg_val = snd_soc_component_read(component, mux_reg) &
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0x0f;
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if ((mux_reg_val >= INTn_2_INP_SEL_RX0) &&
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@@ -1577,7 +1577,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
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if (path_type == INTERP_MAIN_PATH) {
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mux_reg = LPASS_CDC_RX_INP_MUX_RX_INT1_CFG0 +
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2 * (interp - 1);
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mux_reg_val = snd_soc_component_read32(component, mux_reg) &
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mux_reg_val = snd_soc_component_read(component, mux_reg) &
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0x0f;
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i = LPASS_CDC_RX_MACRO_INTERP_MUX_NUM_INPUTS;
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@@ -1589,7 +1589,7 @@ static int lpass_cdc_rx_macro_set_idle_detect_thr(struct snd_soc_component *comp
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num_ports++;
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}
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mux_reg_val =
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(snd_soc_component_read32(component, mux_reg) &
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(snd_soc_component_read(component, mux_reg) &
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0xf0) >> 4;
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mux_reg += 1;
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i--;
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@@ -1675,7 +1675,7 @@ static int lpass_cdc_rx_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
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break;
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_component_write(component, gain_reg,
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snd_soc_component_read32(component, gain_reg));
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snd_soc_component_read(component, gain_reg));
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break;
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case SND_SOC_DAPM_POST_PMD:
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/* Clk Disable */
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@@ -1699,8 +1699,8 @@ static bool lpass_cdc_rx_macro_adie_lb(struct snd_soc_component *component,
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int_mux_cfg0 = LPASS_CDC_RX_INP_MUX_RX_INT0_CFG0 + interp_idx * 8;
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int_mux_cfg1 = int_mux_cfg0 + 4;
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int_mux_cfg0_val = snd_soc_component_read32(component, int_mux_cfg0);
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int_mux_cfg1_val = snd_soc_component_read32(component, int_mux_cfg1);
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int_mux_cfg0_val = snd_soc_component_read(component, int_mux_cfg0);
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int_mux_cfg1_val = snd_soc_component_read(component, int_mux_cfg1);
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int_n_inp0 = int_mux_cfg0_val & 0x0F;
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if (int_n_inp0 == INTn_1_INP_SEL_DEC0 ||
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@@ -1764,7 +1764,7 @@ static int lpass_cdc_rx_macro_enable_main_path(struct snd_soc_dapm_widget *w,
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break;
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_component_write(component, gain_reg,
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snd_soc_component_read32(component, gain_reg));
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snd_soc_component_read(component, gain_reg));
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break;
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case SND_SOC_DAPM_POST_PMD:
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lpass_cdc_rx_macro_enable_interp_clk(component, event, w->shift);
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@@ -1795,7 +1795,7 @@ static int lpass_cdc_rx_macro_config_compander(struct snd_soc_component *compone
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(comp * LPASS_CDC_RX_MACRO_RX_PATH_OFFSET);
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rx0_path_ctl_reg = LPASS_CDC_RX_RX0_RX_PATH_CTL +
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(comp * LPASS_CDC_RX_MACRO_RX_PATH_OFFSET);
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pcm_rate = (snd_soc_component_read32(component, rx0_path_ctl_reg)
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pcm_rate = (snd_soc_component_read(component, rx0_path_ctl_reg)
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& 0x0F);
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if (pcm_rate < 0x06)
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val = 0x03;
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@@ -2325,7 +2325,7 @@ static int lpass_cdc_rx_macro_vbat_bcl_gsm_mode_func_get(struct snd_kcontrol *kc
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snd_soc_kcontrol_component(kcontrol);
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ucontrol->value.integer.value[0] =
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((snd_soc_component_read32(
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((snd_soc_component_read(
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component, LPASS_CDC_RX_BCL_VBAT_CFG) & 0x04) ?
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1 : 0);
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@@ -2818,7 +2818,7 @@ static int lpass_cdc_rx_macro_iir_enable_audio_mixer_get(struct snd_kcontrol *kc
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u16 iir_reg = LPASS_CDC_RX_SIDETONE_IIR0_IIR_CTL + 0x80 * iir_idx;
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ucontrol->value.integer.value[0] = (
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snd_soc_component_read32(component, iir_reg) &
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snd_soc_component_read(component, iir_reg) &
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(1 << band_idx)) != 0;
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dev_dbg(component->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
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@@ -2851,7 +2851,7 @@ static int lpass_cdc_rx_macro_iir_enable_audio_mixer_put(struct snd_kcontrol *kc
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snd_soc_component_update_bits(component, iir_reg, (1 << band_idx),
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(value << band_idx));
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iir_band_en_status = ((snd_soc_component_read32(component, iir_reg) &
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iir_band_en_status = ((snd_soc_component_read(component, iir_reg) &
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(1 << band_idx)) != 0);
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dev_dbg(component->dev, "%s: IIR #%d band #%d enable %d\n", __func__,
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iir_idx, band_idx, iir_band_en_status);
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@@ -2870,7 +2870,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t)) & 0x7F);
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value |= snd_soc_component_read32(component,
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value |= snd_soc_component_read(component,
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(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL + 0x80 * iir_idx));
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snd_soc_component_write(component,
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@@ -2878,7 +2878,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t) + 1) & 0x7F);
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value |= (snd_soc_component_read32(component,
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value |= (snd_soc_component_read(component,
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(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
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0x80 * iir_idx)) << 8);
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@@ -2887,7 +2887,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t) + 2) & 0x7F);
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value |= (snd_soc_component_read32(component,
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value |= (snd_soc_component_read(component,
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(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
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0x80 * iir_idx)) << 16);
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@@ -2897,7 +2897,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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* sizeof(uint32_t) + 3) & 0x7F);
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/* Mask bits top 2 bits since they are reserved */
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value |= ((snd_soc_component_read32(component,
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value |= ((snd_soc_component_read(component,
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(LPASS_CDC_RX_SIDETONE_IIR0_IIR_COEF_B2_CTL +
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16 * iir_idx)) & 0x3F) << 24);
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@@ -3039,36 +3039,36 @@ static int lpass_cdc_rx_macro_set_iir_gain(struct snd_soc_dapm_widget *w,
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if (strnstr(w->name, "IIR0", sizeof("IIR0"))) {
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL));
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} else {
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL));
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snd_soc_component_write(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL,
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snd_soc_component_read32(component,
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snd_soc_component_read(component,
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LPASS_CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL));
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}
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break;
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@@ -3227,14 +3227,14 @@ static int lpass_cdc_rx_macro_enable_echo(struct snd_soc_dapm_widget *w,
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dev_dbg(rx_dev, "%s %d %s\n", __func__, event, w->name);
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val = snd_soc_component_read32(component,
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val = snd_soc_component_read(component,
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LPASS_CDC_RX_INP_MUX_RX_MIX_CFG4);
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if (!(strcmp(w->name, "RX MIX TX0 MUX")))
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ec_tx = ((val & 0xf0) >> 0x4) - 1;
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else if (!(strcmp(w->name, "RX MIX TX1 MUX")))
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ec_tx = (val & 0x0f) - 1;
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val = snd_soc_component_read32(component,
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val = snd_soc_component_read(component,
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LPASS_CDC_RX_INP_MUX_RX_MIX_CFG5);
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if (!(strcmp(w->name, "RX MIX TX2 MUX")))
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ec_tx = (val & 0x0f) - 1;
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