qcacmn: API to read memory info from HAL

HAL modification to provide additional information to
support lithium nss offload configuration.
A new API added to extract addtional information from HAL
Few additional parameter added in get_param function.

Change-Id: I2fb0ed89c2d3cb3ee253b158f7982e1a00ab4353
This commit is contained in:
Bharat Kumar M
2017-05-08 16:09:32 +05:30
committed by snandini
parent 4bd3efcdb7
commit 9e22d3d99e
3 changed files with 53 additions and 2 deletions

View File

@@ -187,6 +187,22 @@ extern uint32_t hal_srng_get_entrysize(void *hal_soc, int ring_type);
*/
uint32_t hal_srng_max_entries(void *hal_soc, int ring_type);
/* HAL memory information */
struct hal_mem_info {
/* dev base virutal addr */
void *dev_base_addr;
/* dev base physical addr */
void *dev_base_paddr;
/* Remote virtual pointer memory for HW/FW updates */
void *shadow_rdptr_mem_vaddr;
/* Remote physical pointer memory for HW/FW updates */
void *shadow_rdptr_mem_paddr;
/* Shared memory for ring pointer updates from host to FW */
void *shadow_wrptr_mem_vaddr;
/* Shared physical memory for ring pointer updates from host to FW */
void *shadow_wrptr_mem_paddr;
};
/* SRNG parameters to be passed to hal_srng_setup */
struct hal_srng_params {
/* Physical base address of the ring */
@@ -213,6 +229,12 @@ struct hal_srng_params {
uint32_t flags;
/* Unique ring id */
uint8_t ring_id;
/* Source or Destination ring */
enum hal_srng_dir ring_dir;
/* Size of ring entry */
uint32_t entry_size;
/* hw register base address */
void *hwreg_base[MAX_SRNG_REG_GROUPS];
};
/* hal_construct_shadow_config() - initialize the shadow registers for dp rings
@@ -948,4 +970,11 @@ static inline qdf_dma_addr_t hal_srng_get_tp_addr(void *hal_soc, void *hal_ring)
extern void hal_get_srng_params(void *hal_soc, void *hal_ring,
struct hal_srng_params *ring_params);
/**
* hal_mem_info - Retreive hal memory base address
*
* @hal_soc: Opaque HAL SOC handle
* @mem: pointer to structure to be updated with hal mem info
*/
extern void hal_get_meminfo(void *hal_soc,struct hal_mem_info *mem );
#endif /* _HAL_APIH_ */

View File

@@ -755,6 +755,24 @@ fail0:
return NULL;
}
/**
* hal_mem_info - Retreive hal memory base address
*
* @hal_soc: Opaque HAL SOC handle
* @mem: pointer to structure to be updated with hal mem info
*/
void hal_get_meminfo(void *hal_soc, struct hal_mem_info *mem )
{
struct hal_soc *hal = (struct hal_soc *)hal_soc;
mem->dev_base_addr = (void *)hal->dev_base_addr;
mem->shadow_rdptr_mem_vaddr = (void *)hal->shadow_rdptr_mem_vaddr;
mem->shadow_wrptr_mem_vaddr = (void *)hal->shadow_wrptr_mem_vaddr;
mem->shadow_rdptr_mem_paddr = (void *)hal->shadow_rdptr_mem_paddr;
mem->shadow_wrptr_mem_paddr = (void *)hal->shadow_wrptr_mem_paddr;
hif_read_phy_mem_base(hal->hif_handle, (qdf_dma_addr_t *)&mem->dev_base_paddr);
return;
}
/**
* hal_detach - Detach HAL layer
* @hal_soc: HAL SOC handle
@@ -1239,6 +1257,10 @@ extern void hal_get_srng_params(void *hal_soc, void *hal_ring,
struct hal_srng_params *ring_params)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring;
int i =0;
ring_params->ring_id = srng->ring_id;
ring_params->ring_dir = srng->ring_dir;
ring_params->entry_size = srng->entry_size;
ring_params->ring_base_paddr = srng->ring_base_paddr;
ring_params->ring_base_vaddr = srng->ring_base_vaddr;
@@ -1251,4 +1273,6 @@ extern void hal_get_srng_params(void *hal_soc, void *hal_ring,
ring_params->low_threshold = srng->u.src_ring.low_threshold;
ring_params->flags = srng->flags;
ring_params->ring_id = srng->ring_id;
for (i = 0 ; i < MAX_SRNG_REG_GROUPS; i++)
ring_params->hwreg_base[i] = srng->hwreg_base[i];
}

View File

@@ -666,7 +666,6 @@ int hif_check_fw_reg(struct hif_opaque_softc *scn)
}
#endif
#ifdef IPA_OFFLOAD
/**
* hif_read_phy_mem_base(): hif_read_phy_mem_base
* @scn: scn
@@ -678,7 +677,6 @@ void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *phy_mem_base)
{
*phy_mem_base = scn->mem_pa;
}
#endif /* IPA_OFFLOAD */
/**
* hif_get_device_type(): hif_get_device_type