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qcacld-3.0: Add support for 11ax draft 3.3 changes

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Add support for 11ax Draft 3.3 specification.

Change-Id: I18eda46c724f8febe5652876175bebfda3f7fc88
CRs-Fixed: 2388130
This commit is contained in:
Kiran Kumar Lokere
2019-02-04 14:38:08 -08:00
committed by nshrivas
parent 4dab49336d
commit 9cab525856
10 changed files with 131 additions and 63 deletions
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10
components/mlme/core/src/wlan_mlme_main.c
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@@ -1002,6 +1002,12 @@ static void mlme_init_he_cap_in_cfg(struct wlan_objmgr_psoc *psoc,
cfg_default(CFG_HE_UL_2X996_RU); cfg_default(CFG_HE_UL_2X996_RU);
he_caps->dot11_he_cap.om_ctrl_ul_mu_data_dis_rx = he_caps->dot11_he_cap.om_ctrl_ul_mu_data_dis_rx =
cfg_default(CFG_HE_OM_CTRL_UL_MU_DIS_RX); cfg_default(CFG_HE_OM_CTRL_UL_MU_DIS_RX);
he_caps->dot11_he_cap.he_dynamic_smps =
cfg_default(CFG_HE_DYNAMIC_SMPS);
he_caps->dot11_he_cap.punctured_sounding_supp =
cfg_default(CFG_HE_PUNCTURED_SOUNDING);
he_caps->dot11_he_cap.ht_vht_trg_frm_rx_supp =
cfg_default(CFG_HE_HT_VHT_TRG_FRM_RX);
he_caps->dot11_he_cap.rx_pream_puncturing = he_caps->dot11_he_cap.rx_pream_puncturing =
cfg_default(CFG_HE_RX_PREAM_PUNC); cfg_default(CFG_HE_RX_PREAM_PUNC);
he_caps->dot11_he_cap.device_class = he_caps->dot11_he_cap.device_class =
@@ -1013,7 +1019,7 @@ static void mlme_init_he_cap_in_cfg(struct wlan_objmgr_psoc *psoc,
cfg_default(CFG_HE_MIDAMBLE_RX_MAX_NSTS); cfg_default(CFG_HE_MIDAMBLE_RX_MAX_NSTS);
he_caps->dot11_he_cap.he_4x_ltf_3200_gi_ndp = he_caps->dot11_he_cap.he_4x_ltf_3200_gi_ndp =
cfg_default(CFG_HE_LTF_NDP); cfg_default(CFG_HE_LTF_NDP);
he_caps->dot11_he_cap.tx_stbc_lt_80mhz = he_caps->dot11_he_cap.tb_ppdu_tx_stbc_lt_80mhz =
cfg_default(CFG_HE_TX_STBC_LT80); cfg_default(CFG_HE_TX_STBC_LT80);
he_caps->dot11_he_cap.rx_stbc_lt_80mhz = he_caps->dot11_he_cap.rx_stbc_lt_80mhz =
cfg_default(CFG_HE_RX_STBC_LT80); cfg_default(CFG_HE_RX_STBC_LT80);
@@ -1049,7 +1055,7 @@ static void mlme_init_he_cap_in_cfg(struct wlan_objmgr_psoc *psoc,
he_caps->dot11_he_cap.power_boost = cfg_default(CFG_HE_POWER_BOOST); he_caps->dot11_he_cap.power_boost = cfg_default(CFG_HE_POWER_BOOST);
he_caps->dot11_he_cap.he_ltf_800_gi_4x = cfg_default(CFG_HE_4x_LTF_GI); he_caps->dot11_he_cap.he_ltf_800_gi_4x = cfg_default(CFG_HE_4x_LTF_GI);
he_caps->dot11_he_cap.max_nc = cfg_default(CFG_HE_MAX_NC); he_caps->dot11_he_cap.max_nc = cfg_default(CFG_HE_MAX_NC);
he_caps->dot11_he_cap.tx_stbc_gt_80mhz = he_caps->dot11_he_cap.tb_ppdu_tx_stbc_gt_80mhz =
cfg_default(CFG_HE_TX_STBC_GT80); cfg_default(CFG_HE_TX_STBC_GT80);
he_caps->dot11_he_cap.rx_stbc_gt_80mhz = he_caps->dot11_he_cap.rx_stbc_gt_80mhz =
cfg_default(CFG_HE_RX_STBC_GT80); cfg_default(CFG_HE_RX_STBC_GT80);

17
components/mlme/dispatcher/inc/cfg_mlme_he_caps.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2012-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for * Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the * any purpose with or without fee is hereby granted, provided that the
@@ -212,6 +212,21 @@
0, \ 0, \
"He Om Ctrl Ul My Dis Rx") "He Om Ctrl Ul My Dis Rx")
#define CFG_HE_DYNAMIC_SMPS CFG_BOOL( \
"he_dynamic_smps", \
0, \
"He Dyanmic SMPS")
#define CFG_HE_PUNCTURED_SOUNDING CFG_BOOL( \
"he_punctured_sounding", \
0, \
"He Punctured Sounding")
#define CFG_HE_HT_VHT_TRG_FRM_RX CFG_BOOL( \
"ht_vht_trg_frm_rx", \
0, \
"HT VHT Trigger frame Rx")
#define CFG_HE_CHAN_WIDTH CFG_UINT( \ #define CFG_HE_CHAN_WIDTH CFG_UINT( \
"he_chan_width", \ "he_chan_width", \
0, \ 0, \

18
components/mlme/dispatcher/src/wlan_mlme_api.c
View File

@@ -584,6 +584,12 @@ QDF_STATUS mlme_update_tgt_he_caps_in_cfg(struct wlan_objmgr_psoc *psoc,
he_cap->ul_2x996_tone_ru_supp; he_cap->ul_2x996_tone_ru_supp;
mlme_obj->cfg.he_caps.dot11_he_cap.om_ctrl_ul_mu_data_dis_rx = mlme_obj->cfg.he_caps.dot11_he_cap.om_ctrl_ul_mu_data_dis_rx =
he_cap->om_ctrl_ul_mu_data_dis_rx; he_cap->om_ctrl_ul_mu_data_dis_rx;
mlme_obj->cfg.he_caps.dot11_he_cap.he_dynamic_smps =
he_cap->he_dynamic_smps;
mlme_obj->cfg.he_caps.dot11_he_cap.punctured_sounding_supp =
he_cap->punctured_sounding_supp;
mlme_obj->cfg.he_caps.dot11_he_cap.ht_vht_trg_frm_rx_supp =
he_cap->ht_vht_trg_frm_rx_supp;
chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0, chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0,
he_cap->chan_width_1, he_cap->chan_width_1,
@@ -632,13 +638,13 @@ QDF_STATUS mlme_update_tgt_he_caps_in_cfg(struct wlan_objmgr_psoc *psoc,
mlme_obj->cfg.he_caps.dot11_he_cap.rx_stbc_gt_80mhz = 0; mlme_obj->cfg.he_caps.dot11_he_cap.rx_stbc_gt_80mhz = 0;
} }
if (mlme_obj->cfg.vht_caps.vht_cap_info.tx_stbc) { if (mlme_obj->cfg.vht_caps.vht_cap_info.tx_stbc) {
mlme_obj->cfg.he_caps.dot11_he_cap.tx_stbc_lt_80mhz = mlme_obj->cfg.he_caps.dot11_he_cap.tb_ppdu_tx_stbc_lt_80mhz =
he_cap->tx_stbc_lt_80mhz; he_cap->tb_ppdu_tx_stbc_lt_80mhz;
mlme_obj->cfg.he_caps.dot11_he_cap.tx_stbc_gt_80mhz = mlme_obj->cfg.he_caps.dot11_he_cap.tb_ppdu_tx_stbc_gt_80mhz =
he_cap->tx_stbc_gt_80mhz; he_cap->tb_ppdu_tx_stbc_gt_80mhz;
} else { } else {
mlme_obj->cfg.he_caps.dot11_he_cap.tx_stbc_lt_80mhz = 0; mlme_obj->cfg.he_caps.dot11_he_cap.tb_ppdu_tx_stbc_lt_80mhz = 0;
mlme_obj->cfg.he_caps.dot11_he_cap.tx_stbc_gt_80mhz = 0; mlme_obj->cfg.he_caps.dot11_he_cap.tb_ppdu_tx_stbc_gt_80mhz = 0;
} }
if (cfg_in_range(CFG_HE_DOPPLER, he_cap->doppler)) if (cfg_in_range(CFG_HE_DOPPLER, he_cap->doppler))

24
core/mac/inc/sir_mac_prot_def.h
View File

@@ -1981,7 +1981,9 @@ struct he_cap_network_endian {
uint16_t he_sub_ch_sel_tx_supp:1; uint16_t he_sub_ch_sel_tx_supp:1;
uint16_t ul_2x996_tone_ru_supp:1; uint16_t ul_2x996_tone_ru_supp:1;
uint16_t om_ctrl_ul_mu_data_dis_rx:1; uint16_t om_ctrl_ul_mu_data_dis_rx:1;
uint16_t reserved1:3; uint16_t he_dynamic_smps:1;
uint16_t punctured_sounding_supp:1;
uint16_t ht_vht_trg_frm_rx_supp:1;
uint32_t reserved2:1; uint32_t reserved2:1;
uint32_t chan_width:7; uint32_t chan_width:7;
@@ -1991,7 +1993,7 @@ struct he_cap_network_endian {
uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t midamble_tx_rx_max_nsts:2; uint32_t midamble_tx_rx_max_nsts:2;
uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t tx_stbc_lt_80mhz:1; uint32_t tb_ppdu_tx_stbc_lt_80mhz:1;
uint32_t rx_stbc_lt_80mhz:1; uint32_t rx_stbc_lt_80mhz:1;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t ul_mu:2; uint32_t ul_mu:2;
@@ -2018,7 +2020,7 @@ struct he_cap_network_endian {
uint32_t power_boost:1; uint32_t power_boost:1;
uint32_t he_ltf_800_gi_4x:1; uint32_t he_ltf_800_gi_4x:1;
uint32_t max_nc:3; uint32_t max_nc:3;
uint32_t tx_stbc_gt_80mhz:1; uint32_t tb_ppdu_tx_stbc_gt_80mhz:1;
uint32_t rx_stbc_gt_80mhz:1; uint32_t rx_stbc_gt_80mhz:1;
uint16_t er_he_ltf_800_gi_4x:1; uint16_t er_he_ltf_800_gi_4x:1;
@@ -2099,7 +2101,9 @@ struct he_capability_info {
uint32_t twt_request:1; uint32_t twt_request:1;
uint32_t htc_he:1; uint32_t htc_he:1;
uint16_t reserved1:3; uint16_t ht_vht_trg_frm_rx_supp:1;
uint16_t punctured_sounding_supp:1;
uint16_t he_dynamic_smps:1;
uint16_t om_ctrl_ul_mu_data_dis_rx:1; uint16_t om_ctrl_ul_mu_data_dis_rx:1;
uint16_t ul_2x996_tone_ru_supp:1; uint16_t ul_2x996_tone_ru_supp:1;
uint16_t he_sub_ch_sel_tx_supp:1; uint16_t he_sub_ch_sel_tx_supp:1;
@@ -2119,7 +2123,7 @@ struct he_capability_info {
uint32_t ul_mu:2; uint32_t ul_mu:2;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t rx_stbc_lt_80mhz:1; uint32_t rx_stbc_lt_80mhz:1;
uint32_t tx_stbc_lt_80mhz:1; uint32_t tb_ppdu_tx_stbc_lt_80mhz:1;
uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t midamble_tx_rx_max_nsts:2; uint32_t midamble_tx_rx_max_nsts:2;
uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t he_1x_ltf_800_gi_ppdu:1;
@@ -2130,7 +2134,7 @@ struct he_capability_info {
uint32_t reserved2:1; uint32_t reserved2:1;
uint32_t rx_stbc_gt_80mhz:1; uint32_t rx_stbc_gt_80mhz:1;
uint32_t tx_stbc_gt_80mhz:1; uint32_t tb_ppdu_tx_stbc_gt_80mhz:1;
uint32_t max_nc:3; uint32_t max_nc:3;
uint32_t he_ltf_800_gi_4x:1; uint32_t he_ltf_800_gi_4x:1;
uint32_t power_boost:1; uint32_t power_boost:1;
@@ -2209,7 +2213,9 @@ struct he_capability_info {
uint16_t he_sub_ch_sel_tx_supp:1; uint16_t he_sub_ch_sel_tx_supp:1;
uint16_t ul_2x996_tone_ru_supp:1; uint16_t ul_2x996_tone_ru_supp:1;
uint16_t om_ctrl_ul_mu_data_dis_rx:1; uint16_t om_ctrl_ul_mu_data_dis_rx:1;
uint16_t reserved1:3; uint16_t he_dynamic_smps:1;
uint16_t punctured_sounding_supp:1;
uint16_t ht_vht_trg_frm_rx_supp:1;
uint32_t reserved2:1; uint32_t reserved2:1;
uint32_t chan_width:7; uint32_t chan_width:7;
@@ -2219,7 +2225,7 @@ struct he_capability_info {
uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t midamble_tx_rx_max_nsts:2; uint32_t midamble_tx_rx_max_nsts:2;
uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t tx_stbc_lt_80mhz:1; uint32_t tb_ppdu_tx_stbc_lt_80mhz:1;
uint32_t rx_stbc_lt_80mhz:1; uint32_t rx_stbc_lt_80mhz:1;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t ul_mu:2; uint32_t ul_mu:2;
@@ -2246,7 +2252,7 @@ struct he_capability_info {
uint32_t power_boost:1; uint32_t power_boost:1;
uint32_t he_ltf_800_gi_4x:1; uint32_t he_ltf_800_gi_4x:1;
uint32_t max_nc:3; uint32_t max_nc:3;
uint32_t tx_stbc_gt_80mhz:1; uint32_t tb_ppdu_tx_stbc_gt_80mhz:1;
uint32_t rx_stbc_gt_80mhz:1; uint32_t rx_stbc_gt_80mhz:1;
uint16_t er_he_ltf_800_gi_4x:1; uint16_t er_he_ltf_800_gi_4x:1;

8
core/mac/src/cfg/cfgUtil/dot11f.frms
View File

@@ -2883,7 +2883,9 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
he_sub_ch_sel_tx_supp:1; he_sub_ch_sel_tx_supp:1;
ul_2x996_tone_ru_supp:1; ul_2x996_tone_ru_supp:1;
om_ctrl_ul_mu_data_dis_rx:1; om_ctrl_ul_mu_data_dis_rx:1;
reserved1:3; he_dynamic_smps:1;
punctured_sounding_supp:1;
ht_vht_trg_frm_rx_supp:1;
} }
{ {
reserved2:1; reserved2:1;
@@ -2900,7 +2902,7 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
he_1x_ltf_800_gi_ppdu:1; he_1x_ltf_800_gi_ppdu:1;
midamble_tx_rx_max_nsts:2; midamble_tx_rx_max_nsts:2;
he_4x_ltf_3200_gi_ndp:1; he_4x_ltf_3200_gi_ndp:1;
tx_stbc_lt_80mhz:1; tb_ppdu_tx_stbc_lt_80mhz:1;
rx_stbc_lt_80mhz:1; rx_stbc_lt_80mhz:1;
doppler:2; doppler:2;
ul_mu:2; ul_mu:2;
@@ -2928,7 +2930,7 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
power_boost:1; power_boost:1;
he_ltf_800_gi_4x:1; he_ltf_800_gi_4x:1;
max_nc:3; max_nc:3;
tx_stbc_gt_80mhz:1; tb_ppdu_tx_stbc_gt_80mhz:1;
rx_stbc_gt_80mhz:1; rx_stbc_gt_80mhz:1;
} }
{ {

12
core/mac/src/include/dot11f.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2012-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for * Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the * any purpose with or without fee is hereby granted, provided that the
@@ -26,7 +26,7 @@
* *
* *
* This file was automatically generated by 'framesc' * This file was automatically generated by 'framesc'
* Tue Dec 11 13:11:53 2018 from the following file(s): * Tue Feb 5 16:01:26 2019 from the following file(s):
* *
* dot11f.frms * dot11f.frms
* *
@@ -8860,7 +8860,9 @@ typedef struct sDot11fIEhe_cap {
uint16_t he_sub_ch_sel_tx_supp:1; uint16_t he_sub_ch_sel_tx_supp:1;
uint16_t ul_2x996_tone_ru_supp:1; uint16_t ul_2x996_tone_ru_supp:1;
uint16_t om_ctrl_ul_mu_data_dis_rx:1; uint16_t om_ctrl_ul_mu_data_dis_rx:1;
uint16_t reserved1:3; uint16_t he_dynamic_smps:1;
uint16_t punctured_sounding_supp:1;
uint16_t ht_vht_trg_frm_rx_supp:1;
uint32_t reserved2:1; uint32_t reserved2:1;
uint32_t chan_width_0:1; uint32_t chan_width_0:1;
uint32_t chan_width_1:1; uint32_t chan_width_1:1;
@@ -8875,7 +8877,7 @@ typedef struct sDot11fIEhe_cap {
uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t midamble_tx_rx_max_nsts:2; uint32_t midamble_tx_rx_max_nsts:2;
uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t tx_stbc_lt_80mhz:1; uint32_t tb_ppdu_tx_stbc_lt_80mhz:1;
uint32_t rx_stbc_lt_80mhz:1; uint32_t rx_stbc_lt_80mhz:1;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t ul_mu:2; uint32_t ul_mu:2;
@@ -8901,7 +8903,7 @@ typedef struct sDot11fIEhe_cap {
uint32_t power_boost:1; uint32_t power_boost:1;
uint32_t he_ltf_800_gi_4x:1; uint32_t he_ltf_800_gi_4x:1;
uint32_t max_nc:3; uint32_t max_nc:3;
uint32_t tx_stbc_gt_80mhz:1; uint32_t tb_ppdu_tx_stbc_gt_80mhz:1;
uint32_t rx_stbc_gt_80mhz:1; uint32_t rx_stbc_gt_80mhz:1;
uint16_t er_he_ltf_800_gi_4x:1; uint16_t er_he_ltf_800_gi_4x:1;
uint16_t he_ppdu_20_in_40Mhz_2G:1; uint16_t he_ppdu_20_in_40Mhz_2G:1;

33
core/mac/src/pe/lim/lim_utils.c
View File

@@ -6787,25 +6787,25 @@ static void lim_intersect_he_caps(tDot11fIEhe_cap *rcvd_he,
peer_he->ldpc_coding &= session_he->ldpc_coding; peer_he->ldpc_coding &= session_he->ldpc_coding;
if (session_he->tx_stbc_lt_80mhz && peer_he->rx_stbc_lt_80mhz) if (session_he->tb_ppdu_tx_stbc_lt_80mhz && peer_he->rx_stbc_lt_80mhz)
peer_he->rx_stbc_lt_80mhz = 1; peer_he->rx_stbc_lt_80mhz = 1;
else else
peer_he->rx_stbc_lt_80mhz = 0; peer_he->rx_stbc_lt_80mhz = 0;
if (session_he->rx_stbc_lt_80mhz && peer_he->tx_stbc_lt_80mhz) if (session_he->rx_stbc_lt_80mhz && peer_he->tb_ppdu_tx_stbc_lt_80mhz)
peer_he->tx_stbc_lt_80mhz = 1; peer_he->tb_ppdu_tx_stbc_lt_80mhz = 1;
else else
peer_he->tx_stbc_lt_80mhz = 0; peer_he->tb_ppdu_tx_stbc_lt_80mhz = 0;
if (session_he->tx_stbc_gt_80mhz && peer_he->rx_stbc_gt_80mhz) if (session_he->tb_ppdu_tx_stbc_gt_80mhz && peer_he->rx_stbc_gt_80mhz)
peer_he->rx_stbc_gt_80mhz = 1; peer_he->rx_stbc_gt_80mhz = 1;
else else
peer_he->rx_stbc_gt_80mhz = 0; peer_he->rx_stbc_gt_80mhz = 0;
if (session_he->rx_stbc_gt_80mhz && peer_he->tx_stbc_gt_80mhz) if (session_he->rx_stbc_gt_80mhz && peer_he->tb_ppdu_tx_stbc_gt_80mhz)
peer_he->tx_stbc_gt_80mhz = 1; peer_he->tb_ppdu_tx_stbc_gt_80mhz = 1;
else else
peer_he->tx_stbc_gt_80mhz = 0; peer_he->tb_ppdu_tx_stbc_gt_80mhz = 0;
/* Tx Doppler is first bit and Rx Doppler is second bit */ /* Tx Doppler is first bit and Rx Doppler is second bit */
if (session_he->doppler) { if (session_he->doppler) {
@@ -7089,6 +7089,12 @@ void lim_log_he_cap(struct mac_context *mac, tDot11fIEhe_cap *he_cap)
he_cap->ul_2x996_tone_ru_supp); he_cap->ul_2x996_tone_ru_supp);
pe_debug("\tOM ctrl UL MU data dis rx supp: 0x%01x", pe_debug("\tOM ctrl UL MU data dis rx supp: 0x%01x",
he_cap->om_ctrl_ul_mu_data_dis_rx); he_cap->om_ctrl_ul_mu_data_dis_rx);
pe_debug("\tHE dynamic SMPS supp: 0x%01x",
he_cap->he_dynamic_smps);
pe_debug("\tPunctured sounding supp: 0x%01x",
he_cap->punctured_sounding_supp);
pe_debug("\tHT VHT Trigger frame Rx supp: 0x%01x",
he_cap->ht_vht_trg_frm_rx_supp);
/* HE PHY capabilities */ /* HE PHY capabilities */
chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0, chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0,
he_cap->chan_width_1, he_cap->chan_width_2, he_cap->chan_width_1, he_cap->chan_width_2,
@@ -7108,7 +7114,7 @@ void lim_log_he_cap(struct mac_context *mac, tDot11fIEhe_cap *he_cap)
pe_debug("\tLTF and GI for NDP: 0x%02x", pe_debug("\tLTF and GI for NDP: 0x%02x",
he_cap->he_4x_ltf_3200_gi_ndp); he_cap->he_4x_ltf_3200_gi_ndp);
pe_debug("\tSTBC Tx support (<= 80MHz): 0x%01x", pe_debug("\tSTBC Tx support (<= 80MHz): 0x%01x",
he_cap->tx_stbc_lt_80mhz); he_cap->tb_ppdu_tx_stbc_lt_80mhz);
pe_debug("\tSTBC Rx support (<= 80MHz): 0x%01x", pe_debug("\tSTBC Rx support (<= 80MHz): 0x%01x",
he_cap->rx_stbc_lt_80mhz); he_cap->rx_stbc_lt_80mhz);
pe_debug("\tDoppler support: 0x%02x", he_cap->doppler); pe_debug("\tDoppler support: 0x%02x", he_cap->doppler);
@@ -7147,7 +7153,7 @@ void lim_log_he_cap(struct mac_context *mac, tDot11fIEhe_cap *he_cap)
pe_debug("\tPower boost factor: 0x%01x", he_cap->power_boost); pe_debug("\tPower boost factor: 0x%01x", he_cap->power_boost);
pe_debug("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x); pe_debug("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x);
pe_debug("\tSTBC Tx support (> 80MHz): 0x%01x", pe_debug("\tSTBC Tx support (> 80MHz): 0x%01x",
he_cap->tx_stbc_gt_80mhz); he_cap->tb_ppdu_tx_stbc_gt_80mhz);
pe_debug("\tSTBC Rx support (> 80MHz): 0x%01x", pe_debug("\tSTBC Rx support (> 80MHz): 0x%01x",
he_cap->rx_stbc_gt_80mhz); he_cap->rx_stbc_gt_80mhz);
pe_debug("\tMax Nc: 0x%03x", he_cap->max_nc); pe_debug("\tMax Nc: 0x%03x", he_cap->max_nc);
@@ -7311,7 +7317,6 @@ void lim_set_he_caps(struct mac_context *mac, struct pe_session *session, uint8_
he_cap->ops_supp = dot11_cap.ops_supp; he_cap->ops_supp = dot11_cap.ops_supp;
he_cap->ndp_feedback_supp = dot11_cap.ndp_feedback_supp; he_cap->ndp_feedback_supp = dot11_cap.ndp_feedback_supp;
he_cap->amsdu_in_ampdu = dot11_cap.amsdu_in_ampdu; he_cap->amsdu_in_ampdu = dot11_cap.amsdu_in_ampdu;
he_cap->reserved1 = dot11_cap.reserved1;
he_cap->chan_width = HE_CH_WIDTH_COMBINE(dot11_cap.chan_width_0, he_cap->chan_width = HE_CH_WIDTH_COMBINE(dot11_cap.chan_width_0,
dot11_cap.chan_width_1, dot11_cap.chan_width_2, dot11_cap.chan_width_1, dot11_cap.chan_width_2,
@@ -7325,9 +7330,11 @@ void lim_set_he_caps(struct mac_context *mac, struct pe_session *session, uint8_
he_cap->midamble_tx_rx_max_nsts = he_cap->midamble_tx_rx_max_nsts =
dot11_cap.midamble_tx_rx_max_nsts; dot11_cap.midamble_tx_rx_max_nsts;
he_cap->he_4x_ltf_3200_gi_ndp = dot11_cap.he_4x_ltf_3200_gi_ndp; he_cap->he_4x_ltf_3200_gi_ndp = dot11_cap.he_4x_ltf_3200_gi_ndp;
he_cap->tx_stbc_lt_80mhz = dot11_cap.tx_stbc_lt_80mhz; he_cap->tb_ppdu_tx_stbc_lt_80mhz =
dot11_cap.tb_ppdu_tx_stbc_lt_80mhz;
he_cap->rx_stbc_lt_80mhz = dot11_cap.rx_stbc_lt_80mhz; he_cap->rx_stbc_lt_80mhz = dot11_cap.rx_stbc_lt_80mhz;
he_cap->tx_stbc_gt_80mhz = dot11_cap.tx_stbc_gt_80mhz; he_cap->tb_ppdu_tx_stbc_gt_80mhz =
dot11_cap.tb_ppdu_tx_stbc_gt_80mhz;
he_cap->rx_stbc_gt_80mhz = dot11_cap.rx_stbc_gt_80mhz; he_cap->rx_stbc_gt_80mhz = dot11_cap.rx_stbc_gt_80mhz;
he_cap->doppler = dot11_cap.doppler; he_cap->doppler = dot11_cap.doppler;
he_cap->ul_mu = dot11_cap.ul_mu; he_cap->ul_mu = dot11_cap.ul_mu;

20
core/mac/src/sys/legacy/src/utils/src/dot11f.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2012-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for * Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the * any purpose with or without fee is hereby granted, provided that the
@@ -24,7 +24,7 @@
* *
* *
* This file was automatically generated by 'framesc' * This file was automatically generated by 'framesc'
* Tue Dec 11 13:11:53 2018 from the following file(s): * Tue Feb 5 16:01:26 2019 from the following file(s):
* *
* dot11f.frms * dot11f.frms
* *
@@ -8749,7 +8749,9 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pDst->he_sub_ch_sel_tx_supp = tmp78__ >> 10 & 0x1; pDst->he_sub_ch_sel_tx_supp = tmp78__ >> 10 & 0x1;
pDst->ul_2x996_tone_ru_supp = tmp78__ >> 11 & 0x1; pDst->ul_2x996_tone_ru_supp = tmp78__ >> 11 & 0x1;
pDst->om_ctrl_ul_mu_data_dis_rx = tmp78__ >> 12 & 0x1; pDst->om_ctrl_ul_mu_data_dis_rx = tmp78__ >> 12 & 0x1;
pDst->reserved1 = tmp78__ >> 13 & 0x7; pDst->he_dynamic_smps = tmp78__ >> 13 & 0x1;
pDst->punctured_sounding_supp = tmp78__ >> 14 & 0x1;
pDst->ht_vht_trg_frm_rx_supp = tmp78__ >> 15 & 0x1;
if (unlikely(ielen < 4)) { if (unlikely(ielen < 4)) {
pDst->present = 0; pDst->present = 0;
return DOT11F_INCOMPLETE_IE; return DOT11F_INCOMPLETE_IE;
@@ -8772,7 +8774,7 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pDst->he_1x_ltf_800_gi_ppdu = tmp79__ >> 14 & 0x1; pDst->he_1x_ltf_800_gi_ppdu = tmp79__ >> 14 & 0x1;
pDst->midamble_tx_rx_max_nsts = tmp79__ >> 15 & 0x3; pDst->midamble_tx_rx_max_nsts = tmp79__ >> 15 & 0x3;
pDst->he_4x_ltf_3200_gi_ndp = tmp79__ >> 17 & 0x1; pDst->he_4x_ltf_3200_gi_ndp = tmp79__ >> 17 & 0x1;
pDst->tx_stbc_lt_80mhz = tmp79__ >> 18 & 0x1; pDst->tb_ppdu_tx_stbc_lt_80mhz = tmp79__ >> 18 & 0x1;
pDst->rx_stbc_lt_80mhz = tmp79__ >> 19 & 0x1; pDst->rx_stbc_lt_80mhz = tmp79__ >> 19 & 0x1;
pDst->doppler = tmp79__ >> 20 & 0x3; pDst->doppler = tmp79__ >> 20 & 0x3;
pDst->ul_mu = tmp79__ >> 22 & 0x3; pDst->ul_mu = tmp79__ >> 22 & 0x3;
@@ -8806,7 +8808,7 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pDst->power_boost = tmp80__ >> 25 & 0x1; pDst->power_boost = tmp80__ >> 25 & 0x1;
pDst->he_ltf_800_gi_4x = tmp80__ >> 26 & 0x1; pDst->he_ltf_800_gi_4x = tmp80__ >> 26 & 0x1;
pDst->max_nc = tmp80__ >> 27 & 0x7; pDst->max_nc = tmp80__ >> 27 & 0x7;
pDst->tx_stbc_gt_80mhz = tmp80__ >> 30 & 0x1; pDst->tb_ppdu_tx_stbc_gt_80mhz = tmp80__ >> 30 & 0x1;
pDst->rx_stbc_gt_80mhz = tmp80__ >> 31 & 0x1; pDst->rx_stbc_gt_80mhz = tmp80__ >> 31 & 0x1;
if (unlikely(ielen < 2)) { if (unlikely(ielen < 2)) {
pDst->present = 0; pDst->present = 0;
@@ -26243,7 +26245,9 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
tmp173__ |= (pSrc->he_sub_ch_sel_tx_supp << 10); tmp173__ |= (pSrc->he_sub_ch_sel_tx_supp << 10);
tmp173__ |= (pSrc->ul_2x996_tone_ru_supp << 11); tmp173__ |= (pSrc->ul_2x996_tone_ru_supp << 11);
tmp173__ |= (pSrc->om_ctrl_ul_mu_data_dis_rx << 12); tmp173__ |= (pSrc->om_ctrl_ul_mu_data_dis_rx << 12);
tmp173__ |= (pSrc->reserved1 << 13); tmp173__ |= (pSrc->he_dynamic_smps << 13);
tmp173__ |= (pSrc->punctured_sounding_supp << 14);
tmp173__ |= (pSrc->ht_vht_trg_frm_rx_supp << 15);
if (unlikely(nBuf < 2)) if (unlikely(nBuf < 2))
return DOT11F_INCOMPLETE_IE; return DOT11F_INCOMPLETE_IE;
@@ -26266,7 +26270,7 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
tmp174__ |= (pSrc->he_1x_ltf_800_gi_ppdu << 14); tmp174__ |= (pSrc->he_1x_ltf_800_gi_ppdu << 14);
tmp174__ |= (pSrc->midamble_tx_rx_max_nsts << 15); tmp174__ |= (pSrc->midamble_tx_rx_max_nsts << 15);
tmp174__ |= (pSrc->he_4x_ltf_3200_gi_ndp << 17); tmp174__ |= (pSrc->he_4x_ltf_3200_gi_ndp << 17);
tmp174__ |= (pSrc->tx_stbc_lt_80mhz << 18); tmp174__ |= (pSrc->tb_ppdu_tx_stbc_lt_80mhz << 18);
tmp174__ |= (pSrc->rx_stbc_lt_80mhz << 19); tmp174__ |= (pSrc->rx_stbc_lt_80mhz << 19);
tmp174__ |= (pSrc->doppler << 20); tmp174__ |= (pSrc->doppler << 20);
tmp174__ |= (pSrc->ul_mu << 22); tmp174__ |= (pSrc->ul_mu << 22);
@@ -26300,7 +26304,7 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
tmp175__ |= (pSrc->power_boost << 25); tmp175__ |= (pSrc->power_boost << 25);
tmp175__ |= (pSrc->he_ltf_800_gi_4x << 26); tmp175__ |= (pSrc->he_ltf_800_gi_4x << 26);
tmp175__ |= (pSrc->max_nc << 27); tmp175__ |= (pSrc->max_nc << 27);
tmp175__ |= (pSrc->tx_stbc_gt_80mhz << 30); tmp175__ |= (pSrc->tb_ppdu_tx_stbc_gt_80mhz << 30);
tmp175__ |= (pSrc->rx_stbc_gt_80mhz << 31); tmp175__ |= (pSrc->rx_stbc_gt_80mhz << 31);
if (unlikely(nBuf < 4)) if (unlikely(nBuf < 4))
return DOT11F_INCOMPLETE_IE; return DOT11F_INCOMPLETE_IE;

8
core/sme/src/common/sme_api.c
View File

@@ -11523,13 +11523,13 @@ int sme_update_he_tx_stbc_cap(mac_handle_t mac_handle, uint8_t session_id,
return -EINVAL; return -EINVAL;
} }
if (he_cap_val <= 1) if (he_cap_val <= 1)
mac_ctx->mlme_cfg->he_caps.dot11_he_cap.tx_stbc_lt_80mhz = mac_ctx->mlme_cfg->he_caps.dot11_he_cap.tb_ppdu_tx_stbc_lt_80mhz
he_cap_val; = he_cap_val;
else else
return -EINVAL; return -EINVAL;
if (he_cap_val <= 1) if (he_cap_val <= 1)
mac_ctx->mlme_cfg->he_caps.dot11_he_cap.tx_stbc_gt_80mhz = mac_ctx->mlme_cfg->he_caps.dot11_he_cap.tb_ppdu_tx_stbc_gt_80mhz
he_cap_val; = he_cap_val;
else else
return -EINVAL; return -EINVAL;
csr_update_session_he_cap(mac_ctx, session); csr_update_session_he_cap(mac_ctx, session);

44
core/wma/src/wma_he.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for * Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the * any purpose with or without fee is hereby granted, provided that the
@@ -221,6 +221,12 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t *mac_cap,
he_cap->ul_2x996_tone_ru_supp = WMI_HECAP_MAC_UL2X996RU_GET(mac_cap[1]); he_cap->ul_2x996_tone_ru_supp = WMI_HECAP_MAC_UL2X996RU_GET(mac_cap[1]);
he_cap->om_ctrl_ul_mu_data_dis_rx = he_cap->om_ctrl_ul_mu_data_dis_rx =
WMI_HECAP_MAC_OMCULMUDDIS_GET(mac_cap[1]); WMI_HECAP_MAC_OMCULMUDDIS_GET(mac_cap[1]);
he_cap->he_dynamic_smps =
WMI_HECAP_MAC_DYNSMPWRSAVE_GET(mac_cap[1]);
he_cap->punctured_sounding_supp =
WMI_HECAP_MAC_PUNCSOUNDING_GET(mac_cap[1]);
he_cap->ht_vht_trg_frm_rx_supp =
WMI_HECAP_MAC_HTVHTTRIGRX_GET(mac_cap[1]);
/* HE PHY capabilities */ /* HE PHY capabilities */
chan_width = WMI_HECAP_PHY_CBW_GET(phy_cap); chan_width = WMI_HECAP_PHY_CBW_GET(phy_cap);
he_cap->chan_width_0 = HE_CH_WIDTH_GET_BIT(chan_width, 0); he_cap->chan_width_0 = HE_CH_WIDTH_GET_BIT(chan_width, 0);
@@ -238,9 +244,10 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t *mac_cap,
WMI_HECAP_PHY_MIDAMBLETXRXMAXNSTS_GET(phy_cap); WMI_HECAP_PHY_MIDAMBLETXRXMAXNSTS_GET(phy_cap);
he_cap->he_4x_ltf_3200_gi_ndp = WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap); he_cap->he_4x_ltf_3200_gi_ndp = WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap);
he_cap->rx_stbc_lt_80mhz = WMI_HECAP_PHY_RXSTBC_GET(phy_cap); he_cap->rx_stbc_lt_80mhz = WMI_HECAP_PHY_RXSTBC_GET(phy_cap);
he_cap->tx_stbc_lt_80mhz = WMI_HECAP_PHY_TXSTBC_GET(phy_cap); he_cap->tb_ppdu_tx_stbc_lt_80mhz = WMI_HECAP_PHY_TXSTBC_GET(phy_cap);
he_cap->rx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap); he_cap->rx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap);
he_cap->tx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap); he_cap->tb_ppdu_tx_stbc_gt_80mhz =
WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap);
he_cap->doppler = (WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) | he_cap->doppler = (WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) |
WMI_HECAP_PHY_TXDOPPLER(phy_cap); WMI_HECAP_PHY_TXDOPPLER(phy_cap);
@@ -273,7 +280,8 @@ static void wma_convert_he_cap(tDot11fIEhe_cap *he_cap, uint32_t *mac_cap,
he_cap->he_ltf_800_gi_4x = he_cap->he_ltf_800_gi_4x =
WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap); WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap);
he_cap->max_nc = WMI_HECAP_PHY_MAXNC_GET(phy_cap); he_cap->max_nc = WMI_HECAP_PHY_MAXNC_GET(phy_cap);
he_cap->tx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap); he_cap->tb_ppdu_tx_stbc_gt_80mhz =
WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap);
he_cap->rx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap); he_cap->rx_stbc_gt_80mhz = WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap);
he_cap->er_he_ltf_800_gi_4x = he_cap->er_he_ltf_800_gi_4x =
WMI_HECAP_PHY_ERSU4X800NSECGI_GET(phy_cap); WMI_HECAP_PHY_ERSU4X800NSECGI_GET(phy_cap);
@@ -407,8 +415,6 @@ static void wma_derive_ext_he_cap(tDot11fIEhe_cap *he_cap,
he_cap->ops_supp = QDF_MIN(he_cap->ops_supp, new_cap->ops_supp); he_cap->ops_supp = QDF_MIN(he_cap->ops_supp, new_cap->ops_supp);
he_cap->amsdu_in_ampdu = QDF_MIN(he_cap->amsdu_in_ampdu, he_cap->amsdu_in_ampdu = QDF_MIN(he_cap->amsdu_in_ampdu,
new_cap->amsdu_in_ampdu); new_cap->amsdu_in_ampdu);
he_cap->reserved1 = QDF_MIN(he_cap->reserved1,
new_cap->reserved1);
he_cap->chan_width_0 = he_cap->chan_width_0 | new_cap->chan_width_0; he_cap->chan_width_0 = he_cap->chan_width_0 | new_cap->chan_width_0;
he_cap->chan_width_1 = he_cap->chan_width_1 | new_cap->chan_width_1; he_cap->chan_width_1 = he_cap->chan_width_1 | new_cap->chan_width_1;
@@ -434,8 +440,9 @@ static void wma_derive_ext_he_cap(tDot11fIEhe_cap *he_cap,
he_cap->he_4x_ltf_3200_gi_ndp = he_cap->he_4x_ltf_3200_gi_ndp =
QDF_MIN(he_cap->he_4x_ltf_3200_gi_ndp, QDF_MIN(he_cap->he_4x_ltf_3200_gi_ndp,
new_cap->he_4x_ltf_3200_gi_ndp); new_cap->he_4x_ltf_3200_gi_ndp);
he_cap->tx_stbc_lt_80mhz = QDF_MIN(he_cap->tx_stbc_lt_80mhz, he_cap->tb_ppdu_tx_stbc_lt_80mhz = QDF_MIN(
new_cap->tx_stbc_lt_80mhz); he_cap->tb_ppdu_tx_stbc_lt_80mhz,
new_cap->tb_ppdu_tx_stbc_lt_80mhz);
he_cap->rx_stbc_lt_80mhz = QDF_MIN(he_cap->rx_stbc_lt_80mhz, he_cap->rx_stbc_lt_80mhz = QDF_MIN(he_cap->rx_stbc_lt_80mhz,
new_cap->rx_stbc_lt_80mhz); new_cap->rx_stbc_lt_80mhz);
he_cap->doppler = QDF_MIN(he_cap->doppler, he_cap->doppler = QDF_MIN(he_cap->doppler,
@@ -582,6 +589,12 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap)
he_cap->ul_2x996_tone_ru_supp); he_cap->ul_2x996_tone_ru_supp);
WMA_LOGD("\tOM ctrl UL MU data dis rx supp: 0x%01x", WMA_LOGD("\tOM ctrl UL MU data dis rx supp: 0x%01x",
he_cap->om_ctrl_ul_mu_data_dis_rx); he_cap->om_ctrl_ul_mu_data_dis_rx);
WMA_LOGD("\tHE dynamic SMPS supp: 0x%01x",
he_cap->he_dynamic_smps);
WMA_LOGD("\tPunctured sounding supp: 0x%01x",
he_cap->punctured_sounding_supp);
WMA_LOGD("\tHT VHT Trigger frame Rx supp: 0x%01x",
he_cap->ht_vht_trg_frm_rx_supp);
/* HE PHY capabilities */ /* HE PHY capabilities */
chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0, chan_width = HE_CH_WIDTH_COMBINE(he_cap->chan_width_0,
@@ -599,7 +612,8 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap)
WMA_LOGD("\tMidamble Tx Rx MAX NSTS: 0x%02x", WMA_LOGD("\tMidamble Tx Rx MAX NSTS: 0x%02x",
he_cap->midamble_tx_rx_max_nsts); he_cap->midamble_tx_rx_max_nsts);
WMA_LOGD("\tLTF and GI for NDP: 0x%02x", he_cap->he_4x_ltf_3200_gi_ndp); WMA_LOGD("\tLTF and GI for NDP: 0x%02x", he_cap->he_4x_ltf_3200_gi_ndp);
WMA_LOGD("\tSTBC Tx support <= 80M: 0x%01x", he_cap->tx_stbc_lt_80mhz); WMA_LOGD("\tTB PPDU STBC Tx support <= 80M: 0x%01x",
he_cap->tb_ppdu_tx_stbc_lt_80mhz);
WMA_LOGD("\tSTBC Rx support <= 80M: 0x%01x", he_cap->rx_stbc_lt_80mhz); WMA_LOGD("\tSTBC Rx support <= 80M: 0x%01x", he_cap->rx_stbc_lt_80mhz);
WMA_LOGD("\tDoppler support: 0x%02x", he_cap->doppler); WMA_LOGD("\tDoppler support: 0x%02x", he_cap->doppler);
WMA_LOGD("\tUL MU: 0x%02x", he_cap->ul_mu); WMA_LOGD("\tUL MU: 0x%02x", he_cap->ul_mu);
@@ -634,7 +648,8 @@ void wma_print_he_cap(tDot11fIEhe_cap *he_cap)
WMA_LOGD("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x); WMA_LOGD("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x);
WMA_LOGD("\tMax NC: 0x%01x", he_cap->max_nc); WMA_LOGD("\tMax NC: 0x%01x", he_cap->max_nc);
WMA_LOGD("\tstbc Tx gt 80mhz: 0x%01x", he_cap->tx_stbc_gt_80mhz); WMA_LOGD("\tTB PPDU stbc Tx gt 80mhz: 0x%01x",
he_cap->tb_ppdu_tx_stbc_gt_80mhz);
WMA_LOGD("\tstbc Rx gt 80mhz: 0x%01x", he_cap->rx_stbc_gt_80mhz); WMA_LOGD("\tstbc Rx gt 80mhz: 0x%01x", he_cap->rx_stbc_gt_80mhz);
WMA_LOGD("\ter_he_ltf_800_gi_4x: 0x%01x", he_cap->er_he_ltf_800_gi_4x); WMA_LOGD("\ter_he_ltf_800_gi_4x: 0x%01x", he_cap->er_he_ltf_800_gi_4x);
WMA_LOGD("\the_ppdu_20_in_40Mhz_2G: 0x%01x", WMA_LOGD("\the_ppdu_20_in_40Mhz_2G: 0x%01x",
@@ -1128,6 +1143,11 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_MAC_UL2X996RU_SET(mac_cap[1], he_cap->ul_2x996_tone_ru_supp); WMI_HECAP_MAC_UL2X996RU_SET(mac_cap[1], he_cap->ul_2x996_tone_ru_supp);
WMI_HECAP_MAC_OMCULMUDDIS_SET(mac_cap[1], WMI_HECAP_MAC_OMCULMUDDIS_SET(mac_cap[1],
he_cap->om_ctrl_ul_mu_data_dis_rx); he_cap->om_ctrl_ul_mu_data_dis_rx);
WMI_HECAP_MAC_DYNSMPWRSAVE_SET(mac_cap[1], he_cap->he_dynamic_smps);
WMI_HECAP_MAC_PUNCSOUNDING_SET(mac_cap[1],
he_cap->punctured_sounding_supp);
WMI_HECAP_MAC_HTVHTTRIGRX_SET(mac_cap[1],
he_cap->ht_vht_trg_frm_rx_supp);
qdf_mem_copy(peer->peer_he_cap_macinfo, mac_cap, sizeof(mac_cap)); qdf_mem_copy(peer->peer_he_cap_macinfo, mac_cap, sizeof(mac_cap));
/* HE PHY capabilities */ /* HE PHY capabilities */
@@ -1145,7 +1165,7 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_PHY_LTFGIFORNDP_SET(phy_cap, he_cap->he_4x_ltf_3200_gi_ndp); WMI_HECAP_PHY_LTFGIFORNDP_SET(phy_cap, he_cap->he_4x_ltf_3200_gi_ndp);
WMI_HECAP_PHY_RXSTBC_SET(phy_cap, he_cap->rx_stbc_lt_80mhz); WMI_HECAP_PHY_RXSTBC_SET(phy_cap, he_cap->rx_stbc_lt_80mhz);
WMI_HECAP_PHY_TXSTBC_SET(phy_cap, he_cap->tx_stbc_lt_80mhz); WMI_HECAP_PHY_TXSTBC_SET(phy_cap, he_cap->tb_ppdu_tx_stbc_lt_80mhz);
temp = he_cap->doppler & 0x1; temp = he_cap->doppler & 0x1;
WMI_HECAP_PHY_RXDOPPLER_SET(phy_cap, temp); WMI_HECAP_PHY_RXDOPPLER_SET(phy_cap, temp);
@@ -1185,7 +1205,7 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_PHY_MAXNC_SET(phy_cap, he_cap->max_nc); WMI_HECAP_PHY_MAXNC_SET(phy_cap, he_cap->max_nc);
WMI_HECAP_PHY_STBCRXGT80_SET(phy_cap, he_cap->rx_stbc_gt_80mhz); WMI_HECAP_PHY_STBCRXGT80_SET(phy_cap, he_cap->rx_stbc_gt_80mhz);
WMI_HECAP_PHY_STBCTXGT80_SET(phy_cap, he_cap->tx_stbc_gt_80mhz); WMI_HECAP_PHY_STBCTXGT80_SET(phy_cap, he_cap->tb_ppdu_tx_stbc_gt_80mhz);
WMI_HECAP_PHY_ERSU4X800NSECGI_SET(phy_cap, he_cap->er_he_ltf_800_gi_4x); WMI_HECAP_PHY_ERSU4X800NSECGI_SET(phy_cap, he_cap->er_he_ltf_800_gi_4x);
WMI_HECAP_PHY_HEPPDU20IN40MHZ2G_SET(phy_cap, WMI_HECAP_PHY_HEPPDU20IN40MHZ2G_SET(phy_cap,