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msm: camera: isp: Configure HBI/VBI/Throttle params for TPG

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Update hbi, vbi & throttle pattern in TPG with the values sent
from user-space in TPG blob.

CRs-Fixed: 2841729
Change-Id: Ie4d95252c0b00ce8226f39fe899eae7c0bf3c88a
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
This commit is contained in:
Karthik Anantha Ram
2021-02-11 11:20:33 -08:00
parent 3a3f1eeb26
commit 9c7d665c19
3 changed files with 34 additions and 17 deletions
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24
drivers/cam_isp/isp_hw_mgr/isp_hw/top_tpg/cam_top_tpg_core.h
View File

@@ -71,17 +71,17 @@ struct cam_top_tpg_dt_cfg {
/** /**
* struct cam_top_tpg_cfg- tpg congiguration * struct cam_top_tpg_cfg- tpg congiguration
* @pix_pattern : pixel pattern output of the tpg * @pix_pattern : pixel pattern output of the tpg
* @phy_sel : phy selection 0:dphy or 1:cphy * @phy_sel : phy selection 0:dphy or 1:cphy
* @num_active_lanes Number of active lines * @num_active_lanes Number of active lines
* @vc_num: Virtual channel number * @vc_num: Virtual channel number
* @h_blank_count: horizontal blanking count value * @h_blank_count: horizontal blanking count value
* @h_blank_count: vertical blanking count value * @v_blank_count: vertical blanking count value
* @vbi_cnt: vbi count * @num_active_dts: number of active dts need to configure
* @num_active_dts: number of active dts need to configure * @num_frames: number of output frames
* @num_frames: number of output frames * @throttle_pattern: Define bubble pattern in throttler
* @qcfa_en: enable qcfa in color bar cfg * @qcfa_en: enable qcfa in color bar cfg
* @dt_cfg: dt configuration values * @dt_cfg: dt configuration values
* *
*/ */
struct cam_top_tpg_cfg { struct cam_top_tpg_cfg {
@@ -91,10 +91,10 @@ struct cam_top_tpg_cfg {
uint32_t vc_num[4]; uint32_t vc_num[4];
uint32_t v_blank_count; uint32_t v_blank_count;
uint32_t h_blank_count; uint32_t h_blank_count;
uint32_t vbi_cnt;
uint32_t num_active_dts; uint32_t num_active_dts;
uint32_t num_frames; uint32_t num_frames;
uint32_t vc_dt_pattern_id; uint32_t vc_dt_pattern_id;
uint32_t throttle_pattern;
uint32_t qcfa_en; uint32_t qcfa_en;
struct cam_top_tpg_dt_cfg dt_cfg[4]; struct cam_top_tpg_dt_cfg dt_cfg[4];
}; };

19
drivers/cam_isp/isp_hw_mgr/isp_hw/top_tpg/cam_top_tpg_ver3.c
View File

@@ -79,10 +79,16 @@ static int cam_top_tpg_ver3_process_cmd(void *hw_priv,
tpg_data->pix_pattern = core_cfg->pix_pattern; tpg_data->pix_pattern = core_cfg->pix_pattern;
tpg_data->vc_dt_pattern_id = core_cfg->vc_dt_pattern_id; tpg_data->vc_dt_pattern_id = core_cfg->vc_dt_pattern_id;
tpg_data->qcfa_en = core_cfg->qcfa_en; tpg_data->qcfa_en = core_cfg->qcfa_en;
tpg_data->h_blank_count = core_cfg->hbi_clk_cnt;
tpg_data->v_blank_count = core_cfg->vbi_clk_cnt;
if (core_cfg->throttle_pattern <= 0xFFFF)
tpg_data->throttle_pattern = core_cfg->throttle_pattern;
CAM_DBG(CAM_ISP, CAM_DBG(CAM_ISP,
"pattern_id: 0x%x pix_pattern: 0x%x qcfa_en: 0x%x", "pattern_id: 0x%x pix_pattern: 0x%x qcfa_en: 0x%x hbi: 0x%x vbi: 0x%x throttle: 0x%x",
tpg_data->vc_dt_pattern_id, tpg_data->pix_pattern, tpg_data->vc_dt_pattern_id, tpg_data->pix_pattern,
tpg_data->qcfa_en); tpg_data->qcfa_en, tpg_data->h_blank_count,
tpg_data->v_blank_count, tpg_data->throttle_pattern);
break; break;
default: default:
CAM_ERR(CAM_ISP, "Invalid TPG cmd type %u", cmd_type); CAM_ERR(CAM_ISP, "Invalid TPG cmd type %u", cmd_type);
@@ -184,8 +190,6 @@ static int cam_top_tpg_ver3_reserve(
if (!tpg_hw->reserve_cnt) { if (!tpg_hw->reserve_cnt) {
tpg_data->phy_sel = reserv->in_port->lane_type; tpg_data->phy_sel = reserv->in_port->lane_type;
tpg_data->num_active_lanes = reserv->in_port->lane_num; tpg_data->num_active_lanes = reserv->in_port->lane_num;
tpg_data->h_blank_count = reserv->in_port->hbi_cnt;
tpg_data->v_blank_count = 600;
} }
for (i = 0; i < reserv->in_port->num_valid_vc_dt; i++) { for (i = 0; i < reserv->in_port->num_valid_vc_dt; i++) {
@@ -335,6 +339,13 @@ static int cam_top_tpg_ver3_start(
i, val); i, val);
} }
if (tpg_data->throttle_pattern)
cam_io_w_mb(tpg_data->throttle_pattern,
soc_info->reg_map[0].mem_base + tpg_reg->tpg_throttle);
else
cam_io_w_mb(0x1111,
soc_info->reg_map[0].mem_base + tpg_reg->tpg_throttle);
cam_io_w_mb(1, soc_info->reg_map[0].mem_base + cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
tpg_reg->tpg_top_irq_mask); tpg_reg->tpg_top_irq_mask);

8
include/uapi/camera/media/cam_isp.h
View File

@@ -779,6 +779,9 @@ struct cam_isp_sfe_init_scratch_buf_config {
* @vc_dt_pattern_id : TPG pattern - SparsePD, sHDR etc. * @vc_dt_pattern_id : TPG pattern - SparsePD, sHDR etc.
* @qcfa_en : Selects qcfa in color bar * @qcfa_en : Selects qcfa in color bar
* @pix_pattern : Pix pattern color bar cfg * @pix_pattern : Pix pattern color bar cfg
* @hbi_clk_cnt : Number of HBI # of cycles
* @vbi_clk_cnt : Number of VBI # of cycles
* @throttle_pattern : Defines bubble pattern in throttler
* @tpg_params : TPG params for future use * @tpg_params : TPG params for future use
*/ */
struct cam_isp_tpg_core_config { struct cam_isp_tpg_core_config {
@@ -786,7 +789,10 @@ struct cam_isp_tpg_core_config {
__u32 vc_dt_pattern_id; __u32 vc_dt_pattern_id;
__u32 qcfa_en; __u32 qcfa_en;
__u32 pix_pattern; __u32 pix_pattern;
__u32 tpg_params[6]; __u32 hbi_clk_cnt;
__u32 vbi_clk_cnt;
__u32 throttle_pattern;
__u32 tpg_params[3];
} __attribute__((packed)); } __attribute__((packed));
/** /**