From 9bacc5d1247063f0c1f3200e5104720672081eec Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Thu, 27 Jan 2022 11:30:09 -0800 Subject: [PATCH] video: driver: Add HFI and internal buffer changes for AV1 DRAP Add changes for AV1 DRAP (Delayed Random Access Point) handling: 1) Add config in kalama database to control DRAP and the HFI property to set DRAP config. 2) Update buffer calculations: - When DRAP is disabled, COMV buffer must be allocated and PERSIST buffer must be allocated with total_ref_count = 0 - When DRAP is enabled, COMV buffer must not be allocated - it is part of PERSIST buffer. Persist buffer must be allocated with the max_width, max_height and total_ref_count configured for DRAP. Change-Id: I2d2e8fd3f63ea8f9fc2845acd0b4e16ba4776a6b Signed-off-by: Mihir Ganu --- driver/platform/kalama/src/msm_vidc_kalama.c | 5 +++ driver/variant/iris3/inc/hfi_buffer_iris3.h | 24 ++++++++--- .../variant/iris3/src/msm_vidc_buffer_iris3.c | 41 +++++++++++++++---- driver/vidc/inc/hfi_property.h | 4 ++ driver/vidc/inc/msm_vidc_internal.h | 1 + driver/vidc/src/msm_vdec.c | 30 ++++++++++++++ driver/vidc/src/msm_vidc_buffer.c | 3 +- driver/vidc/src/msm_vidc_driver.c | 1 + 8 files changed, 95 insertions(+), 14 deletions(-) diff --git a/driver/platform/kalama/src/msm_vidc_kalama.c b/driver/platform/kalama/src/msm_vidc_kalama.c index 541f0edfa3..182731ea2f 100644 --- a/driver/platform/kalama/src/msm_vidc_kalama.c +++ b/driver/platform/kalama/src/msm_vidc_kalama.c @@ -1484,6 +1484,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = { 0, HFI_PROP_AV1_SUPER_BLOCK_ENABLED}, + {DRAP, DEC, AV1, + 0, S32_MAX, 1, 0, + 0, + HFI_PROP_AV1_DRAP_CONFIG}, + {META_BITSTREAM_RESOLUTION, DEC, AV1, V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE, 1, V4L2_MPEG_MSM_VIDC_DISABLE, diff --git a/driver/variant/iris3/inc/hfi_buffer_iris3.h b/driver/variant/iris3/inc/hfi_buffer_iris3.h index 68c017e9a5..ed93f559fc 100644 --- a/driver/variant/iris3/inc/hfi_buffer_iris3.h +++ b/driver/variant/iris3/inc/hfi_buffer_iris3.h @@ -880,6 +880,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ #define AV1D_LCU_MIN_SIZE_PELS 64 #define AV1D_MAX_TILE_COLS 64 +#define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \ + _yuv_bufcount_min) \ + do { \ + _size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \ + ((frame_height + 63) / 64) * 512, \ + ((frame_width + 127) / 128) * \ + ((frame_height + 127) / 128) * 2816), \ + VENUS_DMA_ALIGNMENT); \ + _size *= _yuv_bufcount_min; \ + } while (0) + #define SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height) \ (HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) * ((16 * 10) >> 3) + \ HFI_ALIGN(frame_width, AV1D_LCU_MAX_SIZE_PELS) / 2 * ((16 * 6) >> 3) * 2) @@ -1135,15 +1146,18 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \ (((8192 + 127) / 128) * ((4352 + 127) / 128) * \ AV1D_SIZE_BSE_COL_MV_128x128)) -#define HFI_BUFFER_PERSIST_AV1D(_size) \ +#define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \ do \ { \ - _size = HFI_ALIGN(SIZE_AV1D_SEQUENCE_HEADER * 2 + \ - SIZE_AV1D_METADATA + \ + HFI_U32 comv_size; \ + HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \ + _size = \ + HFI_ALIGN((SIZE_AV1D_SEQUENCE_HEADER * 2 + \ + SIZE_AV1D_METADATA + \ AV1D_NUM_HW_PIC_BUF * (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM) + \ AV1D_NUM_FRAME_HEADERS * (SIZE_AV1D_FRAME_HEADER + \ - 2 * SIZE_AV1D_PROB_TABLE) + \ - AV1D_NUM_HW_PIC_BUF * 2 * SIZE_AV1D_COL_MV, VENUS_DMA_ALIGNMENT); \ + 2 * SIZE_AV1D_PROB_TABLE) + \ + comv_size), VENUS_DMA_ALIGNMENT); \ } while (0) #define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \ diff --git a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c index 3d77884927..66b77c8005 100644 --- a/driver/variant/iris3/src/msm_vidc_buffer_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_buffer_iris3.c @@ -69,7 +69,7 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) { u32 size = 0; u32 width, height, out_min_count, vpp_delay; - struct v4l2_format* f; + struct v4l2_format *f; if (!inst || !inst->core) { d_vpr_e("%s: invalid params\n", __func__); @@ -86,10 +86,21 @@ static u32 msm_vidc_decoder_comv_size_iris3(struct msm_vidc_inst* inst) out_min_count = inst->buffers.output.min_count; out_min_count = max(vpp_delay + 1, out_min_count); - if (inst->codec == MSM_VIDC_H264) + if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_COMV_H264D(size, width, height, out_min_count); - else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { HFI_BUFFER_COMV_H265D(size, width, height, out_min_count); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. + * When DRAP is disabled, COMV buffer must be allocated. + */ + if (inst->capabilities->cap[DRAP].value) + size = 0; + else + HFI_BUFFER_COMV_AV1D(size, width, height, out_min_count); + } i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; @@ -195,14 +206,28 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst) return size; } - if (inst->codec == MSM_VIDC_H264) + if (inst->codec == MSM_VIDC_H264) { HFI_BUFFER_PERSIST_H264D(size); - else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) + } else if (inst->codec == MSM_VIDC_HEVC || inst->codec == MSM_VIDC_HEIC) { HFI_BUFFER_PERSIST_H265D(size); - else if (inst->codec == MSM_VIDC_VP9) + } else if (inst->codec == MSM_VIDC_VP9) { HFI_BUFFER_PERSIST_VP9D(size); - else if (inst->codec == MSM_VIDC_AV1) - HFI_BUFFER_PERSIST_AV1D(size); + } else if (inst->codec == MSM_VIDC_AV1) { + /* + * When DRAP is enabled, COMV buffer is part of PERSIST buffer and + * should not be allocated separately. PERSIST buffer should include + * COMV buffer calculated with width, height, refcount. + * When DRAP is disabled, COMV buffer should not be included in PERSIST + * buffer. + */ + if (inst->capabilities->cap[DRAP].value) + HFI_BUFFER_PERSIST_AV1D(size, + inst->capabilities->cap[FRAME_WIDTH].max, + inst->capabilities->cap[FRAME_HEIGHT].max, 16); + else + HFI_BUFFER_PERSIST_AV1D(size, 0, 0, 0); + } + i_vpr_l(inst, "%s: size %d\n", __func__, size); return size; } diff --git a/driver/vidc/inc/hfi_property.h b/driver/vidc/inc/hfi_property.h index 1e4eadb4f9..0ac667a759 100644 --- a/driver/vidc/inc/hfi_property.h +++ b/driver/vidc/inc/hfi_property.h @@ -540,6 +540,8 @@ enum hfi_nal_length_field_type { #define HFI_PROP_OPB_ENABLE 0x03000184 +#define HFI_PROP_AV1_DRAP_CONFIG 0x03000189 + #define HFI_PROP_END 0x03FFFFFF #define HFI_SESSION_ERROR_BEGIN 0x04000000 @@ -556,6 +558,8 @@ enum hfi_nal_length_field_type { #define HFI_ERROR_BUFFER_NOT_SET 0x04000006 +#define HFI_ERROR_DRAP_CONFIG_EXCEED 0x04000007 + #define HFI_SESSION_ERROR_END 0x04FFFFFF #define HFI_SYSTEM_ERROR_BEGIN 0x05000000 diff --git a/driver/vidc/inc/msm_vidc_internal.h b/driver/vidc/inc/msm_vidc_internal.h index b357ff2a98..3d0adb460f 100644 --- a/driver/vidc/inc/msm_vidc_internal.h +++ b/driver/vidc/inc/msm_vidc_internal.h @@ -458,6 +458,7 @@ enum msm_vidc_inst_capability_type { DPB_LIST, FILM_GRAIN, SUPER_BLOCK, + DRAP, ALL_INTRA, INPUT_METADATA_FD, META_BITSTREAM_RESOLUTION, diff --git a/driver/vidc/src/msm_vdec.c b/driver/vidc/src/msm_vdec.c index b3f4f7e419..14268e9c6a 100644 --- a/driver/vidc/src/msm_vdec.c +++ b/driver/vidc/src/msm_vdec.c @@ -886,6 +886,32 @@ static int msm_vdec_set_av1_operating_point(struct msm_vidc_inst *inst, return rc; } +static int msm_vdec_set_av1_drap_config(struct msm_vidc_inst *inst, + enum msm_vidc_port_type port) +{ + int rc = 0; + u32 drap_config; + + if (inst->codec != MSM_VIDC_AV1) + return 0; + + drap_config = inst->capabilities->cap[DRAP].value; + i_vpr_h(inst, "%s: drap_config: %u\n", __func__, drap_config); + rc = venus_hfi_session_property(inst, + HFI_PROP_AV1_DRAP_CONFIG, + HFI_HOST_FLAGS_NONE, + get_hfi_port(inst, port), + HFI_PAYLOAD_U32, + &drap_config, + sizeof(u32)); + if (rc) { + i_vpr_e(inst, "%s: set property failed\n", __func__); + return rc; + } + + return rc; +} + static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) { int rc = 0; @@ -935,6 +961,10 @@ static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst) if (rc) return rc; + rc = msm_vdec_set_av1_drap_config(inst, INPUT_PORT); + if (rc) + return rc; + return rc; } diff --git a/driver/vidc/src/msm_vidc_buffer.c b/driver/vidc/src/msm_vidc_buffer.c index 8e92c66e55..e4adcfec42 100644 --- a/driver/vidc/src/msm_vidc_buffer.c +++ b/driver/vidc/src/msm_vidc_buffer.c @@ -187,7 +187,8 @@ u32 msm_vidc_internal_buffer_count(struct msm_vidc_inst *inst, buffer_type == MSM_VIDC_BUF_NON_COMV) { if (inst->codec == MSM_VIDC_H264 || inst->codec == MSM_VIDC_HEVC || - inst->codec == MSM_VIDC_HEIC) + inst->codec == MSM_VIDC_HEIC || + inst->codec == MSM_VIDC_AV1) count = 1; else count = 0; diff --git a/driver/vidc/src/msm_vidc_driver.c b/driver/vidc/src/msm_vidc_driver.c index 96780f1c81..5fa4c8d749 100644 --- a/driver/vidc/src/msm_vidc_driver.c +++ b/driver/vidc/src/msm_vidc_driver.c @@ -175,6 +175,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = { {DPB_LIST, "DPB_LIST" }, {FILM_GRAIN, "FILM_GRAIN" }, {SUPER_BLOCK, "SUPER_BLOCK" }, + {DRAP, "DRAP" }, {ALL_INTRA, "ALL_INTRA" }, {INPUT_METADATA_FD, "INPUT_METADATA_FD" }, {META_BITSTREAM_RESOLUTION, "META_BITSTREAM_RESOLUTION" },