UPSTREAM: 11/12/19: Merge 'quic/camera-kernel.lnx.1.0' into 'quic/camera-kernel.lnx.4.0'
* quic/camera-kernel.lnx.1.0: msm: camera: common: Update uapi to support custom hw features msm: camera: ife: calculate accurate boot timestamp at CSID SOF msm: camera: cpas: Update ife_rd safe lut value msm: camera: sensor: Remove true/false redefinitions msm: camera: reqmgr: Add support to modify timer for long exposure msm: camera: reqmgr: Add provision to obtain exposure time msm: camera: cpas: Fix TCSR Register programming msm: camera: cci: Fix cam_cci_get_subdev for conditional compilation msm: camera: utils: Remove deprecated clk_set_flag functions msm: camera: csiphy: Update DPHY combo mode sequence msm: camera: csiphy: Correct Dphy mission mode sequence msm: camera: core: Fix extraneous variable declaration msm: camera: icp: Remove qcom soc dependency msm: camera: sync: Dump fence info in case of fence exhaust msm: camera: icp: Use CAM_PERF for clock, bw related logs msm: camera: common: va_end should follow va_start msm: camera: common: Fix integer overflow in shift msm: camera: reqmgr: Remove division on uint64_t msm: camera: isp: Improve isp substate logging msm: camera: isp: Limit sof_in_epoch log to first frame msm: camera: jpeg: Add plane stride & slice height debug info msm: camera: isp: Change state immediately in flush msm: camera: isp: Dump isp req for cdm timeout msm: camera: ife: Add packing format support msm: camera: icp: Fix AHB, AXI voting in icp msm: camera: ife: Remove duplicate add to port counters msm: camera: csiphy: Update CPHY 3-phase registers for CSIPHY v1.2 Change-Id: I93948d5cfcf2c8dea921d34696456490abd6f1e5 Signed-off-by: Abhijit Trivedi <abhijitt@codeaurora.org>
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@@ -25,6 +25,24 @@ struct sync_device *sync_dev;
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*/
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static bool trigger_cb_without_switch;
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static void cam_sync_print_fence_table(void)
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{
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int idx;
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for (idx = 0; idx < CAM_SYNC_MAX_OBJS; idx++) {
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spin_lock_bh(&sync_dev->row_spinlocks[idx]);
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CAM_INFO(CAM_SYNC,
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"index[%u]: sync_id=%d, name=%s, type=%d, state=%d, ref_cnt=%d",
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idx,
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sync_dev->sync_table[idx].sync_id,
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sync_dev->sync_table[idx].name,
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sync_dev->sync_table[idx].type,
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sync_dev->sync_table[idx].state,
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sync_dev->sync_table[idx].ref_cnt);
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spin_unlock_bh(&sync_dev->row_spinlocks[idx]);
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}
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}
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int cam_sync_create(int32_t *sync_obj, const char *name)
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{
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int rc;
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@@ -33,8 +51,13 @@ int cam_sync_create(int32_t *sync_obj, const char *name)
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do {
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idx = find_first_zero_bit(sync_dev->bitmap, CAM_SYNC_MAX_OBJS);
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if (idx >= CAM_SYNC_MAX_OBJS)
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if (idx >= CAM_SYNC_MAX_OBJS) {
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CAM_ERR(CAM_SYNC,
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"Error: Unable to create sync idx = %d reached max!",
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idx);
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cam_sync_print_fence_table();
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return -ENOMEM;
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}
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CAM_DBG(CAM_SYNC, "Index location available at idx: %ld", idx);
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bit = test_and_set_bit(idx, sync_dev->bitmap);
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} while (bit);
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