Merge "msm: camera: isp: IFE Lite top debug registers print functionality" into camera-kernel.lnx.5.0

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h

@@ -11,7 +11,7 @@
 #include "cam_vfe_bus_ver3.h"
 #include "cam_irq_controller.h"
 
-static struct cam_vfe_top_ver4_module_desc vfe_pp_mod_desc[] = {
+static struct cam_vfe_top_ver4_module_desc vfe680_pp_mod_desc[] = {
 	{
 		.id = 0,
 		.desc = "CLC_DEMUX",
@@ -326,23 +326,26 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe680_top_common_reg = {
 	.bus_violation_status     = 0x00000C64,
 	.bus_overflow_status      = 0x00000C68,
 	.top_debug_cfg            = 0x000000FC,
-	.top_debug_0              = 0x000000A0,
-	.top_debug_1              = 0x000000A4,
-	.top_debug_2              = 0x000000A8,
-	.top_debug_3              = 0x000000AC,
-	.top_debug_4              = 0x000000B0,
-	.top_debug_5              = 0x000000B4,
-	.top_debug_6              = 0x000000B8,
-	.top_debug_7              = 0x000000BC,
-	.top_debug_8              = 0x000000C0,
-	.top_debug_9              = 0x000000C4,
-	.top_debug_10             = 0x000000C8,
-	.top_debug_11             = 0x000000CC,
-	.top_debug_12             = 0x000000D0,
-	.top_debug_13             = 0x000000D4,
-	.top_debug_14             = 0x000000D8,
-	.top_debug_15             = 0x000000DC,
-	.top_debug_16             = 0x000000E0,
+	.num_top_debug_reg        = 17,
+	.top_debug = {
+		0x000000A0,
+		0x000000A4,
+		0x000000A8,
+		0x000000AC,
+		0x000000B0,
+		0x000000B4,
+		0x000000B8,
+		0x000000BC,
+		0x000000C0,
+		0x000000C4,
+		0x000000C8,
+		0x000000CC,
+		0x000000D0,
+		0x000000D4,
+		0x000000D8,
+		0x000000DC,
+		0x000000E0,
+	},
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe_common_reg_data = {
@@ -360,19 +363,19 @@ static struct cam_vfe_ver4_path_reg_data vfe680_vfe_full_rdi_reg_data[3] = {
 	{
 		.sof_irq_mask                    = 0x100,
 		.eof_irq_mask                    = 0x200,
-		.error_irq_mask                 = 0x10000000,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
 	},
 	{
 		.sof_irq_mask                    = 0x400,
 		.eof_irq_mask                    = 0x800,
-		.error_irq_mask                 = 0x10000000,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
 	},
 	{
 		.sof_irq_mask                    = 0x1000,
 		.eof_irq_mask                    = 0x2000,
-		.error_irq_mask                 = 0x10000000,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
 	},
 };
@@ -380,7 +383,7 @@ static struct cam_vfe_ver4_path_reg_data vfe680_vfe_full_rdi_reg_data[3] = {
 static struct cam_vfe_ver4_path_reg_data vfe680_pdlib_reg_data = {
 	.sof_irq_mask                    = 0x100,
 	.eof_irq_mask                    = 0x200,
-	.error_irq_mask                 = 0x10000000,
+	.error_irq_mask                  = 0x0,
 	.enable_diagnostic_hw            = 0x1,
 };
 
@@ -412,7 +415,7 @@ static struct cam_vfe_top_ver4_hw_info vfe680_top_hw_info = {
 	.vfe_full_hw_info = {
 		.common_reg     = &vfe680_top_common_reg,
 		.reg_data       = &vfe_common_reg_data,
-		.module_desc    = vfe_pp_mod_desc,
+		.module_desc    = vfe680_pp_mod_desc,
 	},
 	.pdlib_hw_info = {
 		.common_reg     = &vfe680_top_common_reg,

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite68x.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */
 
 
@@ -12,6 +12,21 @@
 #include "cam_vfe_bus_ver3.h"
 #include "cam_irq_controller.h"
 
+static struct cam_vfe_top_ver4_module_desc vfe68x_pp_mod_desc[] = {
+	{
+		.id = 0,
+		.desc = "CLC_BLS",
+	},
+	{
+		.id = 1,
+		.desc = "CLC_GLUT",
+	},
+	{
+		.id = 2,
+		.desc = "CLC_STATS_BG",
+	},
+};
+
 static struct cam_irq_register_set vfe68x_top_irq_reg_set[3] = {
 	{
 		.mask_reg_offset   = 0x00001024,
@@ -42,21 +57,27 @@ static struct cam_vfe_top_ver4_reg_offset_common vfe68x_top_common_reg = {
 	.diag_sensor_status_0     = 0x00001044,
 	.diag_sensor_status_1     = 0x00001048,
 	.violation_status         = 0x00001054,
+	.bus_violation_status     = 0x00001264,
+	.bus_overflow_status      = 0x00001268,
 	.top_debug_cfg            = 0x00001074,
-	.top_debug_0              = 0x0000105C,
-	.top_debug_1              = 0x00001060,
-	.top_debug_2              = 0x00001064,
-	.top_debug_3              = 0x00001068,
-	.top_debug_4              = 0x0000106C,
+	.num_top_debug_reg        = 5,
+	.top_debug                = {
+		0x0000105C,
+		0x00001060,
+		0x00001064,
+		0x00001068,
+		0x0000106C,
+	},
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe68x_ipp_reg_data =
 {
 	.sof_irq_mask                    = 0x1,
 	.eof_irq_mask                    = 0x2,
-	.error_irq_mask                  = 0x3,
+	.error_irq_mask                  = 0x2,
 	.enable_diagnostic_hw            = 0x1,
-	.top_debug_cfg_en                = 0x1,
+	.top_debug_cfg_en                = 0x3,
+	.pp_violation_mask               = 0x10,
 };
 
 static struct cam_vfe_ver4_path_reg_data vfe68x_rdi_reg_data[4] = {
@@ -64,30 +85,30 @@ static struct cam_vfe_ver4_path_reg_data vfe68x_rdi_reg_data[4] = {
 	{
 		.sof_irq_mask                    = 0x4,
 		.eof_irq_mask                    = 0x8,
-		.error_irq_mask                 = 0x1,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
-		.top_debug_cfg_en                = 0x1,
+		.top_debug_cfg_en                = 0x3,
 	},
 	{
 		.sof_irq_mask                    = 0x10,
 		.eof_irq_mask                    = 0x20,
-		.error_irq_mask                 = 0x1,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
-		.top_debug_cfg_en                = 0x1,
+		.top_debug_cfg_en                = 0x3,
 	},
 	{
 		.sof_irq_mask                    = 0x40,
 		.eof_irq_mask                    = 0x80,
-		.error_irq_mask                 = 0x1,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
-		.top_debug_cfg_en                = 0x1,
+		.top_debug_cfg_en                = 0x3,
 	},
 	{
 		.sof_irq_mask                    = 0x100,
 		.eof_irq_mask                    = 0x200,
-		.error_irq_mask                 = 0x1,
+		.error_irq_mask                  = 0x0,
 		.enable_diagnostic_hw            = 0x1,
-		.top_debug_cfg_en                = 0x1,
+		.top_debug_cfg_en                = 0x3,
 	},
 };
 
@@ -121,6 +142,7 @@ static struct cam_vfe_top_ver4_hw_info vfe68x_top_hw_info = {
 	.vfe_full_hw_info = {
 		.common_reg     = &vfe68x_top_common_reg,
 		.reg_data       = &vfe68x_ipp_reg_data,
+		.module_desc    = vfe68x_pp_mod_desc,
 	},
 	.num_mux = 5,
 	.mux_type = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver4.c

@@ -23,8 +23,8 @@
 #define CAM_VFE_LITE_HW_RESET_HW_VAL          0x00000001
 #define CAM_CDM_WAIT_COMP_EVENT_BIT           0x2
 
-#define CAM_VFE_CAMIF_IRQ_SOF_DEBUG_CNT_MAX 2
-
+#define CAM_VFE_CAMIF_IRQ_SOF_DEBUG_CNT_MAX   2
+#define CAM_VFE_LEN_LOG_BUF                   256
 
 struct cam_vfe_mux_ver4_data {
 	void __iomem                                *mem_base;
@@ -34,6 +34,7 @@ struct cam_vfe_mux_ver4_data {
 	struct cam_vfe_top_common_cfg                cam_common_cfg;
 	struct cam_vfe_ver4_path_reg_data           *reg_data;
 	struct cam_vfe_top_ver4_module_desc         *module_desc;
+	uint8_t                                      log_buf[CAM_VFE_LEN_LOG_BUF];
 
 	cam_hw_mgr_event_cb_func             event_cb;
 	void                                *priv;
@@ -511,67 +512,39 @@ static void cam_vfe_top_ver4_print_debug_reg_status(
 	struct cam_vfe_mux_ver4_data            *mux_data,
 	uint32_t                                *irq_status)
 {
-	uint32_t val0, val1, val2, val3;
-
-	val0 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_0);
-	val1 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_1);
-	val2 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_2);
-	val3 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_3);
-
-	CAM_INFO(CAM_ISP,
-		"status_0: 0x%x status_1: 0x%x status_2: 0x%x status_3: 0x%x",
-		val0, val1, val2, val3);
-
-	val0 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_4);
-	val1 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_5);
-	val2 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_6);
-	val3 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_7);
-
-	CAM_INFO(CAM_ISP,
-		"status_4: 0x%x status_5: 0x%x status_6: 0x%x status_7: 0x%x",
-		val0, val1, val2, val3);
-
-	val0 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_8);
-	val1 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_9);
-	val2 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_10);
-	val3 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_11);
-	CAM_INFO(CAM_ISP,
-		"status_8: 0x%x status_9: 0x%x status_10: 0x%x status_11: 0x%x",
-		val0, val1, val2, val3);
-
-	val0 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_12);
-	val1 = cam_io_r(mux_data->mem_base +
-		mux_data->common_reg->top_debug_13);
-	CAM_INFO(CAM_ISP, "status_12: 0x%x status_13: 0x%x",
-		val0, val1);
+	uint32_t val, num_reg = mux_data->common_reg->num_top_debug_reg;
+	int i = 0, j, len = 0;
+	uint8_t *log_buf = mux_data->log_buf;
+
+	while (i < num_reg) {
+		len += scnprintf(log_buf + len, CAM_VFE_LEN_LOG_BUF - len,
+				"VFE[%u]: Top Debug Status",
+				mux_data->hw_intf->hw_idx);
+		for(j = 0; j < 4 && i < num_reg; j++, i++) {
+			val = cam_io_r(mux_data->mem_base +
+				mux_data->common_reg->top_debug[i]);
+			len += scnprintf(log_buf + len, CAM_VFE_LEN_LOG_BUF -
+				len, "\nstatus %2d : 0x%08x", i, val);
+		}
+		CAM_INFO(CAM_ISP, "%s", log_buf);
+		len = 0;
+		memset(log_buf, 0, sizeof(uint8_t)*CAM_VFE_LEN_LOG_BUF);
+	}
 
 	if (irq_status[CAM_IFE_IRQ_CAMIF_REG_STATUS0] &&
 		mux_data->reg_data->pp_violation_mask) {
 
-		val0 =  cam_io_r(mux_data->mem_base +
+		val =  cam_io_r(mux_data->mem_base +
 				mux_data->common_reg->violation_status),
 
 		CAM_ERR(CAM_ISP, "VFE[%u] PP Violation status 0x%x",
-		     mux_data->hw_intf->hw_idx, val0);
+		     mux_data->hw_intf->hw_idx, val);
 
 		if (mux_data->module_desc)
 			CAM_ERR(CAM_ISP, "VFE[%u] PP Violation Module[%u] %s",
 				mux_data->hw_intf->hw_idx,
-				mux_data->module_desc[val0].id,
-				mux_data->module_desc[val0].desc);
+				mux_data->module_desc[val].id,
+				mux_data->module_desc[val].desc);
 	}
 
 	CAM_ERR(CAM_ISP, "VFE[%u] Bus overflow status 0x%x",
@@ -962,7 +935,7 @@ static int cam_vfe_handle_irq_bottom_half(void *handler_priv,
 
 	if (irq_status[CAM_IFE_IRQ_CAMIF_REG_STATUS0]
 		& vfe_priv->reg_data->error_irq_mask) {
-		CAM_ERR(CAM_ISP, "VFE:%d Overflow", evt_info.hw_idx);
+		CAM_ERR(CAM_ISP, "VFE:%d Error", evt_info.hw_idx);
 
 		ktime_get_boottime_ts64(&ts);
 		CAM_INFO(CAM_ISP,

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver4.h

@@ -22,9 +22,9 @@
 #define CAM_SHIFT_TOP_CORE_VER_4_CFG_DSP_MODE          9
 #define CAM_SHIFT_TOP_CORE_VER_4_CFG_DSP_EN            8
 
-#define CAM_VFE_RDI_VER2_MAX 4
-#define CAM_VFE_CAMIF_LITE_EVT_MAX 256
-
+#define CAM_VFE_RDI_VER2_MAX                           4
+#define CAM_VFE_CAMIF_LITE_EVT_MAX                     256
+#define CAM_VFE_TOP_DBG_REG_MAX                        17
 
 struct cam_vfe_top_ver4_reg_offset_common {
 	uint32_t hw_version;
@@ -68,23 +68,8 @@ struct cam_vfe_top_ver4_reg_offset_common {
 	uint32_t epoch1_pattern_cfg;
 	uint32_t epoch_height_cfg;
 	uint32_t top_debug_cfg;
-	uint32_t top_debug_0;
-	uint32_t top_debug_1;
-	uint32_t top_debug_2;
-	uint32_t top_debug_3;
-	uint32_t top_debug_4;
-	uint32_t top_debug_5;
-	uint32_t top_debug_6;
-	uint32_t top_debug_7;
-	uint32_t top_debug_8;
-	uint32_t top_debug_9;
-	uint32_t top_debug_10;
-	uint32_t top_debug_11;
-	uint32_t top_debug_12;
-	uint32_t top_debug_13;
-	uint32_t top_debug_14;
-	uint32_t top_debug_15;
-	uint32_t top_debug_16;
+	uint32_t num_top_debug_reg;
+	uint32_t top_debug[CAM_VFE_TOP_DBG_REG_MAX];
 };
 
 struct cam_vfe_top_common_cfg {