qcacmn: Enable timer based low threshold interrupt

Enable timer based low threshold interrupt for waikiki monitor
tx/rx source rings

Change-Id: I8c422b4157d0077cfa211d1b754fecbb2b98fad6
This commit is contained in:
Naga
2021-12-07 14:54:30 +05:30
committed by Madan Koyyalamudi
parent 6219f3d454
commit 984bfae507
8 changed files with 394 additions and 25 deletions

View File

@@ -1450,6 +1450,10 @@ static int dp_srng_calculate_msi_group(struct dp_soc *soc,
grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0]; grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0];
break; break;
case TX_MONITOR_BUF:
grp_mask = &soc->wlan_cfg_ctx->int_host2txmon_ring_mask[0];
break;
case TCL_DATA: case TCL_DATA:
/* CMD_CREDIT_RING is used as command in 8074 and credit in 9000 */ /* CMD_CREDIT_RING is used as command in 8074 and credit in 9000 */
case TCL_CMD_CREDIT: case TCL_CMD_CREDIT:
@@ -2402,8 +2406,7 @@ static int dp_process_lmac_rings(struct dp_intr *int_ctx, int total_budget)
remaining_quota = budget; remaining_quota = budget;
} }
if (int_ctx->host2rxdma_ring_mask & if (int_ctx->host2rxdma_ring_mask & (1 << mac_for_pdev)) {
(1 << mac_for_pdev)) {
union dp_rx_desc_list_elem_t *desc_list = NULL; union dp_rx_desc_list_elem_t *desc_list = NULL;
union dp_rx_desc_list_elem_t *tail = NULL; union dp_rx_desc_list_elem_t *tail = NULL;
struct dp_srng *rx_refill_buf_ring; struct dp_srng *rx_refill_buf_ring;
@@ -2416,15 +2419,21 @@ static int dp_process_lmac_rings(struct dp_intr *int_ctx, int total_budget)
&soc->rx_refill_buf_ring[pdev->lmac_id]; &soc->rx_refill_buf_ring[pdev->lmac_id];
intr_stats->num_host2rxdma_ring_masks++; intr_stats->num_host2rxdma_ring_masks++;
DP_STATS_INC(pdev, replenish.low_thresh_intrs, DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
1);
dp_rx_buffers_replenish(soc, mac_for_pdev, dp_rx_buffers_replenish(soc, mac_for_pdev,
rx_refill_buf_ring, rx_refill_buf_ring,
&soc->rx_desc_buf[mac_for_pdev], &soc->rx_desc_buf[mac_for_pdev],
0, &desc_list, &tail); 0, &desc_list, &tail);
} }
} }
if (int_ctx->host2rxdma_mon_ring_mask)
dp_rx_mon_buf_refill(int_ctx);
if (int_ctx->host2txmon_ring_mask)
dp_tx_mon_buf_refill(int_ctx);
budget_done: budget_done:
return total_budget - budget; return total_budget - budget;
} }
@@ -2978,6 +2987,9 @@ static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx, wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
intr_ctx_num); intr_ctx_num);
int host2txmon_ring_mask =
wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx,
intr_ctx_num);
unsigned int vector = unsigned int vector =
(intr_ctx_num % msi_vector_count) + msi_vector_start; (intr_ctx_num % msi_vector_count) + msi_vector_start;
int num_irq = 0; int num_irq = 0;
@@ -2988,7 +3000,7 @@ static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask | rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask |
host2rxdma_ring_mask | host2rxdma_mon_ring_mask | host2rxdma_ring_mask | host2rxdma_mon_ring_mask |
rx_near_full_grp_1_mask | rx_near_full_grp_2_mask | rx_near_full_grp_1_mask | rx_near_full_grp_2_mask |
tx_ring_near_full_mask) tx_ring_near_full_mask | host2txmon_ring_mask)
irq_id_map[num_irq++] = irq_id_map[num_irq++] =
pld_get_msi_irq(soc->osdev->dev, vector); pld_get_msi_irq(soc->osdev->dev, vector);
@@ -3077,6 +3089,8 @@ static void dp_soc_interrupt_detach(struct cdp_soc_t *txrx_soc)
soc->intr_ctx[i].rx_near_full_grp_1_mask = 0; soc->intr_ctx[i].rx_near_full_grp_1_mask = 0;
soc->intr_ctx[i].rx_near_full_grp_2_mask = 0; soc->intr_ctx[i].rx_near_full_grp_2_mask = 0;
soc->intr_ctx[i].tx_ring_near_full_mask = 0; soc->intr_ctx[i].tx_ring_near_full_mask = 0;
soc->intr_ctx[i].tx_mon_ring_mask = 0;
soc->intr_ctx[i].host2txmon_ring_mask = 0;
hif_event_history_deinit(soc->hif_handle, i); hif_event_history_deinit(soc->hif_handle, i);
qdf_lro_deinit(soc->intr_ctx[i].lro_ctx); qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
@@ -3145,12 +3159,13 @@ static QDF_STATUS dp_soc_interrupt_attach(struct cdp_soc_t *txrx_soc)
int tx_ring_near_full_mask = int tx_ring_near_full_mask =
wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx, wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
i); i);
int host2txmon_ring_mask =
wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx, i);
soc->intr_ctx[i].dp_intr_id = i; soc->intr_ctx[i].dp_intr_id = i;
soc->intr_ctx[i].tx_ring_mask = tx_mask; soc->intr_ctx[i].tx_ring_mask = tx_mask;
soc->intr_ctx[i].rx_ring_mask = rx_mask; soc->intr_ctx[i].rx_ring_mask = rx_mask;
soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask; soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
soc->intr_ctx[i].tx_mon_ring_mask = tx_mon_ring_mask;
soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask; soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask; soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask; soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
@@ -3164,6 +3179,8 @@ static QDF_STATUS dp_soc_interrupt_attach(struct cdp_soc_t *txrx_soc)
rx_near_full_grp_2_mask; rx_near_full_grp_2_mask;
soc->intr_ctx[i].tx_ring_near_full_mask = soc->intr_ctx[i].tx_ring_near_full_mask =
tx_ring_near_full_mask; tx_ring_near_full_mask;
soc->intr_ctx[i].tx_mon_ring_mask = tx_mon_ring_mask;
soc->intr_ctx[i].host2txmon_ring_mask = host2txmon_ring_mask;
soc->intr_ctx[i].soc = soc; soc->intr_ctx[i].soc = soc;
@@ -14282,6 +14299,7 @@ static void dp_soc_cfg_init(struct dp_soc *soc)
soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS; soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED; soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS; soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
break; break;
default: default:
qdf_print("%s: Unknown tgt type %d\n", __func__, target_type); qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);

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@@ -855,6 +855,7 @@ struct dp_rx_tid {
* @num_reo_status_ring_masks: interrupts with reo_status_ring_mask set * @num_reo_status_ring_masks: interrupts with reo_status_ring_mask set
* @num_rxdma2host_ring_masks: interrupts with rxdma2host_ring_mask set * @num_rxdma2host_ring_masks: interrupts with rxdma2host_ring_mask set
* @num_host2rxdma_ring_masks: interrupts with host2rxdma_ring_mask set * @num_host2rxdma_ring_masks: interrupts with host2rxdma_ring_mask set
* @num_host2rxdma_mon_ring_masks: interrupts with host2rxdma_ring_mask set
* @num_rx_ring_near_full_masks: Near-full interrupts for REO DST ring * @num_rx_ring_near_full_masks: Near-full interrupts for REO DST ring
* @num_tx_comp_ring_near_full_masks: Near-full interrupts for TX completion * @num_tx_comp_ring_near_full_masks: Near-full interrupts for TX completion
* @num_rx_wbm_rel_ring_near_full_masks: total number of times the wbm rel ring * @num_rx_wbm_rel_ring_near_full_masks: total number of times the wbm rel ring
@@ -864,6 +865,9 @@ struct dp_rx_tid {
* @num_near_full_masks: total number of times the near full interrupt * @num_near_full_masks: total number of times the near full interrupt
* was received * was received
* @num_masks: total number of times the interrupt was received * @num_masks: total number of times the interrupt was received
* @num_host2txmon_ring_masks: interrupts with host2txmon_ring_mask set
* @num_near_full_masks: total number of times the interrupt was received
* @num_masks: total number of times the near full interrupt was received
* @num_tx_mon_ring_masks: interrupts with num_tx_mon_ring_masks set * @num_tx_mon_ring_masks: interrupts with num_tx_mon_ring_masks set
* *
* Counter for individual masks are incremented only if there are any packets * Counter for individual masks are incremented only if there are any packets
@@ -878,10 +882,12 @@ struct dp_intr_stats {
uint32_t num_reo_status_ring_masks; uint32_t num_reo_status_ring_masks;
uint32_t num_rxdma2host_ring_masks; uint32_t num_rxdma2host_ring_masks;
uint32_t num_host2rxdma_ring_masks; uint32_t num_host2rxdma_ring_masks;
uint32_t num_host2rxdma_mon_ring_masks;
uint32_t num_rx_ring_near_full_masks[MAX_REO_DEST_RINGS]; uint32_t num_rx_ring_near_full_masks[MAX_REO_DEST_RINGS];
uint32_t num_tx_comp_ring_near_full_masks[MAX_TCL_DATA_RINGS]; uint32_t num_tx_comp_ring_near_full_masks[MAX_TCL_DATA_RINGS];
uint32_t num_rx_wbm_rel_ring_near_full_masks; uint32_t num_rx_wbm_rel_ring_near_full_masks;
uint32_t num_reo_status_ring_near_full_masks; uint32_t num_reo_status_ring_near_full_masks;
uint32_t num_host2txmon_ring__masks;
uint32_t num_near_full_masks; uint32_t num_near_full_masks;
uint32_t num_masks; uint32_t num_masks;
uint32_t num_tx_mon_ring_masks; uint32_t num_tx_mon_ring_masks;
@@ -894,7 +900,6 @@ struct dp_intr {
uint8_t rx_ring_mask; /* Rx REO rings (0-3) associated uint8_t rx_ring_mask; /* Rx REO rings (0-3) associated
with this interrupt context */ with this interrupt context */
uint8_t rx_mon_ring_mask; /* Rx monitor ring mask (0-2) */ uint8_t rx_mon_ring_mask; /* Rx monitor ring mask (0-2) */
uint8_t tx_mon_ring_mask; /* Tx monitor ring mask (0-2) */
uint8_t rx_err_ring_mask; /* REO Exception Ring */ uint8_t rx_err_ring_mask; /* REO Exception Ring */
uint8_t rx_wbm_rel_ring_mask; /* WBM2SW Rx Release Ring */ uint8_t rx_wbm_rel_ring_mask; /* WBM2SW Rx Release Ring */
uint8_t reo_status_ring_mask; /* REO command response ring */ uint8_t reo_status_ring_mask; /* REO command response ring */
@@ -908,6 +913,8 @@ struct dp_intr {
uint8_t rx_near_full_grp_2_mask; uint8_t rx_near_full_grp_2_mask;
/* WBM TX completion rings near full interrupt mask */ /* WBM TX completion rings near full interrupt mask */
uint8_t tx_ring_near_full_mask; uint8_t tx_ring_near_full_mask;
uint8_t host2txmon_ring_mask; /* Tx monitor buffer ring */
uint8_t tx_mon_ring_mask; /* Tx monitor ring mask (0-2) */
struct dp_soc *soc; /* Reference to SoC structure , struct dp_soc *soc; /* Reference to SoC structure ,
to get DMA ring handles */ to get DMA ring handles */
qdf_lro_ctx_t lro_ctx; qdf_lro_ctx_t lro_ctx;

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@@ -457,6 +457,69 @@ QDF_STATUS dp_mon_pdev_htt_srng_setup_2_0(struct dp_soc *soc,
return status; return status;
} }
QDF_STATUS dp_tx_mon_refill_buf_ring_2_0(struct dp_intr *int_ctx)
{
struct dp_soc *soc = int_ctx->soc;
union dp_mon_desc_list_elem_t *desc_list = NULL;
union dp_mon_desc_list_elem_t *tail = NULL;
struct dp_srng *tx_mon_buf_ring;
struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
struct dp_mon_soc_be *mon_soc_be = be_soc->monitor_soc_be;
struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
uint32_t num_entries_avail;
int sync_hw_ptr = 1;
void *hal_srng;
tx_mon_buf_ring = &be_soc->monitor_soc_be->tx_mon_buf_ring;
hal_srng = tx_mon_buf_ring->hal_srng;
intr_stats->num_host2txmon_ring__masks++;
mon_soc_be->tx_low_thresh_intrs++;
hal_srng_access_start(soc->hal_soc, hal_srng);
num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
hal_srng,
sync_hw_ptr);
hal_srng_access_end(soc->hal_soc, hal_srng);
dp_mon_buffers_replenish(soc, tx_mon_buf_ring,
&be_soc->monitor_soc_be->tx_desc_mon,
num_entries_avail, &desc_list, &tail);
return QDF_STATUS_SUCCESS;
}
QDF_STATUS dp_rx_mon_refill_buf_ring_2_0(struct dp_intr *int_ctx)
{
struct dp_soc *soc = int_ctx->soc;
union dp_mon_desc_list_elem_t *desc_list = NULL;
union dp_mon_desc_list_elem_t *tail = NULL;
struct dp_srng *rx_mon_buf_ring;
struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
struct dp_mon_soc_be *mon_soc_be = be_soc->monitor_soc_be;
struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
uint32_t num_entries_avail;
int sync_hw_ptr = 1;
void *hal_srng;
rx_mon_buf_ring = &soc->rxdma_mon_buf_ring[0];
hal_srng = rx_mon_buf_ring->hal_srng;
intr_stats->num_host2rxdma_ring_masks++;
mon_soc_be->rx_low_thresh_intrs++;
hal_srng_access_start(soc->hal_soc, hal_srng);
num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
hal_srng,
sync_hw_ptr);
hal_srng_access_end(soc->hal_soc, hal_srng);
dp_mon_buffers_replenish(soc, rx_mon_buf_ring,
&be_soc->monitor_soc_be->rx_desc_mon,
num_entries_avail, &desc_list, &tail);
return QDF_STATUS_SUCCESS;
}
#ifndef DISABLE_MON_CONFIG
static uint32_t static uint32_t
dp_rx_mon_process_2_0(struct dp_soc *soc, struct dp_intr *int_ctx, dp_rx_mon_process_2_0(struct dp_soc *soc, struct dp_intr *int_ctx,
uint32_t mac_id, uint32_t quota) uint32_t mac_id, uint32_t quota)
@@ -1013,3 +1076,4 @@ struct cdp_mon_ops *dp_mon_cdp_ops_get_2_0(void)
{ {
return &dp_ops_mon_2_0; return &dp_ops_mon_2_0;
} }
#endif

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@@ -1,5 +1,6 @@
/* /*
* Copyright (c) 2021, The Linux Foundation. All rights reserved. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for any * Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above * purpose with or without fee is hereby granted, provided that the above
@@ -103,6 +104,8 @@ struct dp_mon_pdev_be {
* @rx_desc_mon: descriptor pool for rx mon src ring * @rx_desc_mon: descriptor pool for rx mon src ring
* @rx_mon_ring_fill_level: rx mon ring refill level * @rx_mon_ring_fill_level: rx mon ring refill level
* @tx_mon_ring_fill_level: tx mon ring refill level * @tx_mon_ring_fill_level: tx mon ring refill level
* @tx_low_thresh_intrs: number of tx mon low threshold interrupts received
* @rx_low_thresh_intrs: number of rx mon low threshold interrupts received
*/ */
struct dp_mon_soc_be { struct dp_mon_soc_be {
struct dp_mon_soc mon_soc; struct dp_mon_soc mon_soc;
@@ -117,6 +120,8 @@ struct dp_mon_soc_be {
uint16_t rx_mon_ring_fill_level; uint16_t rx_mon_ring_fill_level;
uint16_t tx_mon_ring_fill_level; uint16_t tx_mon_ring_fill_level;
uint32_t tx_low_thresh_intrs;
uint32_t rx_low_thresh_intrs;
}; };
#endif #endif

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@@ -589,6 +589,9 @@ struct dp_mon_ops {
void (*mon_rx_populate_ppdu_info)(struct hal_rx_ppdu_info *hal_ppdu_info, void (*mon_rx_populate_ppdu_info)(struct hal_rx_ppdu_info *hal_ppdu_info,
struct cdp_rx_indication_ppdu *ppdu); struct cdp_rx_indication_ppdu *ppdu);
#endif #endif
QDF_STATUS (*rx_mon_refill_buf_ring)(struct dp_intr *int_ctx);
QDF_STATUS (*tx_mon_refill_buf_ring)(struct dp_intr *int_ctx);
}; };
struct dp_mon_soc { struct dp_mon_soc {
@@ -1838,7 +1841,7 @@ void dp_monitor_service_mon_rings(struct dp_soc *soc, uint32_t quota)
#endif #endif
/* /*
* dp_monitor_process() - Process monitor * dp_rx_monitor_process() - Process monitor
* @soc: point to soc * @soc: point to soc
* @int_ctx: interrupt ctx * @int_ctx: interrupt ctx
* @mac_id: lma * @mac_id: lma
@@ -1866,12 +1869,54 @@ uint32_t dp_monitor_process(struct dp_soc *soc, struct dp_intr *int_ctx,
return mon_soc->mon_rx_process(soc, int_ctx, mac_id, quota); return mon_soc->mon_rx_process(soc, int_ctx, mac_id, quota);
} }
static inline uint32_t static inline
dp_tx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx, uint32_t dp_tx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
uint32_t mac_id, uint32_t quota) uint32_t mac_id, uint32_t quota)
{ {
return 0; return 0;
} }
static inline
uint32_t dp_tx_mon_buf_refill(struct dp_intr *int_ctx)
{
struct dp_soc *soc = int_ctx->soc;
struct dp_mon_ops *monitor_ops;
struct dp_mon_soc *mon_soc = soc->monitor_soc;
if (!mon_soc) {
dp_mon_debug("monitor soc is NULL");
return 0;
}
monitor_ops = mon_soc->mon_ops;
if (!monitor_ops || !monitor_ops->tx_mon_refill_buf_ring) {
dp_mon_debug("callback not registered");
return 0;
}
return monitor_ops->tx_mon_refill_buf_ring(int_ctx);
}
static inline
uint32_t dp_rx_mon_buf_refill(struct dp_intr *int_ctx)
{
struct dp_soc *soc = int_ctx->soc;
struct dp_mon_ops *monitor_ops;
struct dp_mon_soc *mon_soc = soc->monitor_soc;
if (!mon_soc) {
dp_mon_debug("monitor soc is NULL");
return 0;
}
monitor_ops = mon_soc->mon_ops;
if (!monitor_ops || !monitor_ops->rx_mon_refill_buf_ring) {
dp_mon_debug("callback not registered");
return 0;
}
return monitor_ops->rx_mon_refill_buf_ring(int_ctx);
}
#else #else
static inline static inline
uint32_t dp_monitor_process(struct dp_soc *soc, struct dp_intr *int_ctx, uint32_t dp_monitor_process(struct dp_soc *soc, struct dp_intr *int_ctx,
@@ -1886,6 +1931,16 @@ dp_tx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
{ {
return 0; return 0;
} }
static inline
uint32_t dp_tx_mon_buf_refill(struct dp_intr *int_ctx)
{
}
static inline
uint32_t dp_rx_mon_buf_refill(struct dp_intr *int_ctx)
{
}
#endif #endif
/* /*

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@@ -350,10 +350,6 @@
#define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48
#define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 4096 #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 4096
#define WLAN_CFG_TX_MONITOR_BUF_SIZE 2048
#define WLAN_CFG_TX_MONITOR_BUF_SIZE_MIN 48
#define WLAN_CFG_TX_MONITOR_BUF_SIZE_MAX 8192
#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
#define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192 #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192

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@@ -61,6 +61,8 @@
#define WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1 0x2 #define WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1 0x2
#define WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2 0x4 #define WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2 0x4
#define WLAN_CFG_HOST2TXMON_RING_MASK_0 0x1
#define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 0x1 #define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 0x1
#define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1 0x2 #define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1 0x2
#define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2 0x4 #define WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2 0x4
@@ -94,7 +96,6 @@ struct dp_int_mask_assignment {
uint8_t tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t tx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t host2rxdma_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t host2rxdma_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
@@ -105,6 +106,8 @@ struct dp_int_mask_assignment {
uint8_t rx_ring_near_full_irq_1_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t rx_ring_near_full_irq_1_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t rx_ring_near_full_irq_2_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t rx_ring_near_full_irq_2_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t tx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
}; };
#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1) #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
@@ -875,6 +878,16 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2, WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 1 MSI combination */ /* Interrupt assignment for 1 MSI combination */
{ {
@@ -935,6 +948,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2 | WLAN_CFG_REO_STATUS_RING_MASK_2 |
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0 |
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 2 MSI combination */ /* Interrupt assignment for 2 MSI combination */
{ {
@@ -995,6 +1021,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2 | WLAN_CFG_REO_STATUS_RING_MASK_2 |
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 3 MSI combination */ /* Interrupt assignment for 3 MSI combination */
{ {
@@ -1063,6 +1102,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2 | WLAN_CFG_REO_STATUS_RING_MASK_2 |
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 4 MSI combination */ /* Interrupt assignment for 4 MSI combination */
{ {
@@ -1123,6 +1175,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2, WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 5 MSI combination */ /* Interrupt assignment for 5 MSI combination */
{ {
@@ -1191,6 +1256,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2 | WLAN_CFG_REO_STATUS_RING_MASK_2 |
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 6 MSI combination */ /* Interrupt assignment for 6 MSI combination */
{ {
@@ -1252,6 +1330,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2, WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0}, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 7 MSI combination */ /* Interrupt assignment for 7 MSI combination */
{ {
@@ -1321,6 +1412,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2, WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0}, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
/* Interrupt assignment for 8 MSI combination */ /* Interrupt assignment for 8 MSI combination */
{ {
@@ -1343,10 +1447,6 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_RX_MON_RING_MASK_1, WLAN_CFG_RX_MON_RING_MASK_1,
WLAN_CFG_RX_MON_RING_MASK_2, WLAN_CFG_RX_MON_RING_MASK_2,
0, 0, 0, 0, 0}, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
/* host2rxdma ring masks */ /* host2rxdma ring masks */
{ 0, 0, 0, { 0, 0, 0,
WLAN_CFG_HOST2RXDMA_RING_MASK_0, WLAN_CFG_HOST2RXDMA_RING_MASK_0,
@@ -1394,6 +1494,19 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
WLAN_CFG_REO_STATUS_RING_MASK_2, WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3, WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0}, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0},
}, },
}; };
#endif #endif
@@ -1444,7 +1557,7 @@ struct wlan_srng_cfg wlan_srng_rxdma_monitor_status_cfg = {
struct wlan_srng_cfg wlan_srng_tx_monitor_buf_cfg = { struct wlan_srng_cfg wlan_srng_tx_monitor_buf_cfg = {
.timer_threshold = WLAN_CFG_INT_TIMER_THRESHOLD_TX, .timer_threshold = WLAN_CFG_INT_TIMER_THRESHOLD_TX,
.batch_count_threshold = 0, .batch_count_threshold = 0,
.low_threshold = WLAN_CFG_TX_MONITOR_BUF_SIZE_MAX >> 3, .low_threshold = WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX >> 3,
}; };
/* DEFAULT_CONFIG ring configuration */ /* DEFAULT_CONFIG ring configuration */
@@ -1551,6 +1664,9 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
{ {
int i = 0; int i = 0;
int interrupt_index = 0; int interrupt_index = 0;
int int_host2rxdma_mon_ring_mask;
bool host2rxmon_mask_set = false;
bool txmon_hw_support = false;
if(interrupt_mode == DP_INTR_INTEGRATED) { if(interrupt_mode == DP_INTR_INTEGRATED) {
interrupt_index = 0; interrupt_index = 0;
@@ -1566,8 +1682,6 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
dp_mask_assignment[interrupt_index].tx_ring_mask[i]; dp_mask_assignment[interrupt_index].tx_ring_mask[i];
wlan_cfg_ctx->int_rx_mon_ring_mask[i] = wlan_cfg_ctx->int_rx_mon_ring_mask[i] =
dp_mask_assignment[interrupt_index].rx_mon_ring_mask[i]; dp_mask_assignment[interrupt_index].rx_mon_ring_mask[i];
wlan_cfg_ctx->int_tx_mon_ring_mask[i] =
dp_mask_assignment[interrupt_index].tx_mon_ring_mask[i];
wlan_cfg_ctx->int_rx_err_ring_mask[i] = wlan_cfg_ctx->int_rx_err_ring_mask[i] =
dp_mask_assignment[interrupt_index].rx_err_ring_mask[i]; dp_mask_assignment[interrupt_index].rx_err_ring_mask[i];
wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] = wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
@@ -1595,6 +1709,26 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
dp_mask_assignment[interrupt_index].rx_ring_near_full_irq_2_mask[i]; dp_mask_assignment[interrupt_index].rx_ring_near_full_irq_2_mask[i];
wlan_cfg_ctx->int_tx_ring_near_full_irq_mask[i] = wlan_cfg_ctx->int_tx_ring_near_full_irq_mask[i] =
dp_mask_assignment[interrupt_index].tx_ring_near_full_irq_mask[i]; dp_mask_assignment[interrupt_index].tx_ring_near_full_irq_mask[i];
txmon_hw_support = wlan_cfg_get_txmon_hw_support(wlan_cfg_ctx);
if (txmon_hw_support) {
wlan_cfg_ctx->int_tx_mon_ring_mask[i] =
dp_mask_assignment[interrupt_index].tx_mon_ring_mask[i];
wlan_cfg_ctx->int_host2txmon_ring_mask[i] =
dp_mask_assignment[interrupt_index].host2txmon_ring_mask[i];
int_host2rxdma_mon_ring_mask =
dp_mask_assignment[interrupt_index].host2rxdma_mon_ring_mask[i];
if (int_host2rxdma_mon_ring_mask && !host2rxmon_mask_set) {
wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[interrupt_index] =
dp_mask_assignment[interrupt_index].host2rxdma_mon_ring_mask[i];
host2rxmon_mask_set = true;
}
} else {
wlan_cfg_ctx->int_tx_mon_ring_mask[i] = 0;
wlan_cfg_ctx->int_host2txmon_ring_mask[i] = 0;
wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[i] =
dp_mask_assignment[interrupt_index].host2rxdma_mon_ring_mask[i];
}
} }
} }
#endif #endif
@@ -2292,10 +2426,17 @@ int wlan_cfg_get_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
return cfg->int_rx_mon_ring_mask[context]; return cfg->int_rx_mon_ring_mask[context];
} }
#ifdef CONFIG_BERYLLIUM
int wlan_cfg_get_tx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) int wlan_cfg_get_tx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
{ {
return cfg->int_tx_mon_ring_mask[context]; return cfg->int_tx_mon_ring_mask[context];
} }
#else
int wlan_cfg_get_tx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
{
return 0;
}
#endif
int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context) int wlan_cfg_get_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg, int context)
{ {
@@ -3170,3 +3311,43 @@ wlan_cfg_set_vdev_stats_hw_offload_config(struct wlan_cfg_dp_soc_ctxt *cfg,
bool val) bool val)
{} {}
#endif #endif
#ifdef CONFIG_BERYLLIUM
int wlan_cfg_get_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context)
{
return cfg->int_host2txmon_ring_mask[context];
}
qdf_export_symbol(wlan_cfg_get_host2txmon_ring_mask);
void wlan_cfg_set_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context, int mask)
{
cfg->int_host2txmon_ring_mask[context] = mask;
}
#else
int wlan_cfg_get_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context)
{
return 0;
}
void wlan_cfg_set_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context, int mask)
{
}
#endif
qdf_export_symbol(wlan_cfg_set_host2txmon_ring_mask);
void wlan_cfg_set_txmon_hw_support(struct wlan_cfg_dp_soc_ctxt *cfg,
bool txmon_hw_support)
{
cfg->txmon_hw_support = txmon_hw_support;
}
bool wlan_cfg_get_txmon_hw_support(struct wlan_cfg_dp_soc_ctxt *cfg)
{
return cfg->txmon_hw_support;
}

View File

@@ -162,6 +162,8 @@ struct wlan_srng_cfg {
* mapped to each NAPI/INTR context * mapped to each NAPI/INTR context
* @int_tx_ring_near_full_irq_mask: Bitmap of Tx completion ring near full * @int_tx_ring_near_full_irq_mask: Bitmap of Tx completion ring near full
* interrupt mapped to each NAPI/INTR context * interrupt mapped to each NAPI/INTR context
* @int_host2txmon_ring_mask: Bitmap of Tx monitor source ring interrupt
* mapped to each NAPI/INTR context
* @int_ce_ring_mask: Bitmap of CE interrupts mapped to each NAPI/Intr context * @int_ce_ring_mask: Bitmap of CE interrupts mapped to each NAPI/Intr context
* @lro_enabled: enable/disable lro feature * @lro_enabled: enable/disable lro feature
* @rx_hash: Enable hash based steering of rx packets * @rx_hash: Enable hash based steering of rx packets
@@ -247,6 +249,7 @@ struct wlan_srng_cfg {
* @lmac_peer_id_msb: value used for hash based routing * @lmac_peer_id_msb: value used for hash based routing
* @vdev_stats_hw_offload_config: HW vdev stats config * @vdev_stats_hw_offload_config: HW vdev stats config
* @vdev_stats_hw_offload_timer: HW vdev stats timer duration * @vdev_stats_hw_offload_timer: HW vdev stats timer duration
* @txmon_hw_support: TxMON HW support
*/ */
struct wlan_cfg_dp_soc_ctxt { struct wlan_cfg_dp_soc_ctxt {
int num_int_ctxts; int num_int_ctxts;
@@ -291,6 +294,7 @@ struct wlan_cfg_dp_soc_ctxt {
uint8_t int_rx_ring_near_full_irq_1_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t int_rx_ring_near_full_irq_1_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_rx_ring_near_full_irq_2_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t int_rx_ring_near_full_irq_2_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS]; uint8_t int_tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
int hw_macid[MAX_PDEV_CNT]; int hw_macid[MAX_PDEV_CNT];
int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW]; int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW];
int base_hw_macid; int base_hw_macid;
@@ -405,6 +409,7 @@ struct wlan_cfg_dp_soc_ctxt {
int vdev_stats_hw_offload_timer; int vdev_stats_hw_offload_timer;
#endif #endif
uint8_t num_rxdma_dst_rings_per_pdev; uint8_t num_rxdma_dst_rings_per_pdev;
bool txmon_hw_support;
}; };
/** /**
@@ -2019,5 +2024,43 @@ wlan_cfg_mlo_default_rx_ring_get_by_chip_id(struct wlan_cfg_dp_soc_ctxt *cfg,
uint8_t uint8_t
wlan_cfg_mlo_lmac_peer_id_msb_get_by_chip_id(struct wlan_cfg_dp_soc_ctxt *cfg, wlan_cfg_mlo_lmac_peer_id_msb_get_by_chip_id(struct wlan_cfg_dp_soc_ctxt *cfg,
uint8_t chip_id); uint8_t chip_id);
#endif #endif
/*
* wlan_cfg_set_host2txmon_ring_mask() - Set host2txmon ring
* interrupt mask mapped to an interrupt context
* @wlan_cfg_ctx - Configuration Handle
*
* Return: None
*/
void wlan_cfg_set_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context, int mask);
/**
* wlan_cfg_get_host2txmon_ring_mask() - Return host2txmon ring
* interrupt mask mapped to an interrupt context
* @wlan_cfg_ctx - Configuration Handle
* @context - Numerical ID identifying the Interrupt/NAPI context
*
* Return: int_host2txmon_ring_mask[context]
*/
int wlan_cfg_get_host2txmon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
int context);
/**
* wlan_cfg_set_txmon_hw_support () - Set txmon hw support
* @cfg: Configuration Handle
* @txmon_hw_support: value to set
*
* Return: None
*/
void wlan_cfg_set_txmon_hw_support(struct wlan_cfg_dp_soc_ctxt *cfg,
bool txmon_hw_support);
/**
* wlan_cfg_get_txmon_hw_support () - Get txmon hw support
* @cfg: Configuration Handle
*
* Return: txmon_hw_support
*/
bool wlan_cfg_get_txmon_hw_support(struct wlan_cfg_dp_soc_ctxt *cfg);
#endif /*__WLAN_CFG_H*/ #endif /*__WLAN_CFG_H*/