msm: camera: csiphy: Enhance the csiphy reg dump

Enhance csiphy reg dump to make them more readable
and allow them to be parsed by creating a parser.

CRs-fixed: 2992807
Change-Id: Idc5cfa6aa14c90adfeeaf398fa89ded51aeea350
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
This commit is contained in:
Jigar Agrawal
2021-07-20 11:36:01 -07:00
rodzic 57b1d69e64
commit 9824e39f67
6 zmienionych plików z 76 dodań i 64 usunięć

Wyświetl plik

@@ -34,14 +34,10 @@
static DEFINE_MUTEX(active_csiphy_cnt_mutex);
static int csiphy_dump;
module_param(csiphy_dump, int, 0644);
static int csiphy_onthego_reg_count;
static unsigned int csiphy_onthego_regs[150];
module_param_array(csiphy_onthego_regs, uint, &csiphy_onthego_reg_count, 0644);
MODULE_PARM_DESC(csiphy_onthego_regs, "Functionality to program csiphy registers on the fly");
MODULE_PARM_DESC(csiphy_onthego_regs, "Functionality to let csiphy registers program on the fly");
struct g_csiphy_data {
void __iomem *base_address;
@@ -102,7 +98,7 @@ void cam_csiphy_query_cap(struct csiphy_device *csiphy_dev,
csiphy_cap->clk_lane = csiphy_dev->clk_lane;
}
int cam_csiphy_print_status_reg(struct csiphy_device *csiphy_dev)
int cam_csiphy_dump_status_reg(struct csiphy_device *csiphy_dev)
{
struct cam_hw_soc_info *soc_info;
void __iomem *phybase = NULL;
@@ -197,7 +193,7 @@ void cam_csiphy_reset(struct csiphy_device *csiphy_dev)
if (csiphy_dev->en_lane_status_reg_dump) {
CAM_INFO(CAM_CSIPHY, "Status Reg Dump after phy reset");
cam_csiphy_print_status_reg(csiphy_dev);
cam_csiphy_dump_status_reg(csiphy_dev);
}
}
@@ -658,8 +654,8 @@ irqreturn_t cam_csiphy_irq(int irq_num, void *data)
base = csiphy_dev->soc_info.reg_map[0].mem_base;
csiphy_reg = &csiphy_dev->ctrl_reg->csiphy_reg;
if (csiphy_dev->enable_irq_dump) {
cam_csiphy_status_dmp(csiphy_dev);
if (csiphy_dev->enable_irq_status_reg_dump) {
cam_csiphy_irq_status_reg_dmp(csiphy_dev);
cam_io_w_mb(0x1, base + csiphy_reg->mipi_csiphy_glbl_irq_cmd_addr);
cam_io_w_mb(0x0, base + csiphy_reg->mipi_csiphy_glbl_irq_cmd_addr);
}
@@ -1324,12 +1320,12 @@ int cam_csiphy_util_update_aon_ops(
struct cam_csiphy_aon_sel_params_t *aon_sel_params;
int rc = 0;
if (phy_idx > MAX_CSIPHY) {
if (phy_idx >= MAX_CSIPHY) {
CAM_ERR(CAM_CSIPHY, "Null device");
return -ENODEV;
}
if (g_phy_data[phy_idx].aon_sel_param == NULL) {
if (!g_phy_data[phy_idx].aon_sel_param) {
CAM_ERR(CAM_CSIPHY, "AON select parameters are null");
return -EINVAL;
}
@@ -1978,14 +1974,15 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
}
rc = cam_csiphy_update_lane(csiphy_dev, offset, true);
if (csiphy_dump == 1)
cam_csiphy_mem_dmp(&csiphy_dev->soc_info);
if (rc) {
CAM_ERR(CAM_CSIPHY,
"Update enable lane failed, rc: %d", rc);
goto release_mutex;
}
if (csiphy_dev->en_full_phy_reg_dump)
cam_csiphy_reg_dump(&csiphy_dev->soc_info);
csiphy_dev->start_dev_count++;
goto release_mutex;
}
@@ -2082,17 +2079,17 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
}
}
if (csiphy_dump == 1)
cam_csiphy_mem_dmp(&csiphy_dev->soc_info);
csiphy_dev->start_dev_count++;
if (csiphy_dev->en_full_phy_reg_dump)
cam_csiphy_reg_dump(&csiphy_dev->soc_info);
if (csiphy_dev->en_lane_status_reg_dump) {
usleep_range(50000, 50005);
CAM_INFO(CAM_CSIPHY, "Status Reg Dump after config");
cam_csiphy_print_status_reg(csiphy_dev);
cam_csiphy_dump_status_reg(csiphy_dev);
}
csiphy_dev->start_dev_count++;
CAM_DBG(CAM_CSIPHY, "START DEV CNT: %d",
csiphy_dev->start_dev_count);
csiphy_dev->csiphy_state = CAM_CSIPHY_START;

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@@ -71,7 +71,7 @@ int cam_csiphy_util_update_aon_ops(bool get_access, uint32_t phy_idx);
*
* This API allows to print all the cphy/dphy specific status registers
*/
int cam_csiphy_print_status_reg(struct csiphy_device *csiphy_dev);
int cam_csiphy_dump_status_reg(struct csiphy_device *csiphy_dev);
/**
* @phy_idx : To acquire the correct PHY hw to do the operation with
@@ -81,5 +81,4 @@ int cam_csiphy_print_status_reg(struct csiphy_device *csiphy_dev);
*
*/
int cam_csiphy_util_update_aon_registration(uint32_t phy_idx, bool is_aon_user);
#endif /* _CAM_CSIPHY_CORE_H_ */

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@@ -25,12 +25,15 @@ static void cam_csiphy_subdev_handle_message(
CAM_INFO(CAM_CSIPHY, "subdev index : %d CSIPHY index: %d",
csiphy_dev->soc_info.index, data);
if (data == csiphy_dev->soc_info.index) {
cam_csiphy_status_dmp(csiphy_dev);
cam_csiphy_irq_status_reg_dmp(csiphy_dev);
if (csiphy_dev->en_full_phy_reg_dump)
cam_csiphy_reg_dump(&csiphy_dev->soc_info);
if (csiphy_dev->en_lane_status_reg_dump) {
CAM_INFO(CAM_CSIPHY,
"Status Reg Dump on failure");
cam_csiphy_print_status_reg(csiphy_dev);
cam_csiphy_dump_status_reg(csiphy_dev);
}
}
break;
@@ -69,11 +72,14 @@ static int cam_csiphy_debug_register(struct csiphy_device *csiphy_dev)
}
debugfs_create_bool("en_irq_status_reg_dump", 0644,
dbgfileptr, &csiphy_dev->enable_irq_dump);
dbgfileptr, &csiphy_dev->enable_irq_status_reg_dump);
debugfs_create_bool("en_lane_status_reg_dump", 0644,
dbgfileptr, &csiphy_dev->en_lane_status_reg_dump);
debugfs_create_bool("en_full_phy_reg_dump", 0644,
dbgfileptr, &csiphy_dev->en_full_phy_reg_dump);
return 0;
}

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@@ -305,8 +305,9 @@ struct csiphy_work_queue {
* @csiphy_cpas_cp_reg_mask : Secure csiphy lane mask
* @ops : KMD operations
* @crm_cb : Callback API pointers
* @enable_irq_dump : Debugfs flag to enable hw IRQ register dump
* @enable_irq_status_reg_dump : Debugfs flag to enable hw IRQ status register dump
* @en_lane_status_reg_dump : Debugfs flag to enable cphy/dphy lane status dump
* @en_full_phy_reg_dump : Debugfs flag to enable the dump for all the Phy registers
* @preamble_enable : To enable preamble pattern
* @work_queue : Work queue to offload the work
*/
@@ -338,8 +339,9 @@ struct csiphy_device {
CSIPHY_MAX_INSTANCES_PER_PHY];
struct cam_req_mgr_kmd_ops ops;
struct cam_req_mgr_crm_cb *crm_cb;
bool enable_irq_dump;
bool enable_irq_status_reg_dump;
bool en_lane_status_reg_dump;
bool en_full_phy_reg_dump;
uint16_t preamble_enable;
struct workqueue_struct *work_queue;
};

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@@ -16,54 +16,62 @@
#include "include/cam_csiphy_2_1_0_hwreg.h"
/* Clock divide factor for CPHY spec v1.0 */
#define CSIPHY_DIVISOR_16 16
#define CSIPHY_DIVISOR_16 16
/* Clock divide factor for CPHY spec v1.2 and up */
#define CSIPHY_DIVISOR_32 32
#define CSIPHY_DIVISOR_32 32
/* Clock divide factor for DPHY */
#define CSIPHY_DIVISOR_8 8
#define CSIPHY_DIVISOR_8 8
#define CSIPHY_LOG_BUFFER_SIZE_IN_BYTES 250
#define ONE_LOG_LINE_MAX_SIZE 20
#define BYTES_PER_REGISTER 4
#define NUM_REGISTER_PER_LINE 4
#define REG_OFFSET(__start, __i) ((__start) + ((__i) * BYTES_PER_REGISTER))
static int cam_io_phy_dump(void __iomem *base_addr,
uint32_t start_offset, int size)
static int cam_csiphy_io_dump(void __iomem *base_addr, uint16_t num_regs, int csiphy_idx)
{
char line_str[128];
char *p_str;
int i;
uint32_t data;
char *buffer;
uint8_t buffer_offset = 0;
uint8_t rem_buffer_size = CSIPHY_LOG_BUFFER_SIZE_IN_BYTES;
uint16_t i;
uint32_t reg_offset;
CAM_INFO(CAM_CSIPHY, "addr=%pK offset=0x%x size=%d",
base_addr, start_offset, size);
if (!base_addr || (size <= 0))
if (!base_addr || !num_regs) {
CAM_ERR(CAM_CSIPHY, "Invalid params. base_addr: 0x%p num_regs: %u",
base_addr, num_regs);
return -EINVAL;
}
line_str[0] = '\0';
p_str = line_str;
for (i = 0; i < size; i++) {
if (i % NUM_REGISTER_PER_LINE == 0) {
snprintf(p_str, 12, "0x%08x: ",
REG_OFFSET(start_offset, i));
p_str += 11;
}
data = readl_relaxed(base_addr + REG_OFFSET(start_offset, i));
snprintf(p_str, 9, "%08x ", data);
p_str += 8;
if ((i + 1) % NUM_REGISTER_PER_LINE == 0) {
CAM_ERR(CAM_CSIPHY, "%s", line_str);
line_str[0] = '\0';
p_str = line_str;
buffer = kzalloc(CSIPHY_LOG_BUFFER_SIZE_IN_BYTES, GFP_KERNEL);
if (!buffer) {
CAM_ERR(CAM_CSIPHY, "Could not allocate the memory for buffer");
return -ENOMEM;
}
CAM_INFO(CAM_CSIPHY, "Base: 0x%pK num_regs: %u", base_addr, num_regs);
CAM_INFO(CAM_CSIPHY, "CSIPHY:%d Dump", csiphy_idx);
for (i = 0; i < num_regs; i++) {
reg_offset = i << 2;
buffer_offset += scnprintf(buffer + buffer_offset, rem_buffer_size, "0x%x=0x%x\n",
reg_offset, cam_io_r_mb(base_addr + reg_offset));
rem_buffer_size = CSIPHY_LOG_BUFFER_SIZE_IN_BYTES - buffer_offset;
if (rem_buffer_size <= ONE_LOG_LINE_MAX_SIZE) {
buffer[buffer_offset - 1] = '\0';
pr_info("%s\n", buffer);
buffer_offset = 0;
rem_buffer_size = CSIPHY_LOG_BUFFER_SIZE_IN_BYTES;
}
}
if (line_str[0] != '\0')
CAM_ERR(CAM_CSIPHY, "%s", line_str);
if (buffer_offset) {
buffer[buffer_offset - 1] = '\0';
pr_info("%s\n", buffer);
}
kfree(buffer);
return 0;
}
int32_t cam_csiphy_mem_dmp(struct cam_hw_soc_info *soc_info)
int32_t cam_csiphy_reg_dump(struct cam_hw_soc_info *soc_info)
{
int32_t rc = 0;
resource_size_t size = 0;
@@ -76,7 +84,7 @@ int32_t cam_csiphy_mem_dmp(struct cam_hw_soc_info *soc_info)
}
addr = soc_info->reg_map[0].mem_base;
size = resource_size(soc_info->mem_block[0]);
rc = cam_io_phy_dump(addr, 0, (size >> 2));
rc = cam_csiphy_io_dump(addr, (size >> 2), soc_info->index);
if (rc < 0) {
CAM_ERR(CAM_CSIPHY, "generating dump failed %d", rc);
return rc;
@@ -84,7 +92,7 @@ int32_t cam_csiphy_mem_dmp(struct cam_hw_soc_info *soc_info)
return rc;
}
int32_t cam_csiphy_status_dmp(struct csiphy_device *csiphy_dev)
int32_t cam_csiphy_irq_status_reg_dmp(struct csiphy_device *csiphy_dev)
{
struct csiphy_reg_parms_t *csiphy_reg = NULL;
int32_t rc = 0;

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@@ -68,12 +68,12 @@ int cam_csiphy_disable_hw(struct csiphy_device *csiphy_dev);
* This API dumps memory for the entire mapped region
* (needs to be macro enabled before use)
*/
int cam_csiphy_mem_dmp(struct cam_hw_soc_info *soc_info);
int cam_csiphy_reg_dump(struct cam_hw_soc_info *soc_info);
/**
* @csiphy_dev: CSIPhy device structure
*
* This API dumps memory for the entire status region
*/
int32_t cam_csiphy_status_dmp(struct csiphy_device *csiphy_dev);
int32_t cam_csiphy_irq_status_reg_dmp(struct csiphy_device *csiphy_dev);
#endif /* _CAM_CSIPHY_SOC_H_ */