asoc: update digital_cdc_rsc_mgr_hw_vote API
Update digital_cdc_rsc_mgr_hw_vote_enable/disable API with device info for easy debug. Also, add swrm clock enable checks during SSR. When SSR happens, swrm->hw_core_clk_en and swrm->aud_core_clk_en will be reset without resetting audio_vote and core_vote clk. This would cause clk mismatch in audio driver and adsp and device fails suspending when there's no audio usecase. Make this change to reset audio_vote and core_vote clk when receiving SWR_DEVICE_SSR_DOWN. Change-Id: I9875aac9f6faf8b6481457a70f31b005073369e0 Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
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@@ -1383,7 +1383,7 @@ int lpass_cdc_runtime_resume(struct device *dev)
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}
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if (priv->core_hw_vote_count == 0) {
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ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote);
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ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote, dev);
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if (ret < 0) {
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dev_err_ratelimited(dev, "%s:lpass core hw enable failed\n",
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__func__);
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@@ -1401,7 +1401,7 @@ audio_vote:
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}
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if (priv->core_audio_vote_count == 0) {
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ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote);
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ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote, dev);
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if (ret < 0) {
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dev_err_ratelimited(dev, "%s:lpass audio hw enable failed\n",
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__func__);
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@@ -1429,7 +1429,7 @@ int lpass_cdc_runtime_suspend(struct device *dev)
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if (priv->lpass_core_hw_vote != NULL) {
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if (--priv->core_hw_vote_count == 0)
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digital_cdc_rsc_mgr_hw_vote_disable(
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priv->lpass_core_hw_vote);
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priv->lpass_core_hw_vote, dev);
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if (priv->core_hw_vote_count < 0)
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priv->core_hw_vote_count = 0;
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} else {
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@@ -1442,7 +1442,7 @@ int lpass_cdc_runtime_suspend(struct device *dev)
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if (priv->lpass_audio_hw_vote != NULL) {
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if (--priv->core_audio_vote_count == 0)
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digital_cdc_rsc_mgr_hw_vote_disable(
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priv->lpass_audio_hw_vote);
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priv->lpass_audio_hw_vote, dev);
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if (priv->core_audio_vote_count < 0)
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priv->core_audio_vote_count = 0;
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} else {
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