qcacmn: Rx Sw Descriptor allocation should be configurable

To make Rx Software descriptor allocation configurable for each radio,
new ini variable is added.

Change-Id: Ifc5683629747a6fe8238c18448695abe91876ec5
This commit is contained in:
Mainak Sen
2019-07-25 00:48:59 +05:30
committed by nshrivas
parent 5b5238a050
commit 9550273ede
6 changed files with 64 additions and 19 deletions

View File

@@ -2368,6 +2368,7 @@ dp_rx_pdev_attach(struct dp_pdev *pdev)
uint8_t pdev_id = pdev->pdev_id;
struct dp_soc *soc = pdev->soc;
uint32_t rxdma_entries;
uint32_t rx_sw_desc_weight;
struct dp_srng *dp_rxdma_srng;
struct rx_desc_pool *rx_desc_pool;
@@ -2384,8 +2385,10 @@ dp_rx_pdev_attach(struct dp_pdev *pdev)
soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
rx_desc_pool = &soc->rx_desc_buf[pdev_id];
rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
dp_rx_desc_pool_alloc(soc, pdev_id,
DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
rx_sw_desc_weight * rxdma_entries,
rx_desc_pool);
rx_desc_pool->owner = DP_WBM2SW_RBM;

View File

@@ -36,23 +36,8 @@
#ifdef QCA_HOST2FW_RXBUF_RING
#define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
/**
* For MCL cases, allocate as many RX descriptors as buffers in the SW2RXDMA
* ring. This value may need to be tuned later.
*/
#define DP_RX_DESC_ALLOC_MULTIPLIER 1
#else
#define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
/**
* AP use cases need to allocate more RX Descriptors than the number of
* entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
* for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
* multiplication factor of 3, to allocate three times as many RX descriptors
* as RX buffers.
*/
#define DP_RX_DESC_ALLOC_MULTIPLIER 3
#endif /* QCA_HOST2FW_RXBUF_RING */
#define RX_BUFFER_RESERVATION 0

View File

@@ -1217,7 +1217,7 @@ dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
dp_debug("Mon RX Desc Pool[%d] entries=%u",
pdev_id, num_entries);
rx_desc_pool_size = DP_RX_DESC_ALLOC_MULTIPLIER * num_entries;
rx_desc_pool_size = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx) * num_entries;
status = dp_rx_desc_pool_alloc(soc, mac_id, rx_desc_pool_size,
rx_desc_pool);
if (!QDF_IS_STATUS_SUCCESS(status))

View File

@@ -277,6 +277,36 @@
#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
/**
* Allocate as many RX descriptors as buffers in the SW2RXDMA
* ring. This value may need to be tuned later.
*/
#if defined(QCA_HOST2FW_RXBUF_RING)
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
/**
* For low memory AP cases using 1 will reduce the rx descriptors memory req
*/
#elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
/**
* AP use cases need to allocate more RX Descriptors than the number of
* entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
* for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
* multiplication factor of 3, to allocate three times as many RX descriptors
* as RX buffers.
*/
#else
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
#endif //QCA_HOST2FW_RXBUF_RING
/* DP INI Declerations */
#define CFG_DP_HTT_PACKET_TYPE \
CFG_INI_UINT("dp_htt_packet_type", \
@@ -683,6 +713,13 @@
CFG_INI_BOOL("gEnableDataStallDetection", \
true, "Enable/Disable Data stall detection")
#define CFG_DP_RX_SW_DESC_WEIGHT \
CFG_INI_UINT("dp_rx_sw_desc_weight", \
WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
#define CFG_DP \
CFG(CFG_DP_HTT_PACKET_TYPE) \
CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
@@ -747,6 +784,8 @@
CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \
CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION)
CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
CFG(CFG_DP_RX_SW_DESC_WEIGHT)
#endif /* _CFG_DP_H_ */

View File

@@ -420,7 +420,8 @@ wlan_cfg_soc_attach(struct cdp_ctrl_objmgr_psoc *psoc)
cfg_get(psoc, CFG_DP_TX_FLOW_STOP_QUEUE_TH);
wlan_cfg_ctx->disable_intra_bss_fwd =
cfg_get(psoc, CFG_DP_AP_STA_SECURITY_SEPERATION);
wlan_cfg_ctx->rx_sw_desc_weight = cfg_get(psoc,
CFG_DP_RX_SW_DESC_WEIGHT);
return wlan_cfg_ctx;
}
@@ -978,6 +979,12 @@ wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
return cfg->rxdma_err_dst_ring;
}
int
wlan_cfg_get_dp_soc_rx_sw_desc_weight(struct wlan_cfg_dp_soc_ctxt *cfg)
{
return cfg->rx_sw_desc_weight;
}
bool
wlan_cfg_get_dp_caps(struct wlan_cfg_dp_soc_ctxt *cfg,
enum cdp_capabilities dp_caps)

View File

@@ -159,6 +159,7 @@ struct wlan_srng_cfg {
* dp_rx_process loop
* tx_comp_enable_eol_data_check: flag to enable/disable checking for more data
* at end of tx_comp_handler loop.
* @rx_sw_desc_weight: rx sw descriptor weight configuration
*/
struct wlan_cfg_dp_soc_ctxt {
int num_int_ctxts;
@@ -245,6 +246,7 @@ struct wlan_cfg_dp_soc_ctxt {
bool rx_enable_eol_data_check;
bool tx_comp_enable_eol_data_check;
#endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
int rx_sw_desc_weight;
};
/**
@@ -1064,6 +1066,15 @@ wlan_cfg_get_dp_soc_rxdma_refill_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
int
wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
/*
* wlan_cfg_get_dp_soc_rx_sw_desc_weight - Get rx sw desc weight
* @wlan_cfg_soc_ctx
*
* Return: rx_sw_desc_weight
*/
int
wlan_cfg_get_dp_soc_rx_sw_desc_weight(struct wlan_cfg_dp_soc_ctxt *cfg);
/*
* wlan_cfg_get_dp_caps - Get dp capablities
* @wlan_cfg_soc_ctx