qcacmn: Rx Sw Descriptor allocation should be configurable
To make Rx Software descriptor allocation configurable for each radio, new ini variable is added. Change-Id: Ifc5683629747a6fe8238c18448695abe91876ec5
This commit is contained in:
@@ -2368,6 +2368,7 @@ dp_rx_pdev_attach(struct dp_pdev *pdev)
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uint8_t pdev_id = pdev->pdev_id;
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struct dp_soc *soc = pdev->soc;
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uint32_t rxdma_entries;
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uint32_t rx_sw_desc_weight;
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struct dp_srng *dp_rxdma_srng;
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struct rx_desc_pool *rx_desc_pool;
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@@ -2384,8 +2385,10 @@ dp_rx_pdev_attach(struct dp_pdev *pdev)
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soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
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rx_desc_pool = &soc->rx_desc_buf[pdev_id];
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rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
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dp_rx_desc_pool_alloc(soc, pdev_id,
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DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
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rx_sw_desc_weight * rxdma_entries,
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rx_desc_pool);
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rx_desc_pool->owner = DP_WBM2SW_RBM;
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@@ -36,23 +36,8 @@
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#ifdef QCA_HOST2FW_RXBUF_RING
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#define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
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/**
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* For MCL cases, allocate as many RX descriptors as buffers in the SW2RXDMA
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* ring. This value may need to be tuned later.
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*/
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#define DP_RX_DESC_ALLOC_MULTIPLIER 1
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#else
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#define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
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/**
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* AP use cases need to allocate more RX Descriptors than the number of
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* entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
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* for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
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* multiplication factor of 3, to allocate three times as many RX descriptors
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* as RX buffers.
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*/
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#define DP_RX_DESC_ALLOC_MULTIPLIER 3
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#endif /* QCA_HOST2FW_RXBUF_RING */
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#define RX_BUFFER_RESERVATION 0
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@@ -1217,7 +1217,7 @@ dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
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dp_debug("Mon RX Desc Pool[%d] entries=%u",
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pdev_id, num_entries);
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rx_desc_pool_size = DP_RX_DESC_ALLOC_MULTIPLIER * num_entries;
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rx_desc_pool_size = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx) * num_entries;
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status = dp_rx_desc_pool_alloc(soc, mac_id, rx_desc_pool_size,
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rx_desc_pool);
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if (!QDF_IS_STATUS_SUCCESS(status))
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@@ -277,6 +277,36 @@
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#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
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#define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
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/**
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* Allocate as many RX descriptors as buffers in the SW2RXDMA
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* ring. This value may need to be tuned later.
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*/
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#if defined(QCA_HOST2FW_RXBUF_RING)
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
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/**
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* For low memory AP cases using 1 will reduce the rx descriptors memory req
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*/
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#elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
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/**
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* AP use cases need to allocate more RX Descriptors than the number of
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* entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
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* for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
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* multiplication factor of 3, to allocate three times as many RX descriptors
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* as RX buffers.
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*/
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#else
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
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#define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
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#endif //QCA_HOST2FW_RXBUF_RING
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/* DP INI Declerations */
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#define CFG_DP_HTT_PACKET_TYPE \
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CFG_INI_UINT("dp_htt_packet_type", \
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@@ -683,6 +713,13 @@
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CFG_INI_BOOL("gEnableDataStallDetection", \
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true, "Enable/Disable Data stall detection")
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#define CFG_DP_RX_SW_DESC_WEIGHT \
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CFG_INI_UINT("dp_rx_sw_desc_weight", \
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WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
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WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
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WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
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CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
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#define CFG_DP \
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CFG(CFG_DP_HTT_PACKET_TYPE) \
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CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
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@@ -747,6 +784,8 @@
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CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
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CFG(CFG_DP_REORDER_OFFLOAD_SUPPORT) \
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CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
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CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION)
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CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
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CFG(CFG_DP_RX_SW_DESC_WEIGHT)
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#endif /* _CFG_DP_H_ */
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@@ -420,7 +420,8 @@ wlan_cfg_soc_attach(struct cdp_ctrl_objmgr_psoc *psoc)
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cfg_get(psoc, CFG_DP_TX_FLOW_STOP_QUEUE_TH);
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wlan_cfg_ctx->disable_intra_bss_fwd =
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cfg_get(psoc, CFG_DP_AP_STA_SECURITY_SEPERATION);
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wlan_cfg_ctx->rx_sw_desc_weight = cfg_get(psoc,
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CFG_DP_RX_SW_DESC_WEIGHT);
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return wlan_cfg_ctx;
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}
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@@ -978,6 +979,12 @@ wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
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return cfg->rxdma_err_dst_ring;
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}
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int
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wlan_cfg_get_dp_soc_rx_sw_desc_weight(struct wlan_cfg_dp_soc_ctxt *cfg)
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{
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return cfg->rx_sw_desc_weight;
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}
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bool
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wlan_cfg_get_dp_caps(struct wlan_cfg_dp_soc_ctxt *cfg,
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enum cdp_capabilities dp_caps)
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@@ -159,6 +159,7 @@ struct wlan_srng_cfg {
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* dp_rx_process loop
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* tx_comp_enable_eol_data_check: flag to enable/disable checking for more data
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* at end of tx_comp_handler loop.
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* @rx_sw_desc_weight: rx sw descriptor weight configuration
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*/
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struct wlan_cfg_dp_soc_ctxt {
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int num_int_ctxts;
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@@ -245,6 +246,7 @@ struct wlan_cfg_dp_soc_ctxt {
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bool rx_enable_eol_data_check;
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bool tx_comp_enable_eol_data_check;
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#endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
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int rx_sw_desc_weight;
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};
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/**
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@@ -1064,6 +1066,15 @@ wlan_cfg_get_dp_soc_rxdma_refill_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
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int
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wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
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/*
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* wlan_cfg_get_dp_soc_rx_sw_desc_weight - Get rx sw desc weight
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* @wlan_cfg_soc_ctx
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*
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* Return: rx_sw_desc_weight
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*/
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int
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wlan_cfg_get_dp_soc_rx_sw_desc_weight(struct wlan_cfg_dp_soc_ctxt *cfg);
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/*
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* wlan_cfg_get_dp_caps - Get dp capablities
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* @wlan_cfg_soc_ctx
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