qcacmn: Initialize ce ring base address high registers for adrastea

Because the register values were not defined in the target defs table,
The values were defaulting to 0 or missing. The code to write to these
registers checks if they exist before trying to write to them.  Without
these registers defined, the base addresses of the dma rings would be
truncated to 32 bits.

Change-Id: Iabb49df50c2452522b6da30154e4d7d7221e22ac
CRs-Fixed: 1049424

hif/src/adrastea_reg_def.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -1413,9 +1413,9 @@
 #define ADRASTEA_SR_BA_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_LOW\
 				- ADRASTEA_CE0_BASE_ADDRESS)
 
-#define ADRASTEA_SR_BA_ADDRESS_HIGH_OFFSET \
-				(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_HIGH \
-				- ADRASTEA_CE0_BASE_ADDRESS)
+#define ADRASTEA_SR_BA_HIGH_OFFSET \
+		(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_HIGH \
+		 - ADRASTEA_CE0_BASE_ADDRESS)
 
 #define ADRASTEA_SR_SIZE_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_SIZE \
 					- ADRASTEA_CE0_BASE_ADDRESS)
@@ -1429,8 +1429,9 @@
 #define ADRASTEA_DR_BA_OFFSET       (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_LOW\
 					- ADRASTEA_CE0_BASE_ADDRESS)
 
-#define ADRASTEA_DR_BA_ADDRESS_HIGH_OFFSET  (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_HIGH\
-						- ADRASTEA_CE0_BASE_ADDRESS)
+#define ADRASTEA_DR_BA_HIGH_OFFSET  \
+		(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_HIGH\
+		 - ADRASTEA_CE0_BASE_ADDRESS)
 
 #define ADRASTEA_DR_SIZE_OFFSET     (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_SIZE\
 					- ADRASTEA_CE0_BASE_ADDRESS)
@@ -2216,10 +2217,12 @@ struct ce_reg_def adrastea_ce_targetdef = {
 	.d_HOST_IE_ADDRESS = ADRASTEA_HOST_IE_OFFSET,
 	.d_HOST_IE_COPY_COMPLETE_MASK = ADRASTEA_HOST_IE_COPY_COMPLETE_MASK,
 	.d_SR_BA_ADDRESS = ADRASTEA_SR_BA_OFFSET,
+	.d_SR_BA_ADDRESS_HIGH = ADRASTEA_SR_BA_HIGH_OFFSET,
 	.d_SR_SIZE_ADDRESS = ADRASTEA_SR_SIZE_OFFSET,
 	.d_CE_CTRL1_ADDRESS = ADRASTEA_CE_CTRL1_OFFSET,
 	.d_CE_CTRL1_DMAX_LENGTH_MASK = ADRASTEA_CE_CTRL1_DMAX_LENGTH_MASK,
 	.d_DR_BA_ADDRESS = ADRASTEA_DR_BA_OFFSET,
+	.d_DR_BA_ADDRESS_HIGH = ADRASTEA_DR_BA_HIGH_OFFSET,
 	.d_DR_SIZE_ADDRESS = ADRASTEA_DR_SIZE_OFFSET,
 	.d_CE_CMD_REGISTER = ADRASTEA_CE_CMD_REGISTER_OFFSET,
 	.d_CE_MSI_ADDRESS = MISSING_FOR_ADRASTEA,