Merge "msm: camera: isp: Assign max hw update entries based on stream type" into camera-kernel.lnx.5.0
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93be89f6f5
@@ -445,7 +445,7 @@ static int __cam_isp_ctx_enqueue_init_request(
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if (req_isp_old->hw_update_data.packet_opcode_type ==
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CAM_ISP_PACKET_INIT_DEV) {
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if ((req_isp_old->num_cfg + req_isp_new->num_cfg) >=
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CAM_ISP_CTX_CFG_MAX) {
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ctx->max_hw_update_entries) {
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CAM_WARN(CAM_ISP,
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"Can not merge INIT pkt num_cfgs = %d",
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(req_isp_old->num_cfg +
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@@ -4317,6 +4317,7 @@ static void __cam_isp_ctx_free_mem_hw_entries(struct cam_context *ctx)
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ctx->hw_update_entry = NULL;
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ctx->max_out_map_entries = 0;
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ctx->max_in_map_entries = 0;
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ctx->max_hw_update_entries = 0;
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}
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static int __cam_isp_ctx_release_hw_in_top_state(struct cam_context *ctx,
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@@ -4660,6 +4661,7 @@ static int __cam_isp_ctx_allocate_mem_hw_entries(
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{
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int rc = 0;
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uint32_t max_res = 0;
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uint32_t max_hw_upd_entries = CAM_ISP_CTX_CFG_MAX;
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struct cam_ctx_request *req;
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struct cam_ctx_request *temp_req;
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struct cam_isp_ctx_req *req_isp;
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@@ -4669,15 +4671,19 @@ static int __cam_isp_ctx_allocate_mem_hw_entries(
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max_res = CAM_ISP_CTX_RES_MAX;
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else {
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max_res = param->op_params.param_list[0];
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if (param->op_flags & CAM_IFE_CTX_SFE_EN)
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if (param->op_flags & CAM_IFE_CTX_SFE_EN) {
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max_res += param->op_params.param_list[1];
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max_hw_upd_entries = CAM_ISP_SFE_CTX_CFG_MAX;
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}
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}
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ctx->max_in_map_entries = max_res;
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ctx->max_out_map_entries = max_res;
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ctx->max_in_map_entries = max_res;
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ctx->max_out_map_entries = max_res;
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ctx->max_hw_update_entries = max_hw_upd_entries;
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CAM_DBG(CAM_ISP, "Allocate max: 0x%x is_sfe_en: %d",
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max_res, (param->op_flags & CAM_IFE_CTX_SFE_EN));
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CAM_DBG(CAM_ISP,
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"Allocate max_entries: 0x%x max_res: 0x%x is_sfe_en: %d",
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max_hw_upd_entries, max_res, (param->op_flags & CAM_IFE_CTX_SFE_EN));
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num_entries = ctx->max_hw_update_entries * CAM_ISP_CTX_REQ_MAX;
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ctx->hw_update_entry = kcalloc(num_entries,
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@@ -6202,8 +6208,6 @@ int cam_isp_context_init(struct cam_isp_context *ctx,
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ctx_base->state_machine = cam_isp_ctx_top_state_machine;
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ctx_base->ctx_priv = ctx;
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ctx_base->max_hw_update_entries = CAM_ISP_CTX_CFG_MAX;
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/* initializing current state for error logging */
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for (i = 0; i < CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES; i++) {
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ctx->cam_isp_ctx_state_monitor[i].curr_state =
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@@ -233,6 +233,35 @@ static int cam_ife_mgr_handle_reg_dump(struct cam_ife_hw_mgr_ctx *ctx,
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return rc;
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}
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static inline int cam_ife_mgr_allocate_cdm_cmd(
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bool is_sfe_en,
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struct cam_cdm_bl_request **cdm_cmd)
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{
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int rc = 0;
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uint32_t cfg_max = CAM_ISP_CTX_CFG_MAX;
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if (is_sfe_en)
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cfg_max = CAM_ISP_SFE_CTX_CFG_MAX;
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*cdm_cmd = kzalloc(((sizeof(struct cam_cdm_bl_request)) +
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((cfg_max - 1) *
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sizeof(struct cam_cdm_bl_cmd))), GFP_KERNEL);
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if (!(*cdm_cmd)) {
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CAM_ERR(CAM_ISP, "Failed to allocate cdm bl memory");
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rc = -ENOMEM;
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}
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return rc;
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}
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static inline void cam_ife_mgr_free_cdm_cmd(
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struct cam_cdm_bl_request **cdm_cmd)
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{
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kfree(*cdm_cmd);
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*cdm_cmd = NULL;
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}
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static int cam_ife_mgr_get_hw_caps(void *hw_mgr_priv,
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void *hw_caps_args)
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{
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@@ -4675,6 +4704,12 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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goto free_res;
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}
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rc = cam_ife_mgr_allocate_cdm_cmd(
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(ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE ? true : false),
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&ife_ctx->cdm_cmd);
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if (rc)
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goto free_res;
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if (ife_ctx->is_dual)
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memcpy(cdm_acquire.identifier, "dualife", sizeof("dualife"));
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else
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@@ -4699,7 +4734,7 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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rc = cam_cdm_acquire(&cdm_acquire);
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if (rc) {
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CAM_ERR(CAM_ISP, "Failed to acquire the CDM HW");
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goto free_res;
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goto free_cdm_cmd;
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}
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CAM_DBG(CAM_ISP,
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@@ -4755,6 +4790,8 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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return 0;
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free_cdm_cmd:
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cam_ife_mgr_free_cdm_cmd(&ife_ctx->cdm_cmd);
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free_res:
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cam_ife_hw_mgr_release_hw_for_ctx(ife_ctx);
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free_mem:
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@@ -4976,6 +5013,11 @@ static int cam_ife_mgr_acquire_dev(void *hw_mgr_priv, void *acquire_hw_args)
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goto free_res;
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}
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rc = cam_ife_mgr_allocate_cdm_cmd(false,
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&ife_ctx->cdm_cmd);
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if (rc)
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goto free_res;
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cam_cpas_get_cpas_hw_version(&ife_ctx->hw_version);
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ife_ctx->internal_cdm = false;
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@@ -4999,7 +5041,7 @@ static int cam_ife_mgr_acquire_dev(void *hw_mgr_priv, void *acquire_hw_args)
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rc = cam_cdm_acquire(&cdm_acquire);
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if (rc) {
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CAM_ERR(CAM_ISP, "Failed to acquire the CDM HW");
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goto free_res;
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goto free_cdm_cmd;
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}
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CAM_DBG(CAM_ISP, "Successfully acquired CDM ID:%d, CDM HW hdl=%x",
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@@ -5022,6 +5064,9 @@ static int cam_ife_mgr_acquire_dev(void *hw_mgr_priv, void *acquire_hw_args)
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cam_ife_hw_mgr_put_ctx(&ife_hw_mgr->used_ctx_list, &ife_ctx);
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return 0;
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free_cdm_cmd:
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cam_ife_mgr_free_cdm_cmd(&ife_ctx->cdm_cmd);
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free_res:
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cam_ife_hw_mgr_release_hw_for_ctx(ife_ctx);
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cam_cdm_release(ife_ctx->cdm_handle);
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@@ -6501,6 +6546,7 @@ static int cam_ife_mgr_release_hw(void *hw_mgr_priv,
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ctx->epoch_cnt[i] = 0;
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}
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cam_ife_mgr_free_cdm_cmd(&ctx->cdm_cmd);
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CAM_INFO(CAM_ISP, "Release HW success ctx id: %u",
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ctx->ctx_index);
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@@ -11273,16 +11319,6 @@ int cam_ife_hw_mgr_init(struct cam_hw_mgr_intf *hw_mgr_intf, int *iommu_hdl)
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&g_ife_hw_mgr.ctx_pool[i].free_res_list);
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}
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g_ife_hw_mgr.ctx_pool[i].cdm_cmd =
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kzalloc(((sizeof(struct cam_cdm_bl_request)) +
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((CAM_ISP_CTX_CFG_MAX - 1) *
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sizeof(struct cam_cdm_bl_cmd))), GFP_KERNEL);
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if (!g_ife_hw_mgr.ctx_pool[i].cdm_cmd) {
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rc = -ENOMEM;
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CAM_ERR(CAM_ISP, "Allocation Failed for cdm command");
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goto end;
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}
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g_ife_hw_mgr.ctx_pool[i].ctx_index = i;
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g_ife_hw_mgr.ctx_pool[i].hw_mgr = &g_ife_hw_mgr;
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@@ -11332,7 +11368,6 @@ end:
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for (i = 0; i < CAM_IFE_CTX_MAX; i++) {
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cam_tasklet_deinit(
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&g_ife_hw_mgr.mgr_common.tasklet_pool[i]);
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kfree(g_ife_hw_mgr.ctx_pool[i].cdm_cmd);
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g_ife_hw_mgr.ctx_pool[i].cdm_cmd = NULL;
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kfree(g_ife_hw_mgr.ctx_pool[i].res_list_ife_out);
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g_ife_hw_mgr.ctx_pool[i].res_list_ife_out = NULL;
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@@ -11359,7 +11394,6 @@ void cam_ife_hw_mgr_deinit(void)
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for (i = 0; i < CAM_IFE_CTX_MAX; i++) {
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cam_tasklet_deinit(
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&g_ife_hw_mgr.mgr_common.tasklet_pool[i]);
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kfree(g_ife_hw_mgr.ctx_pool[i].cdm_cmd);
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g_ife_hw_mgr.ctx_pool[i].cdm_cmd = NULL;
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kfree(g_ife_hw_mgr.ctx_pool[i].res_list_ife_out);
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g_ife_hw_mgr.ctx_pool[i].res_list_ife_out = NULL;
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@@ -45,6 +45,13 @@
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*/
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#define CAM_ISP_CTX_CFG_MAX 25
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/*
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* Maximum configuration entry size including SFE & CSID - This is based on the
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* worst case DUAL IFE/SFE use case plus some margin.
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*/
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#define CAM_ISP_SFE_CTX_CFG_MAX 40
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/**
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* enum cam_isp_hw_event_type - Collection of the ISP hardware events
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*/
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