浏览代码

disp: msm: sde: avoid MDSS register access during boot in trusted VM

Trusted VM will be assigned MDSS HW access dynamically only on TUI
use case start boundary. So, any HW access during the boot sequence
will result in stage2 faults. But SDE driver initializes few HW
blocks during the boot up sequence. This change fixes them by either
skipping those accesses, if those registers expected to be programmed
by the Primary VM or postponing those accesses until the HW is
assigned.

Change-Id: Ic85238c5d734e9ac993072374c1b0ae661708fca
Signed-off-by: Jeykumar Sankaran <[email protected]>
Jeykumar Sankaran 5 年之前
父节点
当前提交
935af8104a
共有 3 个文件被更改,包括 22 次插入13 次删除
  1. 12 9
      msm/sde/sde_core_irq.c
  2. 3 2
      msm/sde/sde_hw_cdm.c
  3. 7 2
      msm/sde/sde_kms.c

+ 12 - 9
msm/sde/sde_core_irq.c

@@ -464,16 +464,19 @@ void sde_core_irq_preinstall(struct sde_kms *sde_kms)
 		return;
 	}
 
-	rc = pm_runtime_get_sync(sde_kms->dev->dev);
-	if (rc < 0) {
-		SDE_ERROR("failed to enable power resource %d\n", rc);
-		SDE_EVT32(rc, SDE_EVTLOG_ERROR);
-		return;
-	}
+	if (!sde_in_trusted_vm(sde_kms)) {
+		rc = pm_runtime_get_sync(sde_kms->dev->dev);
+		if (rc < 0) {
+			SDE_ERROR("failed to enable power resource %d\n", rc);
+			SDE_EVT32(rc, SDE_EVTLOG_ERROR);
+			return;
+		}
 
-	sde_clear_all_irqs(sde_kms);
-	sde_disable_all_irqs(sde_kms);
-	pm_runtime_put_sync(sde_kms->dev->dev);
+		sde_clear_all_irqs(sde_kms);
+		sde_disable_all_irqs(sde_kms);
+
+		pm_runtime_put_sync(sde_kms->dev->dev);
+	}
 
 	spin_lock_init(&sde_kms->irq_obj.cb_lock);
 

+ 3 - 2
msm/sde/sde_hw_cdm.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  */
 
 #include "sde_hw_mdss.h"
@@ -341,7 +341,8 @@ struct sde_hw_cdm *sde_hw_cdm_init(enum sde_cdm idx,
 	 * Perform any default initialization for the chroma down module
 	 * @setup default csc coefficients
 	 */
-	sde_hw_cdm_setup_csc_10bit(c, &rgb2yuv_cfg);
+	if (!m->trusted_vm_env)
+		sde_hw_cdm_setup_csc_10bit(c, &rgb2yuv_cfg);
 
 	return c;
 

+ 7 - 2
msm/sde/sde_kms.c

@@ -3156,15 +3156,20 @@ static void sde_kms_handle_power_event(u32 event_type, void *usr)
 
 	if (event_type == SDE_POWER_EVENT_POST_ENABLE) {
 		sde_irq_update(msm_kms, true);
-		if (sde_kms->splash_data.num_splash_displays)
+		sde_kms->first_kickoff = true;
+		if (sde_kms->splash_data.num_splash_displays ||
+				sde_in_trusted_vm(sde_kms))
 			return;
+
 		sde_vbif_init_memtypes(sde_kms);
 		sde_kms_init_shared_hw(sde_kms);
 		_sde_kms_set_lutdma_vbif_remap(sde_kms);
-		sde_kms->first_kickoff = true;
 	} else if (event_type == SDE_POWER_EVENT_PRE_DISABLE) {
 		sde_irq_update(msm_kms, false);
 		sde_kms->first_kickoff = false;
+		if (sde_in_trusted_vm(sde_kms))
+			return;
+
 		_sde_kms_active_override(sde_kms, true);
 		if (!is_sde_rsc_available(SDE_RSC_INDEX))
 			sde_vbif_axi_halt_request(sde_kms);