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ASoC: Add MBHC and IRQ driver for WCD937X

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Add MBHC and IRQ driver for tanggu codec.
MBHC and IRQ for tanggu are initialized from
core driver. IRQ driver uses REGMAP-IRQ
framework.

CRs-Fixed: 2281591
Change-Id: I06adb3081dd17f896b3e6a3ce0c4c46b5ef1cbea
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
This commit is contained in:
Vatsal Bucha
2018-07-30 20:17:41 +05:30
parent 9b37ac95f1
commit 92fad90ae5
5 changed files with 1379 additions and 6 deletions
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55
asoc/codecs/wcd937x/internal.h
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@@ -14,9 +14,14 @@
#define _WCD937X_INTERNAL_H
#include "../wcd-mbhc-v2.h"
#include "asoc/wcd-irq.h"
#include "wcd937x-mbhc.h"
#define WCD937X_MAX_MICBIAS 3
/* Convert from vout ctl to micbias voltage in mV */
#define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
extern struct regmap_config wcd937x_regmap_config;
struct wcd937x_priv {
@@ -36,23 +41,69 @@ struct wcd937x_priv {
struct fw_info *fw_data;
struct device_node *wcd_rst_np;
struct mutex micb_lock;
s32 dmic_0_1_clk_cnt;
s32 dmic_2_3_clk_cnt;
s32 dmic_4_5_clk_cnt;
/* mbhc module */
struct wcd_mbhc mbhc;
struct wcd937x_mbhc *mbhc;
struct blocking_notifier_head notifier;
struct mutex micb_lock;
u32 hph_mode;
struct irq_domain *virq;
struct wcd_irq_info *irq_info;
u32 rx_clk_cnt;
int num_irq_regs;
};
struct wcd937x_micbias_setting {
u8 ldoh_v;
u32 cfilt1_mv;
u32 micb2_mv;
u8 bias1_cfilt_sel;
};
struct wcd937x_pdata {
struct device_node *rst_np;
struct device_node *rx_slave;
struct device_node *tx_slave;
struct wcd937x_micbias_setting micbias;
};
enum {
/* INTR_CTRL_INT_MASK_0 */
WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET = 0,
WCD937X_IRQ_MBHC_BUTTON_PRESS_DET,
WCD937X_IRQ_MBHC_ELECT_INS_REM_DET,
WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
WCD937X_IRQ_MBHC_SW_DET,
WCD937X_IRQ_HPHR_OCP_INT,
WCD937X_IRQ_HPHR_CNP_INT,
WCD937X_IRQ_HPHL_OCP_INT,
/* INTR_CTRL_INT_MASK_1 */
WCD937X_IRQ_HPHL_CNP_INT,
WCD937X_IRQ_EAR_CNP_INT,
WCD937X_IRQ_EAR_SCD_INT,
WCD937X_IRQ_AUX_CNP_INT,
WCD937X_IRQ_AUX_SCD_INT,
WCD937X_IRQ_HPHL_PDM_WD_INT,
WCD937X_IRQ_HPHR_PDM_WD_INT,
WCD937X_IRQ_AUX_PDM_WD_INT,
/* INTR_CTRL_INT_MASK_2 */
WCD937X_IRQ_LDORT_SCD_INT,
WCD937X_IRQ_MBHC_MOISTURE_INT,
WCD937X_IRQ_HPHL_SURGE_DET_INT,
WCD937X_IRQ_HPHR_SURGE_DET_INT,
WCD937X_NUM_IRQS,
};
extern struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec);
extern int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
int volt, int micb_num);
extern int wcd937x_get_micb_vout_ctl_val(u32 micb_mv);
extern int wcd937x_micbias_control(struct snd_soc_codec *codec, int micb_num,
int req, bool is_dapm);
#endif