Merge "msm: camera: isp: Move constraint error info to header" into camera-kernel.lnx.5.0

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/cam_sfe680.h

@@ -757,6 +757,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 25,
 			.num_wm        = 1,
 			.wm_idx        = 8,
+			.name          = "RDI_0",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_RDI1,
@@ -766,6 +767,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 26,
 			.num_wm        = 1,
 			.wm_idx        = 9,
+			.name          = "RDI_1",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_RDI2,
@@ -775,6 +777,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 27,
 			.num_wm        = 1,
 			.wm_idx        = 10,
+			.name          = "RDI_2",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_RDI3,
@@ -784,6 +787,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 28,
 			.num_wm        = 1,
 			.wm_idx        = 11,
+			.name          = "RDI_3",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_RDI4,
@@ -793,6 +797,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 29,
 			.num_wm        = 1,
 			.wm_idx        = 12,
+			.name          = "RDI_4",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_RAW_DUMP,
@@ -803,6 +808,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[1]        = 17,
 			.num_wm        = 1,
 			.wm_idx        = 0,
+			.name          = "REMOSIAC",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_LCR,
@@ -812,6 +818,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 18,
 			.num_wm        = 1,
 			.wm_idx        = 1,
+			.name          = "LCR",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BE_0,
@@ -821,6 +828,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 19,
 			.num_wm        = 1,
 			.wm_idx        = 2,
+			.name          = "STATS_BE_0",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BHIST_0,
@@ -830,6 +838,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 20,
 			.num_wm        = 1,
 			.wm_idx        = 3,
+			.name          = "STATS_BHIST_0",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BE_1,
@@ -839,6 +848,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 21,
 			.num_wm        = 1,
 			.wm_idx        = 4,
+			.name          = "STATS_BE_1",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BHIST_1,
@@ -848,6 +858,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 22,
 			.num_wm        = 1,
 			.wm_idx        = 5,
+			.name          = "STATS_BHIST_1",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BE_2,
@@ -857,6 +868,7 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 23,
 			.num_wm        = 1,
 			.wm_idx        = 6,
+			.name          = "STATS_BE_2",
 		},
 		{
 			.sfe_out_type  = CAM_SFE_BUS_SFE_OUT_BHIST_2,
@@ -866,6 +878,77 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
 			.mid[0]        = 24,
 			.num_wm        = 1,
 			.wm_idx        = 7,
+			.name          = "STATS_BHIST_2",
+		},
+	},
+	.constraint_error_list = {
+		{
+			.bitmask = 0x000001,
+			.error_description = "PPC 1x1 illegal"
+		},
+		{
+			.bitmask = 0x000002,
+			.error_description = "PPC 1x2 illegal"
+		},
+		{
+			.bitmask = 0x000004,
+			.error_description = "PPC 2x1 illegal"
+		},
+		{
+			.bitmask = 0x000008,
+			.error_description = "PPC 2x2 illegal"
+		},
+		{
+			.bitmask = 0x000010,
+			.error_description = "Pack 8 BPP illegal"
+		},
+		{
+			.bitmask = 0x000020,
+			.error_description = "Pack 16 BPP illegal"
+		},
+		{
+			.bitmask = 0x000040,
+			.error_description = "Pack 32 BPP illegal"
+		},
+		{
+			.bitmask = 0x000080,
+			.error_description = "Pack 64 BPP illegal"
+		},
+		{
+			.bitmask = 0x000100,
+			.error_description = "Pack 128 BPP illegal"
+		},
+		{
+			.bitmask = 0x000200,
+			.error_description = "Frame based illegal"
+		},
+		{
+			.bitmask = 0x000400,
+			.error_description = "Index based illegal"
+		},
+		{
+			.bitmask = 0x000800,
+			.error_description = "Image address unalign"
+		},
+		{
+			.bitmask = 0x001000,
+			.error_description = "Frame Header address unalign"
+		},
+		{
+			.bitmask = 0x002000,
+			.error_description = "X Initialization unalign"
+		},
+		{
+			.bitmask = 0x004000,
+			.error_description = "Image Width unalign"
+		},
+		{
+			.bitmask = 0x008000,
+			.error_description = "Image Height unalign"
+		},
+		{
+			.bitmask = 0x010000,
+			.error_description = "Meta Stride unalign"
 		},
 	},
 	.num_comp_grp    = 10,

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_wr.c

@@ -186,6 +186,7 @@ struct cam_sfe_bus_wr_priv {
 	int                                 bus_irq_handle;
 	int                                 error_irq_handle;
 	void                               *tasklet_info;
+	struct cam_sfe_constraint_error_info      *constraint_error_list;
 };
 
 static int cam_sfe_bus_wr_process_cmd(
@@ -362,6 +363,61 @@ static enum cam_sfe_bus_wr_packer_format
 	}
 }
 
+static void cam_sfe_bus_wr_print_constraint_errors(
+	struct cam_sfe_bus_wr_priv *bus_priv,
+	uint8_t *wm_name,
+	uint32_t constraint_errors)
+{
+	uint32_t i;
+
+	CAM_INFO(CAM_ISP, "Constraint violation bitflags: 0x%X",
+		constraint_errors);
+
+	for (i = 0; i < CAM_SFE_BUS_CONS_ERR_MAX; i++) {
+		if (bus_priv->constraint_error_list[i].bitmask &
+			constraint_errors) {
+			CAM_INFO(CAM_ISP, "WM: %s %s programming",
+				wm_name, bus_priv->constraint_error_list[i]
+				.error_description);
+		}
+	}
+}
+
+static void cam_sfe_bus_wr_get_constraint_errors(
+	struct cam_sfe_bus_wr_priv *bus_priv)
+{
+	uint32_t i, j, constraint_errors;
+	uint8_t *wm_name = NULL;
+	struct cam_isp_resource_node              *out_rsrc_node = NULL;
+	struct cam_sfe_bus_wr_out_data            *out_rsrc_data = NULL;
+	struct cam_sfe_bus_wr_wm_resource_data    *wm_data   = NULL;
+
+	for (i = 0; i < bus_priv->num_out; i++) {
+		out_rsrc_node = &bus_priv->sfe_out[i];
+		if (!out_rsrc_node || !out_rsrc_node->res_priv) {
+			CAM_DBG(CAM_ISP,
+				"SFE out:%d out rsrc node or data is NULL", i);
+			continue;
+		}
+
+		out_rsrc_data = out_rsrc_node->res_priv;
+		for (j = 0; j < out_rsrc_data->num_wm; j++) {
+			wm_data = out_rsrc_data->wm_res[j].res_priv;
+			wm_name = out_rsrc_data->wm_res[j].res_name;
+			if (wm_data) {
+				constraint_errors = cam_io_r_mb(
+					bus_priv->common_data.mem_base +
+					wm_data->hw_regs->debug_status_1);
+				if (!constraint_errors)
+					continue;
+
+				cam_sfe_bus_wr_print_constraint_errors(
+					bus_priv, wm_name, constraint_errors);
+			}
+		}
+	}
+}
+
 static int cam_sfe_bus_config_rdi_wm(
 	struct cam_sfe_bus_wr_wm_resource_data  *rsrc_data)
 {
@@ -612,10 +668,10 @@ static int cam_sfe_bus_acquire_wm(
 	wm_res->tasklet_info = tasklet;
 
 	CAM_DBG(CAM_SFE,
-		"SFE:%d WM:%d processed width:%d height:%d format:0x%X pack_fmt 0x%x %s",
+		"SFE:%d WM:%d %s processed width:%d height:%d format:0x%X pack_fmt 0x%x %s",
 		rsrc_data->common_data->core_index, rsrc_data->index,
-		rsrc_data->width, rsrc_data->height, rsrc_data->format,
-		rsrc_data->pack_fmt, wm_mode);
+		wm_res->res_name, rsrc_data->width, rsrc_data->height,
+		rsrc_data->format, rsrc_data->pack_fmt, wm_mode);
 	return 0;
 }
 
@@ -653,6 +709,7 @@ static int cam_sfe_bus_release_wm(void   *bus_priv,
 static int cam_sfe_bus_start_wm(struct cam_isp_resource_node *wm_res)
 {
 	const uint32_t image_cfg_height_shift_val = 16;
+	const uint32_t enable_debug_status_1 = 11 << 8;
 	struct cam_sfe_bus_wr_wm_resource_data   *rsrc_data =
 		wm_res->res_priv;
 	struct cam_sfe_bus_wr_common_data        *common_data =
@@ -679,11 +736,16 @@ static int cam_sfe_bus_start_wm(struct cam_isp_resource_node *wm_res)
 	cam_io_w_mb(rsrc_data->en_cfg, common_data->mem_base +
 		rsrc_data->hw_regs->cfg);
 
+	/* Enable constraint error detection */
+	cam_io_w_mb(enable_debug_status_1,
+		common_data->mem_base +
+		rsrc_data->hw_regs->debug_status_cfg);
+
 	CAM_DBG(CAM_SFE,
-		"Start SFE:%d WM:%d offset:0x%X en_cfg:0x%X width:%d height:%d",
+		"Start SFE:%d WM:%d %s offset:0x%X en_cfg:0x%X width:%d height:%d",
 		rsrc_data->common_data->core_index, rsrc_data->index,
-		(uint32_t) rsrc_data->hw_regs->cfg, rsrc_data->en_cfg,
-		rsrc_data->width, rsrc_data->height);
+		wm_res->res_name, (uint32_t) rsrc_data->hw_regs->cfg,
+		rsrc_data->en_cfg, rsrc_data->width, rsrc_data->height);
 	CAM_DBG(CAM_SFE, "WM:%d pk_fmt:%d stride:%d",
 		rsrc_data->index, rsrc_data->pack_fmt & PACKER_FMT_MAX,
 		rsrc_data->stride);
@@ -702,8 +764,9 @@ static int cam_sfe_bus_stop_wm(struct cam_isp_resource_node *wm_res)
 
 	/* Disable WM */
 	cam_io_w_mb(0x0, common_data->mem_base + rsrc_data->hw_regs->cfg);
-	CAM_DBG(CAM_SFE, "Stop SFE:%d WM:%d",
-		rsrc_data->common_data->core_index, rsrc_data->index);
+	CAM_DBG(CAM_SFE, "Stop SFE:%d WM:%d %s",
+		rsrc_data->common_data->core_index, rsrc_data->index,
+		wm_res->res_name);
 
 	wm_res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;
 	rsrc_data->init_cfg_done = false;
@@ -727,7 +790,8 @@ static int cam_sfe_bus_handle_wm_done_bottom_half(void *wm_node,
 static int cam_sfe_bus_init_wm_resource(uint32_t index,
 	struct cam_sfe_bus_wr_priv      *bus_priv,
 	struct cam_sfe_bus_wr_hw_info   *hw_info,
-	struct cam_isp_resource_node    *wm_res)
+	struct cam_isp_resource_node    *wm_res,
+	uint8_t                         *wm_name)
 {
 	struct cam_sfe_bus_wr_wm_resource_data *rsrc_data;
 
@@ -752,6 +816,9 @@ static int cam_sfe_bus_init_wm_resource(uint32_t index,
 	wm_res->bottom_half_handler =
 		cam_sfe_bus_handle_wm_done_bottom_half;
 	wm_res->hw_intf = bus_priv->common_data.hw_intf;
+	if (wm_name)
+		scnprintf(wm_res->res_name, CAM_ISP_RES_NAME_LEN, "%s",
+			wm_name);
 
 	return 0;
 }
@@ -1703,7 +1770,8 @@ static int cam_sfe_bus_init_sfe_out_resource(
 	rc = cam_sfe_bus_init_wm_resource(
 			hw_info->sfe_out_hw_info[index].wm_idx,
 			bus_priv, hw_info,
-			&rsrc_data->wm_res[i]);
+			&rsrc_data->wm_res[i],
+			hw_info->sfe_out_hw_info[index].name);
 	if (rc < 0) {
 		CAM_ERR(CAM_SFE, "SFE:%d init WM:%d failed rc:%d",
 			bus_priv->common_data.core_index, i, rc);
@@ -1899,6 +1967,7 @@ static int cam_sfe_bus_wr_irq_bottom_half(
 	struct cam_sfe_bus_wr_common_data     *common_data;
 	struct cam_isp_hw_event_info           evt_info;
 	struct cam_sfe_bus_wr_irq_evt_payload *evt_payload = evt_payload_priv;
+	uint32_t cons_violation = 0;
 
 	if (!handler_priv || !evt_payload_priv)
 		return -EINVAL;
@@ -1906,6 +1975,7 @@ static int cam_sfe_bus_wr_irq_bottom_half(
 	common_data = &bus_priv->common_data;
 
 	status = evt_payload->irq_reg_val[CAM_SFE_IRQ_BUS_REG_STATUS0];
+	cons_violation = (status >> 28) & 0x1;
 
 	CAM_ERR(CAM_SFE,
 		"SFE:%d status0 0x%x Image Size violation status 0x%x CCIF violation status 0x%x",
@@ -1918,6 +1988,9 @@ static int cam_sfe_bus_wr_irq_bottom_half(
 			evt_payload->image_size_violation_status,
 			bus_priv);
 
+	if (cons_violation)
+		cam_sfe_bus_wr_get_constraint_errors(bus_priv);
+
 	cam_sfe_bus_wr_put_evt_payload(common_data, &evt_payload);
 
 	evt_info.hw_idx = common_data->core_index;
@@ -2032,8 +2105,9 @@ static int cam_sfe_bus_wr_update_wm(void *priv, void *cmd_args,
 
 		CAM_SFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
 			wm_data->hw_regs->cfg, wm_data->en_cfg);
-		CAM_DBG(CAM_SFE, "WM:%d en_cfg 0x%X",
-			wm_data->index, reg_val_pair[j-1]);
+		CAM_DBG(CAM_SFE, "WM:%d %s en_cfg 0x%X",
+			wm_data->index, sfe_out_data->wm_res[i].res_name,
+			reg_val_pair[j-1]);
 
 		val = (wm_data->height << 16) | wm_data->width;
 		CAM_SFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
@@ -2630,6 +2704,7 @@ int cam_sfe_bus_wr_init(
 	bus_priv->common_data.line_done_cfg      = hw_info->line_done_cfg;
 	bus_priv->common_data.err_irq_subscribe  = false;
 	bus_priv->common_data.sfe_irq_controller = sfe_irq_controller;
+	bus_priv->constraint_error_list = hw_info->constraint_error_list;
 	rc = cam_cpas_get_cpas_hw_version(&bus_priv->common_data.hw_version);
 	if (rc) {
 		CAM_ERR(CAM_SFE, "Failed to get hw_version rc:%d", rc);

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_wr.h

@@ -11,6 +11,7 @@
 
 #define CAM_SFE_BUS_WR_MAX_CLIENTS     13
 #define CAM_SFE_BUS_WR_MAX_SUB_GRPS    6
+#define CAM_SFE_BUS_CONS_ERR_MAX       21
 
 enum cam_sfe_bus_wr_src_grp {
 	CAM_SFE_BUS_WR_SRC_GRP_0,
@@ -53,6 +54,16 @@ enum cam_sfe_bus_sfe_out_type {
 	CAM_SFE_BUS_SFE_OUT_MAX,
 };
 
+/*
+ * struct cam_sfe_constraint_error_info:
+ *
+ * @Brief:        Constraint error info
+ */
+struct cam_sfe_constraint_error_info {
+	uint32_t  bitmask;
+	char     *error_description;
+};
+
 /*
  * struct cam_sfe_bus_reg_offset_common:
  *
@@ -119,6 +130,7 @@ struct cam_sfe_bus_sfe_out_hw_info {
 	uint32_t                            mid[CAM_SFE_BUS_MAX_MID_PER_PORT];
 	uint32_t                            num_wm;
 	uint32_t                            wm_idx;
+	uint8_t                            *name;
 };
 
 /*
@@ -130,6 +142,7 @@ struct cam_sfe_bus_sfe_out_hw_info {
  * @num_client:       Total number of write clients
  * @bus_client_reg:   Bus client register info
  * @sfe_out_hw_info:  SFE output capability
+ * @constraint_error_list: Static list of all constraint errors
  * @num_comp_grp:     Number of composite groups
  * @comp_done_shift:  Mask shift for comp done mask
  * @line_done_cfg:    Line done cfg for wr/rd sync
@@ -143,6 +156,8 @@ struct cam_sfe_bus_wr_hw_info {
 	uint32_t num_out;
 	struct cam_sfe_bus_sfe_out_hw_info
 		sfe_out_hw_info[CAM_SFE_BUS_SFE_OUT_MAX];
+	struct cam_sfe_constraint_error_info
+		constraint_error_list[CAM_SFE_BUS_CONS_ERR_MAX];
 	uint32_t num_comp_grp;
 	uint32_t comp_done_shift;
 	uint32_t line_done_cfg;

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe480.h

@@ -1508,6 +1508,93 @@ static struct cam_vfe_bus_ver3_hw_info vfe480_bus_hw_info = {
 			},
 		},
 	},
+	.constraint_error_list = {
+		{
+			.bitmask = 0x000001,
+			.error_description = "PPC 1x1 illegal"
+		},
+		{
+			.bitmask = 0x000002,
+			.error_description = "PPC 1x2 illegal"
+		},
+		{
+			.bitmask = 0x000004,
+			.error_description = "PPC 2x1 illegal"
+		},
+		{
+			.bitmask = 0x000008,
+			.error_description = "PPC 2x2 illegal"
+		},
+		{
+			.bitmask = 0x000010,
+			.error_description = "Pack 8 BPP illegal"
+		},
+		{
+			.bitmask = 0x000020,
+			.error_description = "Pack 16 BPP illegal"
+		},
+		{
+			.bitmask = 0x000040,
+			.error_description = "Pack 32 BPP illegal"
+		},
+		{
+			.bitmask = 0x000080,
+			.error_description = "Pack 64 BPP illegal"
+		},
+		{
+			.bitmask = 0x000100,
+			.error_description = "Pack 128 BPP illegal"
+		},
+		{
+			.bitmask = 0x000200,
+			.error_description = "UBWC NV12 illegal"
+		},
+		{
+			.bitmask = 0x000400,
+			.error_description = "UBWC NV12 4R illegal"
+		},
+		{
+			.bitmask = 0x000800,
+			.error_description = "UBWC TP10 illegal"
+		},
+		{
+			.bitmask = 0x001000,
+			.error_description = "Frame based illegal"
+		},
+		{
+			.bitmask = 0x002000,
+			.error_description = "Index based illegal"
+		},
+		{
+			.bitmask = 0x004000,
+			.error_description = "Image address unalign"
+		},
+		{
+			.bitmask = 0x008000,
+			.error_description = "UBWC address unalign"
+		},
+		{
+			.bitmask = 0x010000,
+			.error_description = "Frame Header address unalign"
+		},
+		{
+			.bitmask = 0x020000,
+			.error_description = "X Initialization unalign"
+		},
+		{
+			.bitmask = 0x040000,
+			.error_description = "Image Width unalign"
+		},
+		{
+			.bitmask = 0x080000,
+			.error_description = "Image Height unalign"
+		},
+		{
+			.bitmask = 0x100000,
+			.error_description = "Meta Stride unalign"
+		},
+	},
+
 	.num_comp_grp    = 14,
 	.comp_done_shift = 6,
 	.top_irq_shift   = 7,

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h

@@ -1856,6 +1856,92 @@ static struct cam_vfe_bus_ver3_hw_info vfe680_bus_hw_info = {
 			},
 		},
 	},
+	.constraint_error_list = {
+		{
+			.bitmask = 0x000001,
+			.error_description = "PPC 1x1 illegal"
+		},
+		{
+			.bitmask = 0x000002,
+			.error_description = "PPC 1x2 illegal"
+		},
+		{
+			.bitmask = 0x000004,
+			.error_description = "PPC 2x1 illegal"
+		},
+		{
+			.bitmask = 0x000008,
+			.error_description = "PPC 2x2 illegal"
+		},
+		{
+			.bitmask = 0x000010,
+			.error_description = "Pack 8 BPP illegal"
+		},
+		{
+			.bitmask = 0x000020,
+			.error_description = "Pack 16 BPP illegal"
+		},
+		{
+			.bitmask = 0x000040,
+			.error_description = "Pack 32 BPP illegal"
+		},
+		{
+			.bitmask = 0x000080,
+			.error_description = "Pack 64 BPP illegal"
+		},
+		{
+			.bitmask = 0x000100,
+			.error_description = "Pack 128 BPP illegal"
+		},
+		{
+			.bitmask = 0x000200,
+			.error_description = "UBWC NV12 illegal"
+		},
+		{
+			.bitmask = 0x000400,
+			.error_description = "UBWC NV12 4R illegal"
+		},
+		{
+			.bitmask = 0x000800,
+			.error_description = "UBWC TP10 illegal"
+		},
+		{
+			.bitmask = 0x001000,
+			.error_description = "Frame based illegal"
+		},
+		{
+			.bitmask = 0x002000,
+			.error_description = "Index based illegal"
+		},
+		{
+			.bitmask = 0x004000,
+			.error_description = "Image address unalign"
+		},
+		{
+			.bitmask = 0x008000,
+			.error_description = "UBWC address unalign"
+		},
+		{
+			.bitmask = 0x010000,
+			.error_description = "Frame Header address unalign"
+		},
+		{
+			.bitmask = 0x020000,
+			.error_description = "X Initialization unalign"
+		},
+		{
+			.bitmask = 0x040000,
+			.error_description = "Image Width unalign"
+		},
+		{
+			.bitmask = 0x080000,
+			.error_description = "Image Height unalign"
+		},
+		{
+			.bitmask = 0x100000,
+			.error_description = "Meta Stride unalign"
+		},
+	},
 	.num_comp_grp    = 17,
 	.support_consumed_addr = true,
 	.comp_done_shift = 0,

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.c

@@ -72,12 +72,6 @@ struct cam_vfe_bus_ver3_comp_grp_acquire_args {
 	uint32_t                             composite_mask;
 };
 
-struct cam_vfe_bus_error_info {
-	uint32_t  bitmask;
-	uint32_t  vfe_output;
-	char     *error_description;
-};
-
 struct cam_vfe_bus_ver3_common_data {
 	uint32_t                                    core_index;
 	void __iomem                               *mem_base;
@@ -216,114 +210,7 @@ struct cam_vfe_bus_ver3_priv {
 	int                                 error_irq_handle;
 	void                               *tasklet_info;
 	uint32_t                            max_out_res;
-};
-
-static const struct cam_vfe_bus_error_info vfe_constraint_error_list[] = {
-	{
-		.bitmask = 0x000001,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "PPC 1x1 illegal"
-	},
-	{
-		.bitmask = 0x000002,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "PPC 1x2 illegal"
-	},
-	{
-		.bitmask = 0x000004,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "PPC 2x1 illegal"
-	},
-	{
-		.bitmask = 0x000008,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "PPC 2x2 illegal"
-	},
-	{
-		.bitmask = 0x000010,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Pack 8 BPP illegal"
-	},
-	{
-		.bitmask = 0x000020,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Pack 16 BPP illegal"
-	},
-	{
-		.bitmask = 0x000040,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Pack 32 BPP illegal"
-	},
-	{
-		.bitmask = 0x000080,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Pack 64 BPP illegal"
-	},
-	{
-		.bitmask = 0x000100,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Pack 128 BPP illegal"
-	},
-	{
-		.bitmask = 0x000200,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "UBWC NV12 illegal"
-	},
-	{
-		.bitmask = 0x000400,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "UBWC NV12 4R illegal"
-	},
-	{
-		.bitmask = 0x000800,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "UBWC TP10 illegal"
-	},
-	{
-		.bitmask = 0x001000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Frame based illegal"
-	},
-	{
-		.bitmask = 0x002000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Index based illegal"
-	},
-	{
-		.bitmask = 0x004000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Image address unalign"
-	},
-	{
-		.bitmask = 0x008000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "UBWC address unalign"
-	},
-	{
-		.bitmask = 0x010000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Frame Header address unalign"
-	},
-	{
-		.bitmask = 0x020000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "X Initialization unalign"
-	},
-	{
-		.bitmask = 0x040000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Image Width unalign"
-	},
-	{
-		.bitmask = 0x080000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Image Height unalign"
-	},
-	{
-		.bitmask = 0x100000,
-		.vfe_output = CAM_VFE_BUS_VER3_VFE_OUT_MAX,
-		.error_description = "Meta Stride unalign"
-	},
+	struct cam_vfe_constraint_error_info      *constraint_error_list;
 };
 
 static void cam_vfe_bus_ver3_unsubscribe_init_irq(
@@ -750,19 +637,21 @@ static int cam_vfe_bus_ver3_handle_rup_top_half(uint32_t evt_id,
 }
 
 static void cam_vfe_bus_ver3_print_constraint_errors(
-	uint32_t wm_idx,
+	struct cam_vfe_bus_ver3_priv *bus_priv,
+	uint8_t *wm_name,
 	uint32_t constraint_errors)
 {
 	uint32_t i;
 
-	CAM_INFO(CAM_ISP, "Constraint violation bitflags: %u",
+	CAM_INFO_RATE_LIMIT(CAM_ISP, "Constraint violation bitflags: 0x%X",
 		constraint_errors);
 
-	for (i = 0; i < ARRAY_SIZE(vfe_constraint_error_list); i++) {
-		if (vfe_constraint_error_list[i].bitmask & constraint_errors) {
-			CAM_INFO(CAM_ISP, "WM:%u %s programming",
-				wm_idx,
-				vfe_constraint_error_list[i].error_description);
+	for (i = 0; i < CAM_VFE_BUS_VER3_CONS_ERR_MAX; i++) {
+		if (bus_priv->constraint_error_list[i].bitmask &
+			constraint_errors) {
+			CAM_INFO(CAM_ISP, "WM:%s %s programming",
+				wm_name, bus_priv->constraint_error_list[i]
+				.error_description);
 		}
 	}
 }
@@ -771,6 +660,7 @@ static void cam_vfe_bus_ver3_get_constraint_errors(
 	struct cam_vfe_bus_ver3_priv *bus_priv)
 {
 	uint32_t i, j, constraint_errors;
+	uint8_t *wm_name = NULL;
 	struct cam_isp_resource_node              *out_rsrc_node = NULL;
 	struct cam_vfe_bus_ver3_vfe_out_data      *out_rsrc_data = NULL;
 	struct cam_vfe_bus_ver3_wm_resource_data  *wm_data   = NULL;
@@ -785,12 +675,16 @@ static void cam_vfe_bus_ver3_get_constraint_errors(
 		out_rsrc_data = out_rsrc_node->res_priv;
 		for (j = 0; j < out_rsrc_data->num_wm; j++) {
 			wm_data = out_rsrc_data->wm_res[j].res_priv;
+			wm_name = out_rsrc_data->wm_res[j].res_name;
 			if (wm_data) {
 				constraint_errors = cam_io_r_mb(
 					bus_priv->common_data.mem_base +
 					wm_data->hw_regs->debug_status_1);
-				cam_vfe_bus_ver3_print_constraint_errors(j,
-					constraint_errors);
+				if (!constraint_errors)
+					continue;
+
+				cam_vfe_bus_ver3_print_constraint_errors(
+					bus_priv, wm_name, constraint_errors);
 			}
 		}
 	}
@@ -3020,8 +2914,9 @@ static int cam_vfe_bus_ver3_update_wm(void *priv, void *cmd_args,
 
 		CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
 			wm_data->hw_regs->cfg, wm_data->en_cfg);
-		CAM_DBG(CAM_ISP, "WM:%d en_cfg 0x%X",
-			wm_data->index, reg_val_pair[j-1]);
+		CAM_DBG(CAM_ISP, "WM:%d %s en_cfg 0x%X",
+			wm_data->index, vfe_out_data->wm_res[i].res_name,
+			reg_val_pair[j-1]);
 
 		val = (wm_data->height << 16) | wm_data->width;
 		CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, j,
@@ -3798,6 +3693,7 @@ int cam_vfe_bus_ver3_init(
 	bus_priv->common_data.init_irq_subscribed = false;
 	bus_priv->common_data.pack_align_shift =
 		ver3_hw_info->pack_align_shift;
+	bus_priv->constraint_error_list = ver3_hw_info->constraint_error_list;
 
 	if (bus_priv->num_out >= CAM_VFE_BUS_VER3_VFE_OUT_MAX) {
 		CAM_ERR(CAM_ISP, "number of vfe out:%d more than max value:%d ",

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.h

@@ -14,6 +14,7 @@
 #define CAM_VFE_BUS_VER3_MAX_MID_PER_PORT 4
 #define CAM_VFE_BUS_VER3_480_MAX_CLIENTS     26
 #define CAM_VFE_BUS_VER3_680_MAX_CLIENTS     28
+#define CAM_VFE_BUS_VER3_CONS_ERR_MAX        21
 
 enum cam_vfe_bus_ver3_vfe_core_id {
 	CAM_VFE_BUS_VER3_VFE_CORE_0,
@@ -88,6 +89,16 @@ enum cam_vfe_bus_ver3_vfe_out_type {
 	CAM_VFE_BUS_VER3_VFE_OUT_MAX,
 };
 
+/*
+ * struct cam_vfe_constraint_error_info:
+ *
+ * @Brief:        Constraint error info
+ */
+struct cam_vfe_constraint_error_info {
+	uint32_t  bitmask;
+	char     *error_description;
+};
+
 /*
  * struct cam_vfe_bus_ver3_reg_offset_common:
  *
@@ -191,6 +202,7 @@ struct cam_vfe_bus_ver3_vfe_out_hw_info {
  * @num_client:            Total number of write clients
  * @bus_client_reg:        Bus client register info
  * @vfe_out_hw_info:       VFE output capability
+ * @constraint_error_list: Static list of all constraint errors
  * @num_comp_grp:          Number of composite groups
  * @comp_done_shift:       Mask shift for comp done mask
  * @top_irq_shift:         Mask shift for top level BUS WR irq
@@ -208,6 +220,8 @@ struct cam_vfe_bus_ver3_hw_info {
 	uint32_t num_out;
 	struct cam_vfe_bus_ver3_vfe_out_hw_info
 		vfe_out_hw_info[CAM_VFE_BUS_VER3_VFE_OUT_MAX];
+	struct cam_vfe_constraint_error_info
+		constraint_error_list[CAM_VFE_BUS_VER3_CONS_ERR_MAX];
 	uint32_t num_comp_grp;
 	uint32_t comp_done_shift;
 	uint32_t top_irq_shift;