asoc: codecs: Implement lpass PBR feature

Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.

Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
This commit is contained in:
Matthew Rice
2022-01-11 17:09:45 -08:00
committed by Gerrit - the friendly Code Review server
parent 8f819a5cda
commit 9284d9af02
3 changed files with 416 additions and 8 deletions

View File

@@ -84,6 +84,173 @@ struct macro_ops {
u16 default_clk_id;
};
enum {
G_21_DB = 0,
G_19P5_DB,
G_18_DB,
G_16P5_DB,
G_15_DB,
G_13P5_DB,
G_12_DB,
G_10P5_DB,
G_9_DB,
G_7P5_DB,
G_6_DB,
G_4P5_DB,
G_3_DB,
G_1P5_DB,
G_0_DB,
G_M1P5_DB,
G_M3_DB,
G_M4P5_DB,
G_M6_DB,
G_MAX_DB,
};
enum {
EXT_ABOVE_3S,
CONFIG_1S,
CONFIG_2S,
CONFIG_3S,
EXT_1S,
EXT_2S,
EXT_3S,
CONFIG_MAX,
};
enum {
WSA_4_OHMS = 0,
WSA_6_OHMS,
WSA_8_OHMS,
WSA_32_OHMS,
WSA_MAX_OHMS,
};
/*
* PBR Thresholds from system_gain, bat_cfg, and rload
* EXT_ABOVE_3S: WSA_4_OHMS, WSA_6_OHMS, WSA_8_OHMS, WSA_32_OHMS, CONFIG_1S: ...
*/
static const int pbr_vth1_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
/* G_21_DB */
{
{0, 0, 0, 0}, {81, 92, 196, 0},
{121, 148, 144, 0}, {158, 193, 192, 0}
},
/* G_19P5_DB */
{
{0, 0, 0, 0}, {96, 109, 126, 0},
{143, 148, 203, 0}, {188, 198, 255, 0}
},
/* G_18_DB */
{
{0, 0, 0, 0}, {106, 130, 150, 0},
{144, 209, 241, 0}, {192, 255, 255, 0}
},
/* G_16P5_DB */
{
{0, 0, 0, 0}, {135, 154, 178, 0},
{202, 248, 255, 0}, {255, 255, 255, 0}
},
/* G_15_DB */
{
{0, 0, 0, 0}, {160, 183, 211, 0},
{240, 255, 255, 0}, {255, 255, 255, 0}
},
/* G_13P5_DB */
{
{0, 0, 0, 0}, {190, 217, 251, 0},
{255, 255, 255, 0}, {255, 255, 255, 0}
},
/* G_12_DB */
{
{0, 0, 0, 0}, {226, 255, 255, 0},
{225, 255, 255, 0}, {255, 255, 255, 0}
},
};
static const int pbr_vth2_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 112, 0}, {0, 0, 151, 0}, {0, 0, 196, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 115, 0, 0}, {0, 155, 0, 0}, {0, 201, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {112, 0, 0, 0}, {150, 0, 0, 0}, {195, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth3_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 118, 0}, {0, 0, 157, 0}, {0, 0, 199, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 122, 0, 0}, {0, 162, 0, 0}, {0, 205, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {118, 0, 0, 0}, {157, 0, 0, 0}, {199, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth4_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 125, 0}, {0, 0, 163, 0}, {0, 0, 202, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 129, 0, 0}, {0, 168, 0, 0}, {0, 208, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {125, 0, 0, 0}, {163, 0, 0, 0}, {202, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth5_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 131, 0}, {0, 0, 170, 0}, {0, 0, 205, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 135, 0, 0}, {0, 175, 0, 0}, {0, 211, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {131, 0, 0, 0}, {170, 0, 0, 0}, {205, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth6_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 138, 0}, {0, 0, 176, 0}, {0, 0, 208, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 142, 0, 0}, {0, 182, 0, 0}, {0, 215, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {138, 0, 0, 0}, {176, 0, 0, 0}, {208, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth7_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 144, 0}, {0, 0, 183, 0}, {0, 0, 212, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 148, 0, 0}, {0, 188, 0, 0}, {0, 218, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {0, 0, 144, 0}, {0, 0, 183, 0}, {0, 0, 212, 0} }, /* G_18_DB */
};
static const int pbr_vth8_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 151, 0}, {0, 0, 189, 0}, {0, 0, 215, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 155, 0, 0}, {0, 195, 0, 0}, {0, 221, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {150, 0, 0, 0}, {189, 0, 0, 0}, {215, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth9_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 157, 0}, {0, 0, 196, 0}, {0, 0, 218, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 162, 0, 0}, {0, 201, 0, 0}, {0, 225, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {157, 0, 0, 0}, {195, 0, 0, 0}, {218, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth10_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 163, 0}, {0, 0, 202, 0}, {0, 0, 221, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 168, 0, 0}, {0, 208, 0, 0}, {0, 228, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {163, 0, 0, 0}, {202, 0, 0, 0}, {221, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth11_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 170, 0}, {0, 0, 208, 0}, {0, 0, 225, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 175, 0, 0}, {0, 215, 0, 0}, {0, 231, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {170, 0, 0, 0}, {208, 0, 0, 0}, {224, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth12_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 176, 0}, {0, 0, 215, 0}, {0, 0, 228, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 182, 0, 0}, {0, 221, 0, 0}, {0, 234, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {176, 0, 0, 0}, {215, 0, 0, 0}, {228, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth13_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 183, 0}, {0, 0, 221, 0}, {0, 0, 231, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 188, 0, 0}, {0, 228, 0, 0}, {0, 238, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {183, 0, 0, 0}, {221, 0, 0, 0}, {231, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth14_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 189, 0}, {0, 0, 228, 0}, {0, 0, 234, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 195, 0, 0}, {0, 234, 0, 0}, {0, 241, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {189, 0, 0, 0}, {228, 0, 0, 0}, {234, 0, 0, 0} }, /* G_18_DB */
};
static const int pbr_vth15_data[G_MAX_DB][CONFIG_MAX][WSA_MAX_OHMS] = {
{ {0, 0, 0, 0}, {0, 0, 196, 0}, {0, 0, 234, 0}, {0, 0, 237, 0} }, /* G_21_DB */
{ {0, 0, 0, 0}, {0, 201, 0, 0}, {0, 241, 0, 0}, {0, 244, 0, 0} }, /* G_19P5_DB */
{ {0, 0, 0, 0}, {195, 0, 0, 0}, {234, 0, 0, 0}, {237, 0, 0, 0} }, /* G_18_DB */
};
typedef int (*rsc_clk_cb_t)(struct device *dev, u16 event);
#if IS_ENABLED(CONFIG_SND_SOC_LPASS_CDC)