Merge "asoc: bolero: Update rx dc droop register setting"
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@@ -1709,13 +1709,6 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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dev_dbg(component->dev, "%s: event %d compander %d, enabled %d\n",
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__func__, event, comp + 1, rx_priv->comp_enabled[comp]);
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if (!rx_priv->comp_enabled[comp])
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return 0;
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comp_ctl0_reg = BOLERO_CDC_RX_COMPANDER0_CTL0 +
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(comp * RX_MACRO_COMP_OFFSET);
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rx_path_cfg0_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG0 +
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(comp * RX_MACRO_RX_PATH_OFFSET);
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rx_path_cfg3_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG3 +
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(comp * RX_MACRO_RX_PATH_OFFSET);
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rx0_path_ctl_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
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@@ -1731,6 +1724,19 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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else
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val = 0x00;
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if (SND_SOC_DAPM_EVENT_ON(event))
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snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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0x03, val);
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if (SND_SOC_DAPM_EVENT_OFF(event))
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snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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0x03, 0x03);
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if (!rx_priv->comp_enabled[comp])
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return 0;
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comp_ctl0_reg = BOLERO_CDC_RX_COMPANDER0_CTL0 +
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(comp * RX_MACRO_COMP_OFFSET);
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rx_path_cfg0_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG0 +
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(comp * RX_MACRO_RX_PATH_OFFSET);
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if (SND_SOC_DAPM_EVENT_ON(event)) {
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/* Enable Compander Clock */
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snd_soc_component_update_bits(component, comp_ctl0_reg,
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@@ -1741,8 +1747,6 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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0x02, 0x00);
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snd_soc_component_update_bits(component, rx_path_cfg0_reg,
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0x02, 0x02);
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snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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0x03, val);
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}
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if (SND_SOC_DAPM_EVENT_OFF(event)) {
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@@ -1754,8 +1758,6 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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0x01, 0x00);
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snd_soc_component_update_bits(component, comp_ctl0_reg,
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0x04, 0x00);
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snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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0x03, 0x03);
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}
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return 0;
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