msm: camera: tfe: handle out_of_sync interrupt as non fatal

Handle out_of_sync_frame_drop interrupt as non fatal till
3 successive occurences. fix prevention of mup bit override
when programming RDI.

CRs-Fixed: 3638271
Change-Id: Ie2f7ef476b76b5074b12b0eb503ae0be1100611a
Signed-off-by: Pranav Sanwal <[email protected]>

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe665.h

@@ -1446,10 +1446,15 @@ struct cam_tfe_hw_info cam_tfe665 = {
 		0x00000000,
 	},
 	.error_irq_mask = {
-		0x003F1F00,
+		0x001F1F00,
 		0x00000000,
 		0x000002FF,
 	},
+	.non_fatal_error_irq_mask = {
+		0x00200000,
+		0x00000000,
+		0x00000000,
+	},
 	.bus_reg_irq_mask = {
 		0x00000002,
 		0x00000000,

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe770.h

@@ -1446,10 +1446,15 @@ struct cam_tfe_hw_info cam_tfe770 = {
 		0x00000000,
 	},
 	.error_irq_mask = {
-		0x003F1F00,
+		0x001F1F00,
 		0x00000000,
 		0x000002FF,
 	},
+	.non_fatal_error_irq_mask = {
+		0x00200000,
+		0x00000000,
+		0x00000000,
+	},
 	.bus_reg_irq_mask = {
 		0x00000002,
 		0x00000000,

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c

@@ -366,8 +366,7 @@ static void cam_tfe_log_error_irq_status(
 	struct cam_tfe_hw_core_info          *core_info,
 	struct cam_tfe_top_priv              *top_priv,
 	struct cam_tfe_irq_evt_payload       *evt_payload,
-	struct cam_isp_hw_error_event_info   *err_evt_info,
-	int8_t                               *report_err)
+	struct cam_isp_hw_error_event_info   *err_evt_info)
 {
 	struct cam_tfe_hw_info               *hw_info;
 	void __iomem                         *mem_base;
@@ -379,7 +378,6 @@ static void cam_tfe_log_error_irq_status(
 	struct timespec64 ts;
 	uint32_t  i, val_0, val_1, val_2, val_3;
 
-	*report_err = 1;
 	ktime_get_boottime_ts64(&ts);
 	hw_info = core_info->tfe_hw_info;
 	mem_base = top_priv->common_data.soc_info->reg_map[0].mem_base;
@@ -387,10 +385,10 @@ static void cam_tfe_log_error_irq_status(
 	soc_private = top_priv->common_data.soc_info->soc_private;
 	common_reg = top_priv->common_data.common_reg;
 
-	CAM_INFO(CAM_ISP, "current monotonic timestamp:[%lld.%06lld]",
+	CAM_INFO(CAM_ISP, "current monotonic time stamp seconds %lld:%lld",
 		ts.tv_sec, ts.tv_nsec/1000);
 	CAM_INFO(CAM_ISP,
-		"ERROR timestamp:[%lld.%06lld] SOF timestamp:[%lld.%06lld] EPOCH timestamp:[%lld.%06lld] EOF timestamp:[%lld.%06lld]",
+		"ERROR time %lld:%lld SOF %lld:%lld EPOCH %lld:%lld EOF %lld:%lld",
 		top_priv->error_ts.tv_sec,
 		top_priv->error_ts.tv_nsec/1000,
 		top_priv->sof_ts.tv_sec,
@@ -471,23 +469,6 @@ static void cam_tfe_log_error_irq_status(
 
 		if (evt_payload->irq_reg_val[0] & common_reg->ppp_overflow_bit)
 			CAM_INFO(CAM_ISP, "TFE %d PDAF_OVERFLOW", core_info->core_index);
-
-		if (evt_payload->irq_reg_val[0] & common_reg->out_of_sync_frame_drop_bit) {
-			CAM_INFO(CAM_ISP,
-				"TFE %d SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP mup: last %d curr %d",
-				core_info->core_index, top_priv->last_mup_val,
-				((cam_io_r(mem_base + common_reg->reg_update_cmd) >>
-				common_reg->mup_shift_val) & 1));
-			*report_err = 0;
-			atomic_inc(&top_priv->switch_out_of_sync_cnt);
-			if (atomic_read(&top_priv->switch_out_of_sync_cnt) >=
-				CAM_TFE_MAX_OUT_OF_SYNC_ERR_COUNT) {
-				*report_err = 1;
-				err_evt_info->err_type = CAM_TFE_IRQ_STATUS_OUT_OF_SYNC;
-				CAM_ERR(CAM_ISP, "TFE %d out of sync frame count: %d",
-					core_info->core_index, top_priv->switch_out_of_sync_cnt);
-			}
-		}
 	}
 
 	/* Check the violation errors */
@@ -540,6 +521,36 @@ static void cam_tfe_log_error_irq_status(
 	cam_cpas_log_votes(false);
 }
 
+static void cam_tfe_check_out_of_sync(
+	struct cam_tfe_hw_core_info          *core_info,
+	struct cam_tfe_top_priv              *top_priv,
+	struct cam_tfe_irq_evt_payload       *evt_payload,
+	struct cam_isp_hw_error_event_info   *err_evt_info,
+	uint32_t                             *report_err)
+{
+	struct cam_tfe_top_reg_offset_common *common_reg;
+	void __iomem                         *mem_base;
+
+	mem_base = top_priv->common_data.soc_info->reg_map[0].mem_base;
+	common_reg = top_priv->common_data.common_reg;
+
+	if (evt_payload->irq_reg_val[0] & common_reg->out_of_sync_frame_drop_bit) {
+		CAM_INFO(CAM_ISP,
+			"TFE %d SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP mup: last %d curr %d",
+			core_info->core_index, top_priv->last_mup_val,
+			((cam_io_r(mem_base + common_reg->reg_update_cmd) >>
+			common_reg->mup_shift_val) & 1));
+		atomic_inc(&top_priv->switch_out_of_sync_cnt);
+		if (atomic_read(&top_priv->switch_out_of_sync_cnt) >=
+			CAM_TFE_MAX_OUT_OF_SYNC_ERR_COUNT) {
+			*report_err = 1;
+			err_evt_info->err_type = CAM_TFE_IRQ_STATUS_OUT_OF_SYNC;
+			CAM_ERR(CAM_ISP, "TFE %d out of sync frame count: %d",
+				core_info->core_index, top_priv->switch_out_of_sync_cnt);
+		}
+	}
+}
+
 static int cam_tfe_error_irq_bottom_half(
 	struct cam_tfe_hw_core_info          *core_info,
 	struct cam_tfe_top_priv              *top_priv,
@@ -551,7 +562,6 @@ static int cam_tfe_error_irq_bottom_half(
 	struct cam_isp_hw_event_info         evt_info;
 	struct cam_tfe_hw_info              *hw_info;
 	uint32_t   error_detected = 0;
-	int8_t report_err = 1;
 
 	hw_info = core_info->tfe_hw_info;
 	evt_info.hw_idx = core_info->core_index;
@@ -563,6 +573,11 @@ static int cam_tfe_error_irq_bottom_half(
 		error_detected = 1;
 	}
 
+	if (evt_payload->irq_reg_val[0] & hw_info->non_fatal_error_irq_mask[0]) {
+		cam_tfe_check_out_of_sync(core_info, top_priv, evt_payload,
+				&err_evt_info, &error_detected);
+	}
+
 	if ((evt_payload->bus_irq_val[0] & hw_info->bus_error_irq_mask[0]) ||
 		(evt_payload->irq_reg_val[2] & hw_info->error_irq_mask[2])) {
 		err_evt_info.err_type = CAM_TFE_IRQ_STATUS_VIOLATION;
@@ -577,15 +592,13 @@ static int cam_tfe_error_irq_bottom_half(
 			evt_payload->ts.mono_time.tv_nsec;
 
 		cam_tfe_log_error_irq_status(core_info, top_priv,
-			evt_payload, &err_evt_info, &report_err);
-		if (report_err) {
-			if (event_cb)
-				event_cb(event_cb_priv, CAM_ISP_HW_EVENT_ERROR,
-					(void *)&evt_info);
-			else
-				CAM_ERR(CAM_ISP, "TFE:%d invalid eventcb:",
-					core_info->core_index);
-		}
+			evt_payload, &err_evt_info);
+		if (event_cb)
+			event_cb(event_cb_priv, CAM_ISP_HW_EVENT_ERROR,
+				(void *)&evt_info);
+		else
+			CAM_ERR(CAM_ISP, "TFE:%d invalid eventcb:",
+				core_info->core_index);
 	}
 
 	return 0;
@@ -1485,6 +1498,9 @@ static int cam_tfe_top_update_mup(
 	mup_val = mup_config->mup;
 	common_reg = top_priv->common_data.common_reg;
 
+	 CAM_DBG(CAM_ISP, "TFE: %d mup_val: %d, mup_en: %d",
+				top_priv->common_data.hw_intf->hw_idx, mup_val, mup_config->mup_en);
+
 	if (mup_config->mup_en) {
 		final_mup = (mup_val << common_reg->mup_shift_val);
 		top_priv->last_mup_val = mup_val;
@@ -2526,10 +2542,13 @@ static int cam_tfe_camif_resource_start(
 	camif_res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;
 
 	/* Reg Update */
-	cam_io_w_mb(rsrc_data->reg_data->reg_update_cmd_data,
+	cam_io_w_mb(rsrc_data->reg_data->reg_update_cmd_data |
+		(top_priv->last_mup_val << common_reg->mup_shift_val),
 		rsrc_data->mem_base + rsrc_data->camif_reg->reg_update_cmd);
-	CAM_DBG(CAM_ISP, "hw id:%d RUP val:%d", camif_res->hw_intf->hw_idx,
-		rsrc_data->reg_data->reg_update_cmd_data);
+	CAM_DBG(CAM_ISP, "hw id:%d RUP val:%d MUP val: %d",
+		camif_res->hw_intf->hw_idx,
+		rsrc_data->reg_data->reg_update_cmd_data,
+		top_priv->last_mup_val);
 
 	/* Disable sof irq debug flag */
 	rsrc_data->enable_sof_irq_debug = false;
@@ -2633,7 +2652,6 @@ int cam_tfe_top_start(struct cam_tfe_hw_core_info *core_info,
 		goto end;
 	}
 
-	top_priv->last_mup_val = 0;
 	rc = cam_tfe_top_set_hw_clk_rate(top_priv);
 	if (rc) {
 		CAM_ERR(CAM_ISP, "TFE:%d set_hw_clk_rate failed, rc=%d",
@@ -2668,11 +2686,17 @@ int cam_tfe_top_start(struct cam_tfe_hw_core_info *core_info,
 			rsrc_rdi_data->rdi_reg->rdi_epoch_irq);
 
 		/* Reg Update */
-		cam_io_w_mb(rsrc_rdi_data->reg_data->reg_update_cmd_data,
-			rsrc_rdi_data->mem_base +
+		val = cam_io_r_mb(rsrc_rdi_data->mem_base + rsrc_rdi_data->rdi_reg->reg_update_cmd);
+		val |= rsrc_rdi_data->reg_data->reg_update_cmd_data;
+		cam_io_w_mb(val, rsrc_rdi_data->mem_base +
 			rsrc_rdi_data->rdi_reg->reg_update_cmd);
 		in_res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;
 
+		CAM_DBG(CAM_ISP, "hw id:%d RUP val:%d MUP val: %d",
+			in_res->hw_intf->hw_idx,
+			rsrc_rdi_data->reg_data->reg_update_cmd_data,
+			top_priv->last_mup_val);
+
 		/* Enable the irq */
 		if (in_res->is_rdi_primary_res)
 			cam_tfe_irq_config(core_info,
@@ -2699,6 +2723,9 @@ int cam_tfe_top_start(struct cam_tfe_hw_core_info *core_info,
 		cam_tfe_irq_config(core_info,
 			core_info->tfe_hw_info->error_irq_mask,
 			CAM_TFE_TOP_IRQ_REG_NUM, true);
+		cam_tfe_irq_config(core_info,
+			core_info->tfe_hw_info->non_fatal_error_irq_mask,
+			CAM_TFE_TOP_IRQ_REG_NUM, true);
 		top_priv->error_ts.tv_sec = 0;
 		top_priv->error_ts.tv_nsec = 0;
 		top_priv->sof_ts.tv_sec = 0;
@@ -2802,10 +2829,14 @@ int cam_tfe_top_stop(struct cam_tfe_hw_core_info *core_info,
 
 	atomic_set(&top_priv->switch_out_of_sync_cnt, 0);
 	core_info->irq_err_config_cnt--;
-	if (!core_info->irq_err_config_cnt)
+	if (!core_info->irq_err_config_cnt) {
 		cam_tfe_irq_config(core_info,
 			core_info->tfe_hw_info->error_irq_mask,
 			CAM_TFE_TOP_IRQ_REG_NUM, false);
+		cam_tfe_irq_config(core_info,
+			core_info->tfe_hw_info->non_fatal_error_irq_mask,
+			CAM_TFE_TOP_IRQ_REG_NUM, false);
+	}
 
 	return rc;
 }

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.h

@@ -320,6 +320,7 @@ struct cam_tfe_hw_info {
 
 	uint32_t    reset_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
 	uint32_t    error_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
+	uint32_t    non_fatal_error_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
 	uint32_t    bus_reg_irq_mask[CAM_TFE_BUS_MAX_IRQ_REGISTERS];
 	uint32_t    bus_error_irq_mask[CAM_TFE_BUS_MAX_IRQ_REGISTERS];
 

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_lite770.h

@@ -559,10 +559,15 @@ struct cam_tfe_hw_info cam_tfe_lite770 = {
 		0x00000000,
 	},
 	.error_irq_mask = {
-		0x000F0F00,
+		0x001F1F00,
 		0x00000000,
 		0x0000003F,
 	},
+	.non_fatal_error_irq_mask = {
+		0x00200000,
+		0x00000000,
+		0x00000000,
+	},
 	.bus_reg_irq_mask = {
 		0x00000002,
 		0x00000000,