msm: camera: sensor: Add CCI support for 32 bits register Address

Add support for 32 bits wide sensor ID for CCI hw during sensor
match ID operation.

CRs-Fixed: 3210196
Change-Id: Idef7f5cd3d7199198d0c6aa06ce54415a409d147
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
This commit is contained in:
Jigar Agrawal
2022-05-31 14:45:16 -07:00
committed by Camera Software Integration
parent ac546a16c5
commit 909b2ed98e
4 changed files with 41 additions and 36 deletions

View File

@@ -724,7 +724,7 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
{
uint16_t i = 0, j = 0, k = 0, h = 0, len = 0;
int32_t rc = 0, free_size = 0, en_seq_write = 0;
uint8_t data[12];
uint8_t write_data[CAM_MAX_NUM_CCI_PAYLOAD_BYTES + 1] = {0};
struct cam_sensor_i2c_reg_setting *i2c_msg =
&c_ctrl->cfg.cci_i2c_write_cfg;
struct cam_sensor_i2c_reg_array *i2c_cmd = i2c_msg->reg_setting;
@@ -848,7 +848,7 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
cci_dev->soc_info.index, master, queue, cmd_size, i2c_cmd->reg_addr, i2c_cmd->reg_data);
delay = i2c_cmd->delay;
i = 0;
data[i++] = CCI_I2C_WRITE_CMD;
write_data[i++] = CCI_I2C_WRITE_CMD;
/*
* in case of multiple command
@@ -865,37 +865,34 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
reg_addr = i2c_cmd->reg_addr;
if (en_seq_write == 0) {
/* either byte or word addr */
if (i2c_msg->addr_type == CAMERA_SENSOR_I2C_TYPE_BYTE)
data[i++] = reg_addr;
else {
data[i++] = (reg_addr & 0xFF00) >> 8;
data[i++] = reg_addr & 0x00FF;
for (j = 0; j < i2c_msg->addr_type; j++) {
write_data[i2c_msg->addr_type - j] = (reg_addr >> (j * 8)) & 0xFF;
i++;
}
}
/* max of 10 data bytes */
do {
if (i2c_msg->data_type == CAMERA_SENSOR_I2C_TYPE_BYTE) {
data[i++] = i2c_cmd->reg_data;
write_data[i++] = i2c_cmd->reg_data;
if (c_ctrl->cmd == MSM_CCI_I2C_WRITE_SEQ)
reg_addr++;
} else {
if ((i + 1) <= cci_dev->payload_size) {
switch (i2c_msg->data_type) {
case CAMERA_SENSOR_I2C_TYPE_DWORD:
data[i++] = (i2c_cmd->reg_data &
write_data[i++] = (i2c_cmd->reg_data &
0xFF000000) >> 24;
/* fallthrough */
case CAMERA_SENSOR_I2C_TYPE_3B:
data[i++] = (i2c_cmd->reg_data &
write_data[i++] = (i2c_cmd->reg_data &
0x00FF0000) >> 16;
/* fallthrough */
case CAMERA_SENSOR_I2C_TYPE_WORD:
data[i++] = (i2c_cmd->reg_data &
write_data[i++] = (i2c_cmd->reg_data &
0x0000FF00) >> 8;
/* fallthrough */
case CAMERA_SENSOR_I2C_TYPE_BYTE:
data[i++] = i2c_cmd->reg_data &
write_data[i++] = i2c_cmd->reg_data &
0x000000FF;
break;
default:
@@ -905,8 +902,7 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
return -EINVAL;
}
if (c_ctrl->cmd ==
MSM_CCI_I2C_WRITE_SEQ)
if (c_ctrl->cmd == MSM_CCI_I2C_WRITE_SEQ)
reg_addr++;
} else
break;
@@ -923,10 +919,10 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
((i-1) == MSM_CCI_WRITE_DATA_PAYLOAD_SIZE_11) &&
cci_dev->support_seq_write && cmd_size > 0 &&
free_size > BURST_MIN_FREE_SIZE) {
data[0] |= 0xF0;
write_data[0] |= 0xF0;
en_seq_write = 1;
} else {
data[0] |= ((i-1) << 4);
write_data[0] |= ((i-1) << 4);
en_seq_write = 0;
}
len = ((i-1)/4) + 1;
@@ -936,7 +932,7 @@ static int32_t cam_cci_data_queue(struct cci_device *cci_dev,
for (h = 0, k = 0; h < len; h++) {
cmd = 0;
for (j = 0; (j < 4 && k < i); j++)
cmd |= (data[k++] << (j * 8));
cmd |= (write_data[k++] << (j * 8));
CAM_DBG(CAM_CCI,
"CCI%d_I2C_M%d_Q%d LOAD_DATA_ADDR 0x%x, len:%d, cnt: %d",
cci_dev->soc_info.index, master, queue, cmd, len, read_val);
@@ -1179,7 +1175,8 @@ read_again:
read_cfg->data[index] =
(val >> (i * 8)) & 0xFF;
CAM_DBG(CAM_CCI, "CCI%d_I2C_M%d_Q%d data[%d] 0x%x",
cci_dev->soc_info.index, master, queue, index, read_cfg->data[index]);
cci_dev->soc_info.index, master, queue, index,
read_cfg->data[index]);
index++;
}
}
@@ -1271,6 +1268,8 @@ static int32_t cam_cci_read(struct v4l2_subdev *sd,
{
int32_t rc = 0;
uint32_t val = 0;
uint8_t read_data_byte[CAM_MAX_NUM_CCI_PAYLOAD_BYTES + 1] = {0};
uint32_t *reg_addr;
int32_t read_words = 0, exp_words = 0;
int32_t index = 0, first_byte = 0;
uint32_t i = 0;
@@ -1363,19 +1362,24 @@ static int32_t cam_cci_read(struct v4l2_subdev *sd,
goto rel_mutex_q;
}
val = CCI_I2C_WRITE_DISABLE_P_CMD | (read_cfg->addr_type << 4);
read_data_byte[0] = CCI_I2C_WRITE_DISABLE_P_CMD | (read_cfg->addr_type << 4);
for (i = 0; i < read_cfg->addr_type; i++) {
val |= ((read_cfg->addr >> (i << 3)) & 0xFF) <<
((read_cfg->addr_type - i) << 3);
read_data_byte[read_cfg->addr_type - i] = (read_cfg->addr >> (i * 8)) & 0xFF;
}
rc = cam_cci_write_i2c_queue(cci_dev, val, master, queue);
reg_addr = (uint32_t *)&read_data_byte[0];
read_words = DIV_ROUND_UP(read_cfg->addr_type + 1, 4);
for (i = 0; i < read_words; i++) {
rc = cam_cci_write_i2c_queue(cci_dev, *reg_addr, master, queue);
if (rc < 0) {
CAM_DBG(CAM_CCI,
"CCI%d_I2C_M%d_Q%d Failed to write disable_cmd for rc: %d",
cci_dev->soc_info.index, master, queue, rc);
goto rel_mutex_q;
}
reg_addr++;
}
val = CCI_I2C_READ_CMD | (read_cfg->num_byte << 4);
rc = cam_cci_write_i2c_queue(cci_dev, val, master, queue);

View File

@@ -801,8 +801,8 @@ int cam_sensor_match_id(struct cam_sensor_ctrl_t *s_ctrl)
rc = camera_io_dev_read(
&(s_ctrl->io_master_info),
slave_info->sensor_id_reg_addr,
&chipid, CAMERA_SENSOR_I2C_TYPE_WORD,
CAMERA_SENSOR_I2C_TYPE_WORD, true);
&chipid, s_ctrl->sensor_probe_addr_type,
s_ctrl->sensor_probe_data_type, true);
CAM_DBG(CAM_SENSOR, "%s read id: 0x%x expected id 0x%x:",
s_ctrl->sensor_name, chipid, slave_info->sensor_id);

View File

@@ -262,10 +262,10 @@ struct cam_sensor_power_ctrl_t {
};
struct cam_camera_slave_info {
uint16_t sensor_slave_addr;
uint16_t sensor_id_reg_addr;
uint16_t sensor_id;
uint16_t sensor_id_mask;
uint32_t sensor_slave_addr;
uint32_t sensor_id_reg_addr;
uint32_t sensor_id;
uint32_t sensor_id_mask;
};
struct msm_sensor_init_params {

View File

@@ -19,6 +19,7 @@
#define CAM_COMMON_MINI_DUMP_SIZE 10 * 1024 * 1024
#define CAM_COMMON_HW_DUMP_TAG_MAX_LEN 64
#define CAM_MAX_NUM_CCI_PAYLOAD_BYTES 11
#define CAM_COMMON_ERR_MODULE_PARAM_MAX_LENGTH 4096
#define CAM_COMMON_ERR_INJECT_BUFFER_LEN 200