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Merge be0b2c330f148fc6433cd532fc788618038d3ed2 on remote branch

Change-Id: I0219e607a4227ba88f69e3397d7b3fb358f19696
Linux Build Service Account 1 年之前
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8f92d6c1e0

+ 1 - 1
Kbuild

@@ -10,7 +10,7 @@ ifneq ($(CONFIG_ARCH_QTI_VM), y)
 endif
 
 #Enable Qseecom if CONFIG_ARCH_KHAJE OR CONFIG_ARCH_KHAJE or CONFIG_QTI_QUIN_GVM is set to y
-ifneq (, $(filter y, $(CONFIG_QTI_QUIN_GVM) $(CONFIG_ARCH_KHAJE) $(CONFIG_ARCH_SA8155)))
+ifneq (, $(filter y, $(CONFIG_QTI_QUIN_GVM) $(CONFIG_ARCH_KHAJE) $(CONFIG_ARCH_SA8155) $(CONFIG_ARCH_BLAIR) $(CONFIG_ARCH_SA6155)))
     include $(SSG_MODULE_ROOT)/config/sec-kernel_defconfig_qseecom.conf
     LINUXINCLUDE += -include $(SSG_MODULE_ROOT)/config/sec-kernel_defconfig_qseecom.h
 else

+ 3 - 2
crypto-qti/qce50.c

@@ -86,7 +86,8 @@ static LIST_HEAD(qce50_bam_list);
 
 #define AES_CTR_IV_CTR_SIZE	64
 
-#define QCE_STATUS1_NO_ERROR	0x2000006
+#define QCE_NO_ERROR_VAL1	0x2000006
+#define QCE_NO_ERROR_VAL2	0x2000004
 
 // Crypto Engines 5.7 and below
 // Key timer expiry for pipes 1-15 (Status3)
@@ -247,7 +248,7 @@ void qce_get_crypto_status(void *handle, struct qce_error *error)
 	dump_status_regs(status);
 #endif
 
-	if (status[0] != QCE_STATUS1_NO_ERROR || status[1]) {
+	if (status[0] != QCE_NO_ERROR_VAL1 && status[0] != QCE_NO_ERROR_VAL2) {
 		if (pce_dev->ce_bam_info.minor_version >= 8) {
 			if (status[2] & CRYPTO58_TIMER_EXPIRED) {
 				error->timer_error = true;

+ 5 - 4
hdcp/hdcp2p2.h

@@ -82,26 +82,27 @@ static inline int32_t hdcp2p2_tx_deinit(struct Object self, uint32_t ctxhandle_v
 static inline int32_t hdcp2p2_rcvd_msg(
 	struct Object self, const void *reqMsg_ptr, size_t reqMsg_len,
 	uint32_t ctxhandle_val, void *resMsg_ptr, size_t resMsg_len,
-	size_t *resMsg_lenout, uint32_t *timeout_ptr, uint32_t *flag_ptr)
+	size_t *resMsg_lenout, uint32_t *timeout_ptr, uint32_t *flag_ptr, uint32_t *state_ptr)
 {
 	union ObjectArg a[4] = {{{0, 0}}};
 	int32_t result = 0;
 	struct {
 		uint32_t m_timeout;
 		uint32_t m_flag;
+		uint32_t m_state;
 	} o;
-
-	a[2].b = (struct ObjectBuf) {&o, 8};
+	a[2].b = (struct ObjectBuf) {&o, 12};
 	a[0].bi = (struct ObjectBufIn) {reqMsg_ptr, reqMsg_len * 1};
 	a[1].b = (struct ObjectBuf) {&ctxhandle_val, sizeof(uint32_t)};
 	a[3].b = (struct ObjectBuf) {resMsg_ptr, resMsg_len * 1};
 
 	result = Object_invoke(self, HDCP2P2_RCVD_MSG, a,
-		   ObjectCounts_pack(2, 2, 0, 0));
+			ObjectCounts_pack(2, 2, 0, 0));
 
 	*resMsg_lenout = a[3].b.size / 1;
 	*timeout_ptr = o.m_timeout;
 	*flag_ptr = o.m_flag;
+	*state_ptr = o.m_state;
 
 	return result;
 }

+ 2 - 0
hdcp/hdcp_main.c

@@ -26,6 +26,7 @@ void select_interface(bool use_smcinvoke)
 		ta_interface.trusted_app_hdcp2_app_start_auth = &hdcp2_app_start_auth_smcinvoke;
 		ta_interface.trusted_app_hdcp2_app_process_msg = &hdcp2_app_process_msg_smcinvoke;
 		ta_interface.trusted_app_hdcp2_app_enable_encryption = &hdcp2_app_enable_encryption_smcinvoke;
+		ta_interface.trusted_app_hdcp2_app_timeout = &hdcp2_app_timeout_smcinvoke;
 		ta_interface.trusted_app_hdcp2_app_query_stream = &hdcp2_app_query_stream_smcinvoke;
 		ta_interface.trusted_app_hdcp2_app_stop = &hdcp2_app_stop_smcinvoke;
 		ta_interface.trusted_app_hdcp2_feature_supported = &hdcp2_feature_supported_smcinvoke;
@@ -45,6 +46,7 @@ void select_interface(bool use_smcinvoke)
 		ta_interface.trusted_app_hdcp2_app_start = &hdcp2_app_start_qseecom;
 		ta_interface.trusted_app_hdcp2_app_start_auth = &hdcp2_app_start_auth_qseecom;
 		ta_interface.trusted_app_hdcp2_app_process_msg = &hdcp2_app_process_msg_qseecom;
+		ta_interface.trusted_app_hdcp2_app_timeout = &hdcp2_app_timeout_qseecom;
 		ta_interface.trusted_app_hdcp2_app_enable_encryption = &hdcp2_app_enable_encryption_qseecom;
 		ta_interface.trusted_app_hdcp2_app_query_stream = &hdcp2_app_query_stream_qseecom;
 		ta_interface.trusted_app_hdcp2_app_stop = &hdcp2_app_stop_qseecom;

+ 10 - 5
hdcp/hdcp_qseecom.c

@@ -20,7 +20,7 @@
 #define hdcp2_app_init_var(x) \
 	struct hdcp_##x##_req *req_buf = NULL; \
 	struct hdcp_##x##_rsp *rsp_buf = NULL; \
-	if (!handle->qseecom_handle) { \
+	if (!handle || !handle->qseecom_handle) { \
 		pr_err("invalid qseecom_handle while processing %s\n", #x); \
 		rc = -EINVAL; \
 		goto error; \
@@ -212,12 +212,17 @@ static void hdcp1_app_unload(struct hdcp1_qsee_handle *handle)
 			pr_warn("%s app unload failed (%d)\n", HDCP1OPS_APP_NAME, rc);
 	}
 
+	hdcp1_app_started--;
+	if (!hdcp1_app_started) {
 	/* deallocate the resources for qseecom HDCP 1.x handle */
-	rc = qseecom_shutdown_app(&handle->qseecom_handle);
-	if (rc) {
-		pr_err("%s app unload failed (%d)\n", handle->app_name, rc);
-		return;
+		rc = qseecom_shutdown_app(&hdcp1_qseecom_handle_g);
+		if (rc) {
+			pr_err("%s app unload failed (%d)\n", handle->app_name, rc);
+			return;
+		}
+		hdcp1_qseecom_handle_g = NULL;
 	}
+	handle->qseecom_handle = NULL;
 
 	handle->hdcp_state &= ~HDCP_STATE_APP_LOADED;
 	pr_debug("%s app unloaded\n", handle->app_name);

+ 15 - 2
hdcp/hdcp_smcinvoke.c

@@ -185,7 +185,7 @@ error:
 
 static void hdcp1_app_unload(struct hdcp1_smcinvoke_handle *handle)
 {
-	if (!handle || !!handle->hdcp1_app_obj.context) {
+	if (!handle || !handle->hdcp1_app_obj.context) {
 		pr_err("invalid handle\n");
 		return;
 	}
@@ -348,10 +348,22 @@ void hdcp1_stop_smcinvoke(void *data)
 {
 	struct hdcp1_smcinvoke_handle *hdcp1_handle = data;
 
+	if (!hdcp1_handle) {
+		pr_err("invalid HDCP 1.x handle\n");
+		return;
+	}
+
+	if (!(hdcp1_handle->hdcp_state & HDCP_STATE_APP_LOADED)) {
+		pr_err("hdcp1 app not loaded\n");
+		return;
+	}
+
 	Object_ASSIGN_NULL(hdcp1_handle->hdcp1_app_obj);
 	Object_ASSIGN_NULL(hdcp1_handle->hdcp1_appcontroller_obj);
 	Object_ASSIGN_NULL(hdcp1_handle->hdcp1ops_app_obj);
 	Object_ASSIGN_NULL(hdcp1_handle->hdcp1ops_appcontroller_obj);
+
+	hdcp1_handle->hdcp_state &= ~HDCP_STATE_APP_LOADED;
 }
 
 void *hdcp2_init_smcinvoke(u32 device_type)
@@ -757,6 +769,7 @@ int hdcp2_app_process_msg_smcinvoke(void *ctx, uint32_t req_len)
 	size_t resMsgLen = 0;
 	uint32_t timeout = 0;
 	uint32_t flag = 0;
+	uint32_t state = 0;
 
 	uint8_t resMsg[MAX_TX_MESSAGE_SIZE] = {0};
 
@@ -779,7 +792,7 @@ int hdcp2_app_process_msg_smcinvoke(void *ctx, uint32_t req_len)
 	ret = hdcp2p2_rcvd_msg(
 		handle->hdcp2_app_obj, handle->app_data.request.data,
 		handle->app_data.request.length, handle->tz_ctxhandle, resMsg,
-		MAX_TX_MESSAGE_SIZE, &resMsgLen, &timeout, &flag);
+		MAX_TX_MESSAGE_SIZE, &resMsgLen, &timeout, &flag, &state);
 	if (ret) {
 		pr_err("hdcp2p2_rcvd_msg failed :%d\n", ret);
 		goto error;

+ 1 - 1
include/linux/ITrustedCameraDriver.h

@@ -63,7 +63,7 @@ ITrustedCameraDriver_getVersion(struct Object self, uint32_t *arch_ver_ptr, uint
     uint32_t m_arch_ver;
     uint32_t m_max_ver;
     uint32_t m_min_ver;
-  } o;
+  } o = {0};
   a[0].b = (struct ObjectBuf) { &o, 12 };
 
   result = Object_invoke(self, ITrustedCameraDriver_OP_getVersion, a, ObjectCounts_pack(0, 1, 0, 0));

+ 3 - 3
include/linux/smcinvoke.h

@@ -3,8 +3,8 @@
  * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
-#ifndef _SMCINVOKE_H_
-#define _SMCINVOKE_H_
+#ifndef _UAPI_SMCINVOKE_H_
+#define _UAPI_SMCINVOKE_H_
 
 #include <linux/types.h>
 #include <linux/ioctl.h>
@@ -107,4 +107,4 @@ struct smcinvoke_server {
 #define SMCINVOKE_IOCTL_LOG \
 	_IOC(_IOC_READ|_IOC_WRITE, SMCINVOKE_IOC_MAGIC, 255, SMCINVOKE_LOG_BUF_SIZE)
 
-#endif /* _SMCINVOKE_H_ */
+#endif /* _UAPI_SMCINVOKE_H_ */

+ 0 - 2
include/uapi/linux/compat_qcedev.h

@@ -10,7 +10,6 @@
 #include <linux/types.h>
 #include <linux/ioctl.h>
 
-#if IS_ENABLED(CONFIG_COMPAT)
 #include <linux/compat.h>
 
 /**
@@ -199,5 +198,4 @@ long compat_qcedev_ioctl(struct file *file,
 	_IOWR(QCEDEV_IOC_MAGIC, 10, struct compat_qcedev_map_buf_req)
 #define COMPAT_QCEDEV_IOCTL_UNMAP_BUF_REQ \
 	_IOWR(QCEDEV_IOC_MAGIC, 11, struct compat_qcedev_unmap_buf_req)
-#endif /* CONFIG_COMPAT */
 #endif /* _UAPI_COMPAT_QCEDEV__H */

+ 0 - 387
linux/qcedev.h

@@ -1,387 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
-/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-#ifndef _QCEDEV__H
-#define _QCEDEV__H
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-
-#define QCEDEV_MAX_SHA_BLOCK_SIZE	64
-#define QCEDEV_MAX_BEARER	31
-#define QCEDEV_MAX_KEY_SIZE	64
-#define QCEDEV_MAX_IV_SIZE	32
-
-#define QCEDEV_MAX_BUFFERS      16
-#define QCEDEV_MAX_SHA_DIGEST	32
-
-#define QCEDEV_USE_PMEM		1
-#define QCEDEV_NO_PMEM		0
-
-#define QCEDEV_AES_KEY_128	16
-#define QCEDEV_AES_KEY_192	24
-#define QCEDEV_AES_KEY_256	32
-/**
- *qcedev_oper_enum: Operation types
- * @QCEDEV_OPER_ENC:		Encrypt
- * @QCEDEV_OPER_DEC:		Decrypt
- * @QCEDEV_OPER_ENC_NO_KEY:	Encrypt. Do not need key to be specified by
- *				user. Key already set by an external processor.
- * @QCEDEV_OPER_DEC_NO_KEY:	Decrypt. Do not need the key to be specified by
- *				user. Key already set by an external processor.
- */
-enum qcedev_oper_enum {
-	QCEDEV_OPER_DEC		= 0,
-	QCEDEV_OPER_ENC		= 1,
-	QCEDEV_OPER_DEC_NO_KEY	= 2,
-	QCEDEV_OPER_ENC_NO_KEY	= 3,
-	QCEDEV_OPER_LAST
-};
-
-/**
- *qcedev_offload_oper_enum: Offload operation types (uses pipe keys)
- * @QCEDEV_OFFLOAD_HLOS_HLOS:   Non-secure to non-secure (eg. audio dec).
- * @QCEDEV_OFFLOAD_HLOS_CPB:    Non-secure to secure (eg. video dec).
- * @QCEDEV_OFFLOAD_CPB_HLOS:    Secure to non-secure (eg. hdcp video enc).
- */
-enum qcedev_offload_oper_enum {
-	QCEDEV_OFFLOAD_HLOS_HLOS = 1,
-	QCEDEV_OFFLOAD_HLOS_HLOS_1 = 2,
-	QCEDEV_OFFLOAD_HLOS_CPB = 3,
-	QCEDEV_OFFLOAD_HLOS_CPB_1 = 4,
-	QCEDEV_OFFLOAD_CPB_HLOS = 5,
-	QCEDEV_OFFLOAD_OPER_LAST
-};
-
-/**
- *qcedev_offload_err_enum: Offload error conditions
- * @QCEDEV_OFFLOAD_NO_ERROR:        Successful crypto operation.
- * @QCEDEV_OFFLOAD_GENERIC_ERROR:   Generic error in crypto status.
- * @QCEDEV_OFFLOAD_TIMER_EXPIRED_ERROR:     Pipe key timer expired.
- * @QCEDEV_OFFLOAD_KEY_PAUSE_ERROR:     Pipe key pause (means GPCE is paused).
- */
-enum qcedev_offload_err_enum {
-	QCEDEV_OFFLOAD_NO_ERROR = 0,
-	QCEDEV_OFFLOAD_GENERIC_ERROR = 1,
-	QCEDEV_OFFLOAD_KEY_TIMER_EXPIRED_ERROR = 2,
-	QCEDEV_OFFLOAD_KEY_PAUSE_ERROR = 3
-};
-
-/**
- *qcedev_oper_enum: Cipher algorithm types
- * @QCEDEV_ALG_DES:		DES
- * @QCEDEV_ALG_3DES:		3DES
- * @QCEDEV_ALG_AES:		AES
- */
-enum qcedev_cipher_alg_enum {
-	QCEDEV_ALG_DES		= 0,
-	QCEDEV_ALG_3DES		= 1,
-	QCEDEV_ALG_AES		= 2,
-	QCEDEV_ALG_LAST
-};
-
-/**
- *qcedev_cipher_mode_enum : AES mode
- * @QCEDEV_AES_MODE_CBC:		CBC
- * @QCEDEV_AES_MODE_ECB:		ECB
- * @QCEDEV_AES_MODE_CTR:		CTR
- * @QCEDEV_AES_MODE_XTS:		XTS
- * @QCEDEV_AES_MODE_CCM:		CCM
- * @QCEDEV_DES_MODE_CBC:		CBC
- * @QCEDEV_DES_MODE_ECB:		ECB
- */
-enum qcedev_cipher_mode_enum {
-	QCEDEV_AES_MODE_CBC	= 0,
-	QCEDEV_AES_MODE_ECB	= 1,
-	QCEDEV_AES_MODE_CTR	= 2,
-	QCEDEV_AES_MODE_XTS	= 3,
-	QCEDEV_AES_MODE_CCM	= 4,
-	QCEDEV_DES_MODE_CBC	= 5,
-	QCEDEV_DES_MODE_ECB	= 6,
-	QCEDEV_AES_DES_MODE_LAST
-};
-
-/**
- *enum qcedev_sha_alg_enum : Secure Hashing Algorithm
- * @QCEDEV_ALG_SHA1:		Digest returned: 20 bytes (160 bits)
- * @QCEDEV_ALG_SHA256:		Digest returned: 32 bytes (256 bit)
- * @QCEDEV_ALG_SHA1_HMAC:	HMAC returned 20 bytes (160 bits)
- * @QCEDEV_ALG_SHA256_HMAC:	HMAC returned 32 bytes (256 bit)
- * @QCEDEV_ALG_AES_CMAC:		Configurable MAC size
- */
-enum qcedev_sha_alg_enum {
-	QCEDEV_ALG_SHA1		= 0,
-	QCEDEV_ALG_SHA256	= 1,
-	QCEDEV_ALG_SHA1_HMAC	= 2,
-	QCEDEV_ALG_SHA256_HMAC	= 3,
-	QCEDEV_ALG_AES_CMAC	= 4,
-	QCEDEV_ALG_SHA_ALG_LAST
-};
-
-/**
- * struct buf_info - Buffer information
- * @offset:			Offset from the base address of the buffer
- *				(Used when buffer is allocated using PMEM)
- * @vaddr:			Virtual buffer address pointer
- * @len:				Size of the buffer
- */
-struct	buf_info {
-	union {
-		__u32	offset;
-		__u8		*vaddr;
-	};
-	__u32	len;
-};
-
-/**
- * struct qcedev_vbuf_info - Source and destination Buffer information
- * @src:				Array of buf_info for input/source
- * @dst:				Array of buf_info for output/destination
- */
-struct	qcedev_vbuf_info {
-	struct buf_info	src[QCEDEV_MAX_BUFFERS];
-	struct buf_info	dst[QCEDEV_MAX_BUFFERS];
-};
-
-/**
- * struct qcedev_pmem_info - Stores PMEM buffer information
- * @fd_src:			Handle to /dev/adsp_pmem used to allocate
- *				memory for input/src buffer
- * @src:				Array of buf_info for input/source
- * @fd_dst:			Handle to /dev/adsp_pmem used to allocate
- *				memory for output/dst buffer
- * @dst:				Array of buf_info for output/destination
- * @pmem_src_offset:		The offset from input/src buffer
- *				(allocated by PMEM)
- */
-struct	qcedev_pmem_info {
-	int		fd_src;
-	struct buf_info	src[QCEDEV_MAX_BUFFERS];
-	int		fd_dst;
-	struct buf_info	dst[QCEDEV_MAX_BUFFERS];
-};
-
-/**
- * struct qcedev_cipher_op_req - Holds the ciphering request information
- * @use_pmem (IN):	Flag to indicate if buffer source is PMEM
- *			QCEDEV_USE_PMEM/QCEDEV_NO_PMEM
- * @pmem (IN):		Stores PMEM buffer information.
- *			Refer struct qcedev_pmem_info
- * @vbuf (IN/OUT):	Stores Source and destination Buffer information
- *			Refer to struct qcedev_vbuf_info
- * @data_len (IN):	Total Length of input/src and output/dst in bytes
- * @in_place_op (IN):	Indicates whether the operation is inplace where
- *			source == destination
- *			When using PMEM allocated memory, must set this to 1
- * @enckey (IN):		128 bits of confidentiality key
- *			enckey[0] bit 127-120, enckey[1] bit 119-112,..
- *			enckey[15] bit 7-0
- * @encklen (IN):	Length of the encryption key(set to 128  bits/16
- *			bytes in the driver)
- * @iv (IN/OUT):		Initialisation vector data
- *			This is updated by the driver, incremented by
- *			number of blocks encrypted/decrypted.
- * @ivlen (IN):		Length of the IV
- * @byteoffset (IN):	Offset in the Cipher BLOCK (applicable and to be set
- *			for AES-128 CTR mode only)
- * @alg (IN):		Type of ciphering algorithm: AES/DES/3DES
- * @mode (IN):		Mode use when using AES algorithm: ECB/CBC/CTR
- *			Apllicabel when using AES algorithm only
- * @op (IN):		Type of operation: QCEDEV_OPER_DEC/QCEDEV_OPER_ENC or
- *			QCEDEV_OPER_ENC_NO_KEY/QCEDEV_OPER_DEC_NO_KEY
- *
- *If use_pmem is set to 0, the driver assumes that memory was not allocated
- * via PMEM, and kernel will need to allocate memory and copy data from user
- * space buffer (data_src/dta_dst) and process accordingly and copy data back
- * to the user space buffer
- *
- * If use_pmem is set to 1, the driver assumes that memory was allocated via
- * PMEM.
- * The kernel driver will use the fd_src to determine the kernel virtual address
- * base that maps to the user space virtual address base for the  buffer
- * allocated in user space.
- * The final input/src and output/dst buffer pointer will be determined
- * by adding the offsets to the kernel virtual addr.
- *
- * If use of hardware key is supported in the target, user can configure the
- * key parameters (encklen, enckey) to use the hardware key.
- * In order to use the hardware key, set encklen to 0 and set the enckey
- * data array to 0.
- */
-struct	qcedev_cipher_op_req {
-	__u8				use_pmem;
-	union {
-		struct qcedev_pmem_info	pmem;
-		struct qcedev_vbuf_info	vbuf;
-	};
-	__u32			entries;
-	__u32			data_len;
-	__u8				in_place_op;
-	__u8				enckey[QCEDEV_MAX_KEY_SIZE];
-	__u32			encklen;
-	__u8				iv[QCEDEV_MAX_IV_SIZE];
-	__u32			ivlen;
-	__u32			byteoffset;
-	enum qcedev_cipher_alg_enum	alg;
-	enum qcedev_cipher_mode_enum	mode;
-	enum qcedev_oper_enum		op;
-};
-
-/**
- * struct qcedev_sha_op_req - Holds the hashing request information
- * @data (IN):			Array of pointers to the data to be hashed
- * @entries (IN):		Number of buf_info entries in the data array
- * @data_len (IN):		Length of data to be hashed
- * @digest (IN/OUT):		Returns the hashed data information
- * @diglen (OUT):		Size of the hashed/digest data
- * @authkey (IN):		Pointer to authentication key for HMAC
- * @authklen (IN):		Size of the authentication key
- * @alg (IN):			Secure Hash algorithm
- */
-struct	qcedev_sha_op_req {
-	struct buf_info			data[QCEDEV_MAX_BUFFERS];
-	__u32			entries;
-	__u32			data_len;
-	__u8				digest[QCEDEV_MAX_SHA_DIGEST];
-	__u32			diglen;
-	__u8				*authkey;
-	__u32			authklen;
-	enum qcedev_sha_alg_enum	alg;
-};
-
-/**
- * struct pattern_info - Holds pattern information for pattern-based
- * decryption/encryption for AES ECB, counter, and CBC modes.
- * @patt_sz (IN):       Total number of blocks.
- * @proc_data_sz (IN):  Number of blocks to be processed.
- * @patt_offset (IN):   Start of the segment.
- */
-struct pattern_info {
-	__u8 patt_sz;
-	__u8 proc_data_sz;
-	__u8 patt_offset;
-};
-
-/**
- * struct qcedev_offload_cipher_op_req - Holds the offload request information
- * @vbuf (IN/OUT):      Stores Source and destination Buffer information.
- *                      Refer to struct qcedev_vbuf_info.
- * @entries (IN):       Number of entries to be processed as part of request.
- * @data_len (IN):      Total Length of input/src and output/dst in bytes
- * @in_place_op (IN):   Indicates whether the operation is inplace where
- *                      source == destination.
- * @encklen (IN):       Length of the encryption key(set to 128  bits/16
- *                      bytes in the driver).
- * @iv (IN/OUT):        Initialisation vector data
- *                      This is updated by the driver, incremented by
- *                      number of blocks encrypted/decrypted.
- * @ivlen (IN):         Length of the IV.
- * @iv_ctr_size (IN):   IV counter increment mask size.
- *                      Driver sets the mask value based on this size.
- * @byteoffset (IN):    Offset in the Cipher BLOCK (applicable and to be set
- *                      for AES-128 CTR mode only).
- * @block_offset (IN):  Offset in the block that needs a skip of encrypt/
- *                      decrypt.
- * @pattern_valid (IN): Indicates the request contains a valid pattern.
- * @pattern_info (IN):  The pattern to be used for the offload request.
- * @is_copy_op (IN):    Offload operations sometimes requires a copy between
- *                      secure and non-secure buffers without any encrypt/
- *                      decrypt operations.
- * @alg (IN):           Type of ciphering algorithm: AES/DES/3DES.
- * @mode (IN):          Mode use when using AES algorithm: ECB/CBC/CTR.
- *                      Applicable when using AES algorithm only.
- * @op (IN):            Type of operation.
- *                      Refer to qcedev_offload_oper_enum.
- * @err (OUT):          Error in crypto status.
- *                      Refer to qcedev_offload_err_enum.
- */
-struct qcedev_offload_cipher_op_req {
-	struct qcedev_vbuf_info vbuf;
-	__u32 entries;
-	__u32 data_len;
-	__u32 in_place_op;
-	__u32 encklen;
-	__u8 iv[QCEDEV_MAX_IV_SIZE];
-	__u32 ivlen;
-	__u32 iv_ctr_size;
-	__u32 byteoffset;
-	__u8 block_offset;
-	__u8 is_pattern_valid;
-	__u8 is_copy_op;
-	__u8 encrypt;
-	struct pattern_info pattern_info;
-	enum qcedev_cipher_alg_enum alg;
-	enum qcedev_cipher_mode_enum mode;
-	enum qcedev_offload_oper_enum op;
-	enum qcedev_offload_err_enum err;
-};
-
-/**
- * struct qfips_verify_t - Holds data for FIPS Integrity test
- * @kernel_size  (IN):		Size of kernel Image
- * @kernel       (IN):		pointer to buffer containing the kernel Image
- */
-struct qfips_verify_t {
-	unsigned int kernel_size;
-	void *kernel;
-};
-
-/**
- * struct qcedev_map_buf_req - Holds the mapping request information
- * fd (IN):            Array of fds.
- * num_fds (IN):       Number of fds in fd[].
- * fd_size (IN):       Array of sizes corresponding to each fd in fd[].
- * fd_offset (IN):     Array of offset corresponding to each fd in fd[].
- * vaddr (OUT):        Array of mapped virtual address corresponding to
- *			each fd in fd[].
- */
-struct qcedev_map_buf_req {
-	__s32         fd[QCEDEV_MAX_BUFFERS];
-	__u32        num_fds;
-	__u32        fd_size[QCEDEV_MAX_BUFFERS];
-	__u32        fd_offset[QCEDEV_MAX_BUFFERS];
-	__u64        buf_vaddr[QCEDEV_MAX_BUFFERS];
-};
-
-/**
- * struct qcedev_unmap_buf_req - Holds the hashing request information
- * fd (IN):            Array of fds to unmap
- * num_fds (IN):       Number of fds in fd[].
- */
-struct  qcedev_unmap_buf_req {
-	__s32         fd[QCEDEV_MAX_BUFFERS];
-	__u32        num_fds;
-};
-
-struct file;
-
-#define QCEDEV_IOC_MAGIC	0x87
-
-#define QCEDEV_IOCTL_ENC_REQ		\
-	_IOWR(QCEDEV_IOC_MAGIC, 1, struct qcedev_cipher_op_req)
-#define QCEDEV_IOCTL_DEC_REQ		\
-	_IOWR(QCEDEV_IOC_MAGIC, 2, struct qcedev_cipher_op_req)
-#define QCEDEV_IOCTL_SHA_INIT_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 3, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_UPDATE_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 4, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_FINAL_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 5, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_GET_SHA_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 6, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_LOCK_CE	\
-	_IO(QCEDEV_IOC_MAGIC, 7)
-#define QCEDEV_IOCTL_UNLOCK_CE	\
-	_IO(QCEDEV_IOC_MAGIC, 8)
-#define QCEDEV_IOCTL_GET_CMAC_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 9, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_MAP_BUF_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 10, struct qcedev_map_buf_req)
-#define QCEDEV_IOCTL_UNMAP_BUF_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 11, struct qcedev_unmap_buf_req)
-#define QCEDEV_IOCTL_OFFLOAD_OP_REQ		\
-	_IOWR(QCEDEV_IOC_MAGIC, 12, struct qcedev_offload_cipher_op_req)
-#endif /* _QCEDEV__H */

+ 1 - 1
smcinvoke/smcinvoke.c

@@ -2569,7 +2569,7 @@ static long process_accept_req(struct file *filp, unsigned int cmd,
 		 * new cb requests.
 		 */
 		if (!cb_txn) {
-			pr_err("%s txn %d either invalid or removed from Q\n",
+			pr_err_ratelimited("%s txn %d either invalid or removed from Q\n",
 					__func__, user_args.txn_id);
 			goto start_waiting_for_requests;
 		}