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asoc: bolero: reset all clks after SSR/PDR

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After SSR/PDR, the lpass clocks will be in off state. Force restart
clocks after SSR/PDR, if enabled before SSR/PDR, to reenable the clocks.

Change-Id: I3d850d92bdc6324aa7a64a83a9066f388a85c7f7
Signed-off-by: Meng Wang <mengw@codeaurora.org>
This commit is contained in:
Meng Wang
2019-05-08 15:12:56 +08:00
parent 988afa4fca
commit 8ef0cc2ed4
8 changed files with 70 additions and 6 deletions
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3
asoc/codecs/bolero/wsa-macro.c
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@@ -924,6 +924,9 @@ static int wsa_macro_event_handler(struct snd_soc_component *component,
wsa_priv->swr_ctrl_data[0].wsa_swr_pdev,
SWR_DEVICE_SSR_UP, NULL);
break;
case BOLERO_MACRO_EVT_CLK_RESET:
bolero_rsc_clk_reset(wsa_dev, WSA_CORE_CLK);
break;
}
return 0;
}