asoc: bolero: reset all clks after SSR/PDR
After SSR/PDR, the lpass clocks will be in off state. Force restart clocks after SSR/PDR, if enabled before SSR/PDR, to reenable the clocks. Change-Id: I3d850d92bdc6324aa7a64a83a9066f388a85c7f7 Signed-off-by: Meng Wang <mengw@codeaurora.org>
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@@ -234,6 +234,9 @@ static int va_macro_event_handler(struct snd_soc_component *component,
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"%s: va_mclk_users is non-zero still, audio SSR fail!!\n",
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__func__);
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break;
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case BOLERO_MACRO_EVT_CLK_RESET:
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bolero_rsc_clk_reset(va_dev, VA_CORE_CLK);
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break;
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default:
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break;
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}
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