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qcacmn: Remove void ptr usage in HAL

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Add code to replace usage of void pointers from
HAL layer and instead use appropriate opaque pointers

Change-Id: Id950bd9130a99014305738937aed736cf0144aca
CRs-Fixed: 2487250
This commit is contained in:
Akshay Kosigi
2019-07-10 14:42:42 +05:30
committed by nshrivas
parent a870c6181a
commit 8eda31cab3
23 changed files with 347 additions and 253 deletions
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35
dp/wifi3.0/dp_ipa.c
View File

@@ -240,7 +240,7 @@ static int dp_tx_ipa_uc_attach(struct dp_soc *soc, struct dp_pdev *pdev)
uint32_t tx_buffer_count;
uint32_t ring_base_align = 8;
qdf_dma_addr_t buffer_paddr;
struct hal_srng *wbm_srng =
struct hal_srng *wbm_srng = (struct hal_srng *)
soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
struct hal_srng_params srng_params;
uint32_t paddr_lo;
@@ -319,7 +319,8 @@ static int dp_tx_ipa_uc_attach(struct dp_soc *soc, struct dp_pdev *pdev)
__dp_ipa_handle_buf_smmu_mapping(soc, nbuf, true);
}
hal_srng_access_end_unlocked(soc->hal_soc, wbm_srng);
hal_srng_access_end_unlocked(soc->hal_soc,
hal_srng_to_hal_ring_handle(wbm_srng));
soc->ipa_uc_tx_rsc.alloc_tx_buf_cnt = tx_buffer_count;
@@ -405,8 +406,10 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
return QDF_STATUS_SUCCESS;
/* IPA TCL_DATA Ring - HAL_SRNG_SW2TCL3 */
hal_srng = soc->tcl_data_ring[IPA_TCL_DATA_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc, hal_srng_to_hal_ring_handle(hal_srng),
hal_srng = (struct hal_srng *)
soc->tcl_data_ring[IPA_TCL_DATA_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc_to_hal_soc_handle(hal_soc),
hal_srng_to_hal_ring_handle(hal_srng),
&srng_params);
soc->ipa_uc_tx_rsc.ipa_tcl_ring_base_paddr =
@@ -437,8 +440,10 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
soc->ipa_uc_tx_rsc.ipa_tcl_ring_size);
/* IPA TX COMP Ring - HAL_SRNG_WBM2SW2_RELEASE */
hal_srng = soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc, hal_srng_to_hal_ring_handle(hal_srng),
hal_srng = (struct hal_srng *)
soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc_to_hal_soc_handle(hal_soc),
hal_srng_to_hal_ring_handle(hal_srng),
&srng_params);
soc->ipa_uc_tx_rsc.ipa_wbm_ring_base_paddr =
@@ -462,8 +467,10 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
soc->ipa_uc_tx_rsc.ipa_wbm_ring_size);
/* IPA REO_DEST Ring - HAL_SRNG_REO2SW4 */
hal_srng = soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc, hal_srng_to_hal_ring_handle(hal_srng),
hal_srng = (struct hal_srng *)
soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].hal_srng;
hal_get_srng_params(hal_soc_to_hal_soc_handle(hal_soc),
hal_srng_to_hal_ring_handle(hal_srng),
&srng_params);
soc->ipa_uc_rx_rsc.ipa_reo_ring_base_paddr =
@@ -486,8 +493,10 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
srng_params.num_entries,
soc->ipa_uc_rx_rsc.ipa_reo_ring_size);
hal_srng = pdev->rx_refill_buf_ring2.hal_srng;
hal_get_srng_params(hal_soc, hal_srng_to_hal_ring_handle(hal_srng),
hal_srng = (struct hal_srng *)
pdev->rx_refill_buf_ring2.hal_srng;
hal_get_srng_params(hal_soc_to_hal_soc_handle(hal_soc),
hal_srng_to_hal_ring_handle(hal_srng),
&srng_params);
soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_base_paddr =
srng_params.ring_base_paddr;
@@ -495,7 +504,7 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
srng_params.ring_base_vaddr;
soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_size =
(srng_params.num_entries * srng_params.entry_size) << 2;
hp_addr = hal_srng_get_hp_addr(hal_soc,
hp_addr = hal_srng_get_hp_addr(hal_soc_to_hal_soc_handle(hal_soc),
hal_srng_to_hal_ring_handle(hal_srng));
soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_hp_paddr =
qdf_mem_paddr_from_dmaaddr(soc->osdev, hp_addr);
@@ -603,9 +612,9 @@ QDF_STATUS dp_ipa_set_doorbell_paddr(struct cdp_pdev *ppdev)
struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
struct dp_soc *soc = pdev->soc;
struct dp_ipa_resources *ipa_res = &pdev->ipa_resource;
struct hal_srng *wbm_srng =
struct hal_srng *wbm_srng = (struct hal_srng *)
soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
struct hal_srng *reo_srng =
struct hal_srng *reo_srng = (struct hal_srng *)
soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].hal_srng;
uint32_t tx_comp_doorbell_dmaaddr;
uint32_t rx_ready_doorbell_dmaaddr;

9
dp/wifi3.0/dp_rx.c
View File

@@ -46,8 +46,10 @@ static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
}
#ifdef DUP_RX_DESC_WAR
void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
void *ring_desc, struct dp_rx_desc *rx_desc)
void dp_rx_dump_info_and_assert(struct dp_soc *soc,
hal_ring_handle_t hal_ring,
hal_ring_desc_t ring_desc,
struct dp_rx_desc *rx_desc)
{
void *hal_soc = soc->hal_soc;
@@ -2136,7 +2138,8 @@ done:
if (dp_rx_enable_eol_data_check(soc)) {
if (quota &&
hal_srng_dst_peek_sync_locked(soc, hal_ring_hdl)) {
hal_srng_dst_peek_sync_locked(soc->hal_soc,
hal_ring_hdl)) {
DP_STATS_INC(soc, rx.hp_oos2, 1);
if (!hif_exec_should_yield(scn, intr_id))
goto more_data;

2
dp/wifi3.0/dp_rx.h
View File

@@ -1148,7 +1148,7 @@ dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
*/
QDF_STATUS
dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
hal_ring_desc_t link_desc_addr,
hal_link_desc_t link_desc_addr,
uint8_t bm_action);
/**

23
dp/wifi3.0/dp_rx_err.c
View File

@@ -162,7 +162,7 @@ static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
*/
QDF_STATUS
dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
hal_ring_desc_t link_desc_addr,
hal_link_desc_t link_desc_addr,
uint8_t bm_action)
{
struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
@@ -224,7 +224,9 @@ QDF_STATUS
dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
uint8_t bm_action)
{
return dp_rx_link_desc_return_by_addr(soc, ring_desc, bm_action);
void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
}
/**
@@ -1571,14 +1573,15 @@ done:
* Return: void
*/
static void dup_desc_dbg(struct dp_soc *soc,
hal_ring_desc_t rxdma_dst_ring_desc,
hal_rxdma_desc_t rxdma_dst_ring_desc,
void *rx_desc)
{
DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
dp_rx_dump_info_and_assert(soc,
soc->rx_rel_ring.hal_srng,
rxdma_dst_ring_desc,
rx_desc);
dp_rx_dump_info_and_assert(
soc,
soc->rx_rel_ring.hal_srng,
hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
rx_desc);
}
/**
@@ -1594,7 +1597,7 @@ static void dup_desc_dbg(struct dp_soc *soc,
*/
static inline uint32_t
dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
hal_ring_desc_t rxdma_dst_ring_desc,
hal_rxdma_desc_t rxdma_dst_ring_desc,
union dp_rx_desc_list_elem_t **head,
union dp_rx_desc_list_elem_t **tail)
{
@@ -1613,7 +1616,7 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
uint8_t rxdma_error_code = 0;
uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
hal_ring_desc_t ring_desc;
hal_rxdma_desc_t ring_desc;
msdu = 0;
@@ -1720,7 +1723,7 @@ dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
{
struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
hal_ring_desc_t rxdma_dst_ring_desc;
hal_rxdma_desc_t rxdma_dst_ring_desc;
hal_soc_handle_t hal_soc;
void *err_dst_srng;
union dp_rx_desc_list_elem_t *head = NULL;

4
dp/wifi3.0/dp_rx_mon_dest.c
View File

@@ -255,7 +255,7 @@ struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
*/
static inline uint32_t
dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
hal_ring_desc_t rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
hal_rxdma_desc_t rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
union dp_rx_desc_list_elem_t **head,
union dp_rx_desc_list_elem_t **tail)
@@ -1076,7 +1076,7 @@ void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
{
struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
uint8_t pdev_id;
hal_ring_desc_t rxdma_dst_ring_desc;
hal_rxdma_desc_t rxdma_dst_ring_desc;
hal_soc_handle_t hal_soc;
void *mon_dst_srng;
union dp_rx_desc_list_elem_t *head = NULL;

3
dp/wifi3.0/dp_tx.c
View File

@@ -3461,7 +3461,8 @@ more_data:
if (dp_tx_comp_enable_eol_data_check(soc)) {
if (!force_break &&
hal_srng_dst_peek_sync_locked(soc, hal_ring_hdl)) {
hal_srng_dst_peek_sync_locked(soc->hal_soc,
hal_ring_hdl)) {
DP_STATS_INC(soc, tx.hp_oos2, 1);
if (!hif_exec_should_yield(soc->hif_handle,
int_ctx->dp_intr_id))

124
hal/wifi3.0/hal_api.h
View File

@@ -43,6 +43,24 @@
#define FORCE_WAKE_DELAY_TIMEOUT 50
#define FORCE_WAKE_DELAY_MS 5
/**
* hal_ring_desc - opaque handle for DP ring descriptor
*/
struct hal_ring_desc;
typedef struct hal_ring_desc *hal_ring_desc_t;
/**
* hal_link_desc - opaque handle for DP link descriptor
*/
struct hal_link_desc;
typedef struct hal_link_desc *hal_link_desc_t;
/**
* hal_rxdma_desc - opaque handle for DP rxdma dst ring descriptor
*/
struct hal_rxdma_desc;
typedef struct hal_rxdma_desc *hal_rxdma_desc_t;
#ifdef ENABLE_VERBOSE_DEBUG
static inline void
hal_set_verbose_debug(bool flag)
@@ -276,7 +294,7 @@ static inline uint32_t hal_read_address_32_mb(struct hal_soc *soc,
* This function should be called as part of HIF initialization (for accessing
* copy engines). DP layer will get hal_soc handle using hif_get_hal_handle()
*/
extern void *hal_attach(void *hif_handle, qdf_device_t qdf_dev);
void *hal_attach(struct hif_opaque_softc *hif_handle, qdf_device_t qdf_dev);
/**
* hal_detach - Detach HAL layer
@@ -542,7 +560,8 @@ static inline bool hal_srng_initialized(hal_ring_handle_t hal_ring_hdl)
* Return: Opaque pointer for next ring entry; NULL on failire
*/
static inline
void *hal_srng_dst_peek(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
void *hal_srng_dst_peek(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
@@ -673,7 +692,7 @@ void *hal_srng_dst_get_next(void *hal_soc,
* Return: Opaque pointer for next ring entry; NULL on failire
*/
static inline void *
hal_srng_dst_get_next_hp(void *hal_soc,
hal_srng_dst_get_next_hp(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
@@ -707,7 +726,8 @@ hal_srng_dst_get_next_hp(void *hal_soc,
* Return: Opaque pointer for next ring entry; NULL on failire
*/
static inline
void *hal_srng_dst_peek_sync(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
void *hal_srng_dst_peek_sync(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
@@ -731,7 +751,7 @@ void *hal_srng_dst_peek_sync(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
* Return: Opaque pointer for next ring entry; NULL on failire
*/
static inline
void *hal_srng_dst_peek_sync_locked(void *hal_soc,
void *hal_srng_dst_peek_sync_locked(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
@@ -744,7 +764,7 @@ void *hal_srng_dst_peek_sync_locked(void *hal_soc,
SRNG_LOCK(&srng->lock);
ring_desc_ptr = hal_srng_dst_peek_sync(hal_soc, hal_ring_hdl);
ring_desc_ptr = hal_srng_dst_peek_sync(hal_soc_hdl, hal_ring_hdl);
SRNG_UNLOCK(&srng->lock);
@@ -989,8 +1009,9 @@ void *hal_srng_src_get_next(void *hal_soc,
*
* Return: Opaque pointer for next ring entry; NULL on failire
*/
static inline void *
hal_srng_src_peek(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
static inline
void *hal_srng_src_peek(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
uint32_t *desc;
@@ -1148,7 +1169,8 @@ hal_srng_access_end_reap(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_idle_list_scatter_buf_size(void *hal_soc)
static inline
uint32_t hal_idle_list_scatter_buf_size(hal_soc_handle_t hal_soc_hdl)
{
return WBM_IDLE_SCATTER_BUF_SIZE;
}
@@ -1183,7 +1205,8 @@ static inline uint32_t hal_get_link_desc_size(hal_soc_handle_t hal_soc_hdl)
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_get_link_desc_align(void *hal_soc)
static inline
uint32_t hal_get_link_desc_align(hal_soc_handle_t hal_soc_hdl)
{
return LINK_DESC_ALIGN;
}
@@ -1194,7 +1217,8 @@ static inline uint32_t hal_get_link_desc_align(void *hal_soc)
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_num_mpdus_per_link_desc(void *hal_soc)
static inline
uint32_t hal_num_mpdus_per_link_desc(hal_soc_handle_t hal_soc_hdl)
{
return NUM_MPDUS_PER_LINK_DESC;
}
@@ -1205,7 +1229,8 @@ static inline uint32_t hal_num_mpdus_per_link_desc(void *hal_soc)
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_num_msdus_per_link_desc(void *hal_soc)
static inline
uint32_t hal_num_msdus_per_link_desc(hal_soc_handle_t hal_soc_hdl)
{
return NUM_MSDUS_PER_LINK_DESC;
}
@@ -1217,7 +1242,8 @@ static inline uint32_t hal_num_msdus_per_link_desc(void *hal_soc)
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_num_mpdu_links_per_queue_desc(void *hal_soc)
static inline
uint32_t hal_num_mpdu_links_per_queue_desc(hal_soc_handle_t hal_soc_hdl)
{
return NUM_MPDU_LINKS_PER_QUEUE_DESC;
}
@@ -1230,11 +1256,12 @@ static inline uint32_t hal_num_mpdu_links_per_queue_desc(void *hal_soc)
* @scatter_buf_size: Size of scatter buffer
*
*/
static inline uint32_t hal_idle_scatter_buf_num_entries(void *hal_soc,
uint32_t scatter_buf_size)
static inline
uint32_t hal_idle_scatter_buf_num_entries(hal_soc_handle_t hal_soc_hdl,
uint32_t scatter_buf_size)
{
return (scatter_buf_size - WBM_IDLE_SCATTER_BUF_NEXT_PTR_SIZE) /
hal_srng_get_entrysize(hal_soc, WBM_IDLE_LINK);
hal_srng_get_entrysize(hal_soc_hdl, WBM_IDLE_LINK);
}
/**
@@ -1246,8 +1273,10 @@ static inline uint32_t hal_idle_scatter_buf_num_entries(void *hal_soc,
* @scatter_buf_size: Size of scatter buffer
*
*/
static inline uint32_t hal_idle_list_num_scatter_bufs(void *hal_soc,
uint32_t total_mem, uint32_t scatter_buf_size)
static inline
uint32_t hal_idle_list_num_scatter_bufs(hal_soc_handle_t hal_soc_hdl,
uint32_t total_mem,
uint32_t scatter_buf_size)
{
uint8_t rem = (total_mem % (scatter_buf_size -
WBM_IDLE_SCATTER_BUF_NEXT_PTR_SIZE)) ? 1 : 0;
@@ -1289,7 +1318,8 @@ enum hal_pn_type {
* @hal_soc: Opaque HAL SOC handle
*
*/
static inline uint32_t hal_get_reo_qdesc_align(void *hal_soc)
static inline
uint32_t hal_get_reo_qdesc_align(hal_soc_handle_t hal_soc_hdl)
{
return REO_QUEUE_DESC_ALIGN;
}
@@ -1305,9 +1335,11 @@ static inline uint32_t hal_get_reo_qdesc_align(void *hal_soc)
* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
*
*/
extern void hal_reo_qdesc_setup(void *hal_soc, int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr, qdf_dma_addr_t hw_qdesc_paddr,
int pn_type);
void hal_reo_qdesc_setup(hal_soc_handle_t hal_soc_hdl,
int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr,
qdf_dma_addr_t hw_qdesc_paddr,
int pn_type);
/**
* hal_srng_get_hp_addr - Get head pointer physical address
@@ -1365,7 +1397,8 @@ hal_srng_get_tp_addr(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
* @hal_ring_hdl: Ring pointer (Source or Destination ring)
* @ring_params: SRNG parameters will be returned through this structure
*/
void hal_get_srng_params(void *hal_soc, hal_ring_handle_t hal_ring_hdl,
void hal_get_srng_params(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl,
struct hal_srng_params *ring_params);
/**
@@ -1374,7 +1407,7 @@ void hal_get_srng_params(void *hal_soc, hal_ring_handle_t hal_ring_hdl,
* @hal_soc: Opaque HAL SOC handle
* @mem: pointer to structure to be updated with hal mem info
*/
extern void hal_get_meminfo(void *hal_soc,struct hal_mem_info *mem );
void hal_get_meminfo(hal_soc_handle_t hal_soc_hdl, struct hal_mem_info *mem);
/**
* hal_get_target_type - Return target type
@@ -1390,7 +1423,7 @@ uint32_t hal_get_target_type(hal_soc_handle_t hal_soc_hdl);
* @ac: Access category
* @value: timeout duration in millisec
*/
void hal_get_ba_aging_timeout(void *hal_soc, uint8_t ac,
void hal_get_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t *value);
/**
* hal_set_aging_timeout - Set BA aging timeout
@@ -1399,7 +1432,7 @@ void hal_get_ba_aging_timeout(void *hal_soc, uint8_t ac,
* @ac: Access category in millisec
* @value: timeout duration value
*/
void hal_set_ba_aging_timeout(void *hal_soc, uint8_t ac,
void hal_set_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t value);
/**
* hal_srng_dst_hw_init - Private function to initialize SRNG
@@ -1443,7 +1476,7 @@ void hal_get_hw_hptp(hal_soc_handle_t hal_soc_hdl,
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_get_hw_hptp(hal_soc_hdl, hal_ring_hdl,
hal_soc->ops->hal_get_hw_hptp(hal_soc, hal_ring_hdl,
headp, tailp, ring_type);
}
@@ -1453,12 +1486,12 @@ void hal_get_hw_hptp(hal_soc_handle_t hal_soc_hdl,
* @hal_soc: Opaque HAL SOC handle
* @reo_params: parameters needed by HAL for REO config
*/
static inline void hal_reo_setup(void *halsoc,
void *reoparams)
static inline void hal_reo_setup(hal_soc_handle_t hal_soc_hdl,
void *reoparams)
{
struct hal_soc *hal_soc = (struct hal_soc *)halsoc;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_reo_setup(halsoc, reoparams);
hal_soc->ops->hal_reo_setup(hal_soc, reoparams);
}
/**
@@ -1474,15 +1507,18 @@ static inline void hal_reo_setup(void *halsoc,
* @num_entries: Total entries of all scatter bufs
*
*/
static inline void hal_setup_link_idle_list(void *halsoc,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[], uint32_t num_scatter_bufs,
uint32_t scatter_buf_size, uint32_t last_buf_end_offset,
uint32_t num_entries)
static inline
void hal_setup_link_idle_list(hal_soc_handle_t hal_soc_hdl,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[],
uint32_t num_scatter_bufs,
uint32_t scatter_buf_size,
uint32_t last_buf_end_offset,
uint32_t num_entries)
{
struct hal_soc *hal_soc = (struct hal_soc *)halsoc;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_setup_link_idle_list(halsoc, scatter_bufs_base_paddr,
hal_soc->ops->hal_setup_link_idle_list(hal_soc, scatter_bufs_base_paddr,
scatter_bufs_base_vaddr, num_scatter_bufs,
scatter_buf_size, last_buf_end_offset,
num_entries);
@@ -1534,4 +1570,16 @@ static inline void hal_srng_dump_ring(hal_soc_handle_t hal_soc_hdl,
}
}
/*
* hal_rxdma_desc_to_hal_ring_desc - API to convert rxdma ring desc
* to opaque dp_ring desc type
* @ring_desc - rxdma ring desc
*
* Return: hal_rxdma_desc_t type
*/
static inline
hal_ring_desc_t hal_rxdma_desc_to_hal_ring_desc(hal_rxdma_desc_t ring_desc)
{
return (hal_ring_desc_t)ring_desc;
}
#endif /* _HAL_APIH_ */

4
hal/wifi3.0/hal_api_mon.h
View File

@@ -277,7 +277,7 @@ uint32_t HAL_RX_HW_DESC_GET_PPDUID_GET(void *hw_desc_addr)
* Return: void
*/
static inline
void hal_rx_reo_ent_buf_paddr_get(hal_ring_desc_t rx_desc,
void hal_rx_reo_ent_buf_paddr_get(hal_rxdma_desc_t rx_desc,
struct hal_buf_info *buf_info,
void **pp_buf_addr_info,
uint32_t *msdu_cnt
@@ -552,7 +552,7 @@ hal_rx_status_get_tlv_info(void *rx_tlv_hdr, void *ppdu_info,
}
static inline
uint32_t hal_get_rx_status_done_tlv_size(void *hal_soc)
uint32_t hal_get_rx_status_done_tlv_size(hal_soc_handle_t hal_soc_hdl)
{
return HAL_RX_TLV32_HDR_SIZE;
}

43
hal/wifi3.0/hal_generic_api.h
View File

@@ -59,8 +59,10 @@ static void *hal_rx_link_desc_msdu0_ptr_generic(void *link_desc)
*
* Return: none
*/
static inline void hal_tx_comp_get_status_generic(void *desc,
void *ts1, void *hal)
static inline
void hal_tx_comp_get_status_generic(void *desc,
void *ts1,
struct hal_soc *hal)
{
uint8_t rate_stats_valid = 0;
uint32_t rate_stats = 0;
@@ -109,7 +111,9 @@ static inline void hal_tx_comp_get_status_generic(void *desc,
}
ts->release_src = hal_tx_comp_get_buffer_source(desc);
ts->status = hal_tx_comp_get_release_reason(desc, hal);
ts->status = hal_tx_comp_get_release_reason(
desc,
hal_soc_to_hal_soc_handle(hal));
ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
TX_RATE_STATS_INFO_TX_RATE_STATS);
@@ -1456,10 +1460,9 @@ static void hal_reo_status_get_header_generic(uint32_t *d, int b, void *h1)
* @hal_soc: Opaque HAL SOC handle
* @reo_params: parameters needed by HAL for REO config
*/
static void hal_reo_setup_generic(void *hal_soc,
void *reoparams)
static void hal_reo_setup_generic(struct hal_soc *soc,
void *reoparams)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc;
uint32_t reg_val;
struct hal_reo_params *reo_params = (struct hal_reo_params *)reoparams;
@@ -1563,12 +1566,11 @@ static void hal_reo_setup_generic(void *hal_soc,
* Return: Update tail pointer and head pointer in arguments.
*/
static inline
void hal_get_hw_hptp_generic(hal_soc_handle_t hal_soc_hdl,
void hal_get_hw_hptp_generic(struct hal_soc *hal_soc,
hal_ring_handle_t hal_ring_hdl,
uint32_t *headp, uint32_t *tailp,
uint8_t ring)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
struct hal_hw_srng_config *ring_config;
enum hal_ring_type ring_type = (enum hal_ring_type)ring;
@@ -1597,10 +1599,10 @@ void hal_get_hw_hptp_generic(hal_soc_handle_t hal_soc_hdl,
* @hal_soc: HAL SOC handle
* @srng: SRNG ring pointer
*/
static inline void hal_srng_src_hw_init_generic(void *halsoc,
struct hal_srng *srng)
static inline
void hal_srng_src_hw_init_generic(struct hal_soc *hal,
struct hal_srng *srng)
{
struct hal_soc *hal = (struct hal_soc *)halsoc;
uint32_t reg_val = 0;
uint64_t tp_addr = 0;
@@ -1710,10 +1712,10 @@ static inline void hal_srng_src_hw_init_generic(void *halsoc,
* @hal_soc: HAL SOC handle
* @srng: SRNG ring pointer
*/
static inline void hal_srng_dst_hw_init_generic(void *halsoc,
struct hal_srng *srng)
static inline
void hal_srng_dst_hw_init_generic(struct hal_soc *hal,
struct hal_srng *srng)
{
struct hal_soc *hal = (struct hal_soc *)halsoc;
uint32_t reg_val = 0;
uint64_t hp_addr = 0;
@@ -2117,12 +2119,10 @@ static void hal_tx_desc_set_search_index_generic(void *desc,
*
* Return: none
*/
static void hal_tx_set_pcp_tid_map_generic(void *hal_soc, uint8_t *map)
static void hal_tx_set_pcp_tid_map_generic(struct hal_soc *soc, uint8_t *map)
{
uint32_t addr, value;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
@@ -2148,12 +2148,11 @@ static void hal_tx_set_pcp_tid_map_generic(void *hal_soc, uint8_t *map)
* Return: void
*/
static
void hal_tx_update_pcp_tid_generic(void *hal_soc, uint8_t pcp, uint8_t tid)
void hal_tx_update_pcp_tid_generic(struct hal_soc *soc,
uint8_t pcp, uint8_t tid)
{
uint32_t addr, value, regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
@@ -2178,12 +2177,10 @@ void hal_tx_update_pcp_tid_generic(void *hal_soc, uint8_t pcp, uint8_t tid)
* Return: void
*/
static
void hal_tx_update_tidmap_prty_generic(void *hal_soc, uint8_t value)
void hal_tx_update_tidmap_prty_generic(struct hal_soc *soc, uint8_t value)
{
uint32_t addr;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_TID_MAP_PRTY_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);

6
hal/wifi3.0/hal_hw_headers.h
View File

@@ -73,6 +73,7 @@
#include "phyrx_rssi_legacy.h"
#include "wcss_version.h"
#include "rx_msdu_link.h"
#include "hal_internal.h"
#define HAL_SRNG_REO_EXCEPTION HAL_SRNG_REO2SW1
#define HAL_SRNG_REO_ALTERNATE_SELECT 0x7
@@ -328,8 +329,9 @@ static inline void hal_set_link_desc_addr(void *desc, uint32_t cookie,
* @tid: TID number
*
*/
static inline uint32_t hal_get_reo_qdesc_size(void *hal_soc,
uint32_t ba_window_size, int tid)
static inline
uint32_t hal_get_reo_qdesc_size(hal_soc_handle_t hal_soc_hdl,
uint32_t ba_window_size, int tid)
{
/* Return descriptor size corresponding to window size of 2 since
* we set ba_window_size to 2 while setting up REO descriptors as

59
hal/wifi3.0/hal_internal.h
View File

@@ -173,12 +173,6 @@ enum hal_srng_dir {
struct hal_soc;
/**
* hal_ring_desc - opaque handle for DP ring descriptor
*/
struct hal_ring_desc;
typedef struct hal_ring_desc *hal_ring_desc_t;
/**
* dp_hal_ring - opaque handle for DP HAL SRNG
*/
@@ -309,33 +303,38 @@ struct hal_hw_srng_config {
struct hal_hw_txrx_ops {
/* init and setup */
void (*hal_srng_dst_hw_init)(void *hal,
struct hal_srng *srng);
void (*hal_srng_src_hw_init)(void *hal,
struct hal_srng *srng);
void (*hal_get_hw_hptp)(hal_soc_handle_t hal_soc_hdl,
void (*hal_srng_dst_hw_init)(struct hal_soc *hal,
struct hal_srng *srng);
void (*hal_srng_src_hw_init)(struct hal_soc *hal,
struct hal_srng *srng);
void (*hal_get_hw_hptp)(struct hal_soc *hal,
hal_ring_handle_t hal_ring_hdl,
uint32_t *headp, uint32_t *tailp,
uint8_t ring_type);
void (*hal_reo_setup)(void *hal_soc, void *reoparams);
void (*hal_setup_link_idle_list)(void *hal_soc,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[], uint32_t num_scatter_bufs,
uint32_t scatter_buf_size, uint32_t last_buf_end_offset,
uint32_t num_entries);
void (*hal_reo_setup)(struct hal_soc *hal_soc, void *reoparams);
void (*hal_setup_link_idle_list)(
struct hal_soc *hal_soc,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[],
uint32_t num_scatter_bufs,
uint32_t scatter_buf_size,
uint32_t last_buf_end_offset,
uint32_t num_entries);
/* tx */
void (*hal_tx_desc_set_dscp_tid_table_id)(void *desc, uint8_t id);
void (*hal_tx_set_dscp_tid_map)(void *hal_soc, uint8_t *map,
void (*hal_tx_set_dscp_tid_map)(struct hal_soc *hal_soc, uint8_t *map,
uint8_t id);
void (*hal_tx_update_dscp_tid)(void *hal_soc, uint8_t tid, uint8_t id,
void (*hal_tx_update_dscp_tid)(struct hal_soc *hal_soc, uint8_t tid,
uint8_t id,
uint8_t dscp);
void (*hal_tx_desc_set_lmac_id)(void *desc, uint8_t lmac_id);
void (*hal_tx_desc_set_buf_addr)(void *desc, dma_addr_t paddr,
uint8_t pool_id, uint32_t desc_id, uint8_t type);
void (*hal_tx_desc_set_search_type)(void *desc, uint8_t search_type);
void (*hal_tx_desc_set_search_index)(void *desc, uint32_t search_index);
void (*hal_tx_comp_get_status)(void *desc, void *ts, void *hal);
void (*hal_tx_comp_get_status)(void *desc, void *ts,
struct hal_soc *hal);
uint8_t (*hal_tx_comp_get_release_reason)(void *hal_desc);
/* rx */
@@ -364,10 +363,10 @@ struct hal_hw_txrx_ops {
void (*hal_rx_dump_mpdu_start_tlv)(void *mpdustart,
uint8_t dbg_level);
void (*hal_tx_set_pcp_tid_map)(void *hal_soc, uint8_t *map);
void (*hal_tx_update_pcp_tid_map)(void *hal_soc, uint8_t pcp,
void (*hal_tx_set_pcp_tid_map)(struct hal_soc *hal_soc, uint8_t *map);
void (*hal_tx_update_pcp_tid_map)(struct hal_soc *hal_soc, uint8_t pcp,
uint8_t id);
void (*hal_tx_set_tidmap_prty)(void *hal_soc, uint8_t prio);
void (*hal_tx_set_tidmap_prty)(struct hal_soc *hal_soc, uint8_t prio);
};
/**
@@ -376,7 +375,7 @@ struct hal_hw_txrx_ops {
*/
struct hal_soc {
/* HIF handle to access HW registers */
void *hif_handle;
struct hif_opaque_softc *hif_handle;
/* QDF device handle */
qdf_device_t qdf_dev;
@@ -444,4 +443,16 @@ hal_ring_handle_t hal_srng_to_hal_ring_handle(struct hal_srng *hal_srng)
{
return (hal_ring_handle_t)hal_srng;
}
/*
* hal_ring_handle_to_hal_srng - API to convert dp_hal_ring to hal_srng handle
* @hal_ring - hal_ring_handle_t type
*
* Return: hal_srng pointer type
*/
static inline
struct hal_srng *hal_ring_handle_to_hal_srng(hal_ring_handle_t hal_ring)
{
return (struct hal_srng *)hal_ring;
}
#endif /* _HAL_INTERNAL_H_ */

101
hal/wifi3.0/hal_reo.c
View File

@@ -74,9 +74,11 @@ static inline void hal_uniform_desc_hdr_setup(uint32_t *desc, uint32_t owner,
* @tid: TID
*
*/
void hal_reo_qdesc_setup(void *hal_soc, int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr, qdf_dma_addr_t hw_qdesc_paddr,
int pn_type)
void hal_reo_qdesc_setup(hal_soc_handle_t hal_soc_hdl, int tid,
uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr,
qdf_dma_addr_t hw_qdesc_paddr,
int pn_type)
{
uint32_t *reo_queue_desc = (uint32_t *)hw_qdesc_vaddr;
uint32_t *reo_queue_ext_desc;
@@ -255,10 +257,10 @@ qdf_export_symbol(hal_reo_qdesc_setup);
* @ac: Access category
* @value: window size to get
*/
void hal_get_ba_aging_timeout(void *hal_soc, uint8_t ac,
void hal_get_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t *value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc;
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
switch (ac) {
case WME_AC_BE:
@@ -297,10 +299,10 @@ qdf_export_symbol(hal_get_ba_aging_timeout);
* ac: 0 - Background, 1 - Best Effort, 2 - Video, 3 - Voice
* @value: Input value to set
*/
void hal_set_ba_aging_timeout(void *hal_soc, uint8_t ac,
void hal_set_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc;
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
switch (ac) {
case WME_AC_BE:
@@ -395,19 +397,20 @@ inline void hal_reo_cmd_set_descr_addr(uint32_t *reo_desc,
}
}
inline int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
inline int hal_reo_cmd_queue_stats(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
{
uint32_t *reo_desc, val;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_srng_access_start(hal_soc_hdl, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
@@ -417,7 +420,7 @@ inline int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_get_queue_stats) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -431,7 +434,7 @@ inline int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
HAL_DESC_SET_FIELD(reo_desc, REO_GET_QUEUE_STATS_2, CLEAR_STATS,
cmd->u.stats_params.clear);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
@@ -439,18 +442,19 @@ inline int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
}
qdf_export_symbol(hal_reo_cmd_queue_stats);
inline int hal_reo_cmd_flush_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
inline int hal_reo_cmd_flush_queue(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
{
uint32_t *reo_desc, val;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_srng_access_start(hal_soc_hdl, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
@@ -460,7 +464,7 @@ inline int hal_reo_cmd_flush_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_flush_queue) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -479,14 +483,15 @@ inline int hal_reo_cmd_flush_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
BLOCK_RESOURCE_INDEX, cmd->u.fl_queue_params.index);
}
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
val);
}
qdf_export_symbol(hal_reo_cmd_flush_queue);
inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
inline int hal_reo_cmd_flush_cache(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
{
uint32_t *reo_desc, val;
@@ -496,7 +501,7 @@ inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
cp = &cmd->u.fl_cache_params;
hal_srng_access_start(hal_soc_hdl, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
/* We need a cache block resource for this operation, and REO HW has
* only 4 such blocking resources. These resources are managed using
@@ -507,18 +512,18 @@ inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
if (index > 3) {
qdf_print("%s, No blocking resource available!",
__func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
hal_soc->index = index;
}
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_dump(reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
hal_srng_dump(hal_ring_handle_to_hal_srng(hal_ring_hdl));
return -EBUSY;
}
@@ -528,7 +533,7 @@ inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_flush_cache) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -560,14 +565,14 @@ inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
HAL_DESC_SET_FIELD(reo_desc, REO_FLUSH_CACHE_2, FLUSH_ENTIRE_CACHE,
cp->flush_all);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
val);
}
qdf_export_symbol(hal_reo_cmd_flush_cache);
inline int hal_reo_cmd_unblock_cache(void *reo_ring,
inline int hal_reo_cmd_unblock_cache(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
@@ -576,23 +581,23 @@ inline int hal_reo_cmd_unblock_cache(void *reo_ring,
uint32_t *reo_desc, val;
uint8_t index = 0;
hal_srng_access_start(hal_soc_hdl, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
if (cmd->u.unblk_cache_params.type == UNBLOCK_RES_INDEX) {
index = hal_find_one_bit(hal_soc->reo_res_bitmap);
if (index > 3) {
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
qdf_print("%s: No blocking resource to unblock!",
__func__);
return -EBUSY;
}
}
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
@@ -602,7 +607,7 @@ inline int hal_reo_cmd_unblock_cache(void *reo_ring,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_unblock_cache) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -618,26 +623,26 @@ inline int hal_reo_cmd_unblock_cache(void *reo_ring,
cmd->u.unblk_cache_params.index);
}
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
val);
}
qdf_export_symbol(hal_reo_cmd_unblock_cache);
inline int hal_reo_cmd_flush_timeout_list(void *reo_ring,
inline int hal_reo_cmd_flush_timeout_list(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t *reo_desc, val;
hal_srng_access_start(hal_soc_hdl, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
@@ -647,7 +652,7 @@ inline int hal_reo_cmd_flush_timeout_list(void *reo_ring,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_flush_timeout_list) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -665,14 +670,14 @@ inline int hal_reo_cmd_flush_timeout_list(void *reo_ring,
MINIMUM_FORWARD_BUF_COUNT,
cmd->u.fl_tim_list_params.min_fwd_buf);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
val);
}
qdf_export_symbol(hal_reo_cmd_flush_timeout_list);
inline int hal_reo_cmd_update_rx_queue(void *reo_ring,
inline int hal_reo_cmd_update_rx_queue(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd)
{
@@ -682,12 +687,12 @@ inline int hal_reo_cmd_update_rx_queue(void *reo_ring,
p = &cmd->u.upd_queue_params;
hal_srng_access_start(hal_soc_hdl, reo_ring);
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
hal_srng_access_start(hal_soc_hdl, hal_ring_hdl);
reo_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
if (!reo_desc) {
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
"%s: Out of cmd ring entries", __func__);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
return -EBUSY;
}
@@ -697,7 +702,7 @@ inline int hal_reo_cmd_update_rx_queue(void *reo_ring,
/* Offsets of descriptor fields defined in HW headers start from
* the field after TLV header */
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
qdf_mem_zero((void *)(reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
qdf_mem_zero((reo_desc + NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER),
sizeof(struct reo_update_rx_reo_queue) -
(NUM_OF_DWORDS_UNIFORM_REO_CMD_HEADER << 2));
@@ -875,7 +880,7 @@ inline int hal_reo_cmd_update_rx_queue(void *reo_ring,
HAL_DESC_SET_FIELD(reo_desc, REO_UPDATE_RX_REO_QUEUE_8,
PN_127_96, p->pn_127_96);
hal_srng_access_end(hal_soc, reo_ring);
hal_srng_access_end(hal_soc, hal_ring_hdl);
val = reo_desc[CMD_HEADER_DW_OFFSET];
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
val);
@@ -1329,7 +1334,7 @@ qdf_export_symbol(hal_reo_rx_update_queue_status);
* Return: none
*/
inline void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_srng_hdl)
hal_ring_handle_t hal_ring_hdl)
{
int cmd_num;
uint32_t *desc_addr;
@@ -1338,7 +1343,7 @@ inline void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl,
uint32_t num_desc;
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
hal_get_srng_params(soc, hal_srng_hdl, &srng_params);
hal_get_srng_params(hal_soc_hdl, hal_ring_hdl, &srng_params);
desc_addr = (uint32_t *)(srng_params.ring_base_vaddr);
desc_addr += (sizeof(struct tlv_32_hdr) >> 2);

18
hal/wifi3.0/hal_reo.h
View File

@@ -496,17 +496,23 @@ void hal_reo_cmd_set_descr_addr(uint32_t *reo_desc,
enum hal_reo_cmd_type type,
uint32_t paddr_lo,
uint8_t paddr_hi);
int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_queue_stats(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
int hal_reo_cmd_flush_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_flush_queue(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_flush_cache(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
int hal_reo_cmd_unblock_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_unblock_cache(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
int hal_reo_cmd_flush_timeout_list(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_flush_timeout_list(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
int hal_reo_cmd_update_rx_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
int hal_reo_cmd_update_rx_queue(hal_ring_handle_t hal_ring_hdl,
hal_soc_handle_t hal_soc_hdl,
struct hal_reo_cmd_params *cmd);
/* REO status ring routines */

30
hal/wifi3.0/hal_rx.h
View File

@@ -1308,8 +1308,9 @@ hal_rx_is_unicast(uint8_t *buf)
* Return: tid
*/
static inline uint32_t
hal_rx_tid_get(struct hal_soc *hal_soc, uint8_t *buf)
hal_rx_tid_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
@@ -2030,10 +2031,10 @@ struct hal_buf_info {
* Return - Pointer to rx_msdu_details structure
*
*/
static inline void *hal_rx_link_desc_msdu0_ptr(void *msdu_link_ptr, void *hal)
static inline
void *hal_rx_link_desc_msdu0_ptr(void *msdu_link_ptr,
struct hal_soc *hal_soc)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal;
return hal_soc->ops->hal_rx_link_desc_msdu0_ptr(msdu_link_ptr);
}
@@ -2044,10 +2045,10 @@ static inline void *hal_rx_link_desc_msdu0_ptr(void *msdu_link_ptr, void *hal)
* Return - Pointer to rx_msdu_desc_info structure.
*
*/
static inline void *hal_rx_msdu_desc_info_get_ptr(void *msdu_details_ptr, void *hal)
static inline
void *hal_rx_msdu_desc_info_get_ptr(void *msdu_details_ptr,
struct hal_soc *hal_soc)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal;
return hal_soc->ops->hal_rx_msdu_desc_info_get_ptr(msdu_details_ptr);
}
@@ -2392,7 +2393,7 @@ static inline bool hal_rx_reo_is_2k_jump(hal_ring_desc_t rx_desc)
static inline
void hal_rx_msdu_link_desc_set(hal_soc_handle_t hal_soc_hdl,
void *src_srng_desc,
hal_ring_desc_t buf_addr_info,
hal_link_desc_t buf_addr_info,
uint8_t bm_action)
{
struct wbm_release_ring *wbm_rel_srng =
@@ -2434,7 +2435,7 @@ static inline void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc,
* first field in the descriptor structure)
*/
#define HAL_RX_BUF_ADDR_INFO_GET(ring_desc) \
((hal_ring_desc_t)(ring_desc))
((hal_link_desc_t)(ring_desc))
#define HAL_RX_REO_BUF_ADDR_INFO_GET HAL_RX_BUF_ADDR_INFO_GET
@@ -3162,7 +3163,7 @@ uint16_t hal_rx_get_desc_len(void)
* Returns: value of rxdma_push_reason
*/
static inline
uint8_t hal_rx_reo_ent_rxdma_push_reason_get(hal_ring_desc_t reo_ent_desc)
uint8_t hal_rx_reo_ent_rxdma_push_reason_get(hal_rxdma_desc_t reo_ent_desc)
{
return _HAL_MS((*_OFFSET_TO_WORD_PTR(reo_ent_desc,
REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET)),
@@ -3177,7 +3178,7 @@ uint8_t hal_rx_reo_ent_rxdma_push_reason_get(hal_ring_desc_t reo_ent_desc)
* Return: value of rxdma_error_code
*/
static inline
uint8_t hal_rx_reo_ent_rxdma_error_code_get(hal_ring_desc_t reo_ent_desc)
uint8_t hal_rx_reo_ent_rxdma_error_code_get(hal_rxdma_desc_t reo_ent_desc)
{
return _HAL_MS((*_OFFSET_TO_WORD_PTR(reo_ent_desc,
REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET)),
@@ -3372,11 +3373,10 @@ static inline void hal_rx_dump_pkt_tlvs(hal_soc_handle_t hal_soc_hdl,
* Return - none.
*
*/
static inline void hal_reo_status_get_header(uint32_t *d, int b,
void *h, void *hal)
static inline
void hal_reo_status_get_header(uint32_t *d, int b,
void *h, struct hal_soc *hal_soc)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal;
hal_soc->ops->hal_reo_status_get_header(d, b, h);
}

25
hal/wifi3.0/hal_srng.c
View File

@@ -80,16 +80,15 @@ static struct hal_srng *hal_get_srng(struct hal_soc *hal, int ring_id)
#define HP_OFFSET_IN_REG_START 1
#define OFFSET_FROM_HP_TO_TP 4
static void hal_update_srng_hp_tp_address(void *hal_soc,
static void hal_update_srng_hp_tp_address(struct hal_soc *hal_soc,
int shadow_config_index,
int ring_type,
int ring_num)
{
struct hal_srng *srng;
struct hal_soc *hal = (struct hal_soc *)hal_soc;
int ring_id;
struct hal_hw_srng_config *ring_config =
HAL_SRNG_CONFIG(hal, ring_type);
HAL_SRNG_CONFIG(hal_soc, ring_type);
ring_id = hal_get_srng_ring_id(hal_soc, ring_type, ring_num, 0);
if (ring_id < 0)
@@ -99,16 +98,16 @@ static void hal_update_srng_hp_tp_address(void *hal_soc,
if (ring_config->ring_dir == HAL_SRNG_DST_RING) {
srng->u.dst_ring.tp_addr = SHADOW_REGISTER(shadow_config_index)
+ hal->dev_base_addr;
+ hal_soc->dev_base_addr;
hal_debug("tp_addr=%pK dev base addr %pK index %u",
srng->u.dst_ring.tp_addr, hal->dev_base_addr,
srng->u.dst_ring.tp_addr, hal_soc->dev_base_addr,
shadow_config_index);
} else {
srng->u.src_ring.hp_addr = SHADOW_REGISTER(shadow_config_index)
+ hal->dev_base_addr;
+ hal_soc->dev_base_addr;
hal_debug("hp_addr=%pK dev base addr %pK index %u",
srng->u.src_ring.hp_addr,
hal->dev_base_addr, shadow_config_index);
hal_soc->dev_base_addr, shadow_config_index);
}
}
@@ -289,7 +288,7 @@ qdf_export_symbol(hal_get_target_type);
* copy engines). DP layer will get hal_soc handle using hif_get_hal_handle()
*
*/
void *hal_attach(void *hif_handle, qdf_device_t qdf_dev)
void *hal_attach(struct hif_opaque_softc *hif_handle, qdf_device_t qdf_dev)
{
struct hal_soc *hal;
int i;
@@ -360,15 +359,16 @@ qdf_export_symbol(hal_attach);
* @hal_soc: Opaque HAL SOC handle
* @mem: pointer to structure to be updated with hal mem info
*/
void hal_get_meminfo(void *hal_soc, struct hal_mem_info *mem )
void hal_get_meminfo(hal_soc_handle_t hal_soc_hdl, struct hal_mem_info *mem)
{
struct hal_soc *hal = (struct hal_soc *)hal_soc;
struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
mem->dev_base_addr = (void *)hal->dev_base_addr;
mem->shadow_rdptr_mem_vaddr = (void *)hal->shadow_rdptr_mem_vaddr;
mem->shadow_wrptr_mem_vaddr = (void *)hal->shadow_wrptr_mem_vaddr;
mem->shadow_rdptr_mem_paddr = (void *)hal->shadow_rdptr_mem_paddr;
mem->shadow_wrptr_mem_paddr = (void *)hal->shadow_wrptr_mem_paddr;
hif_read_phy_mem_base(hal->hif_handle, (qdf_dma_addr_t *)&mem->dev_base_paddr);
hif_read_phy_mem_base((void *)hal->hif_handle,
(qdf_dma_addr_t *)&mem->dev_base_paddr);
return;
}
qdf_export_symbol(hal_get_meminfo);
@@ -806,7 +806,8 @@ void hal_srng_dump(struct hal_srng *srng)
* @hal_ring: Ring pointer (Source or Destination ring)
* @ring_params: SRNG parameters will be returned through this structure
*/
extern void hal_get_srng_params(void *hal_soc, hal_ring_handle_t hal_ring_hdl,
extern void hal_get_srng_params(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl,
struct hal_srng_params *ring_params)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;

27
hal/wifi3.0/hal_tx.h
View File

@@ -786,9 +786,11 @@ static inline uint32_t hal_tx_comp_get_buffer_type(void *hal_desc)
*
* Return: buffer type
*/
static inline uint8_t hal_tx_comp_get_release_reason(void *hal_desc, void *hal)
static inline
uint8_t hal_tx_comp_get_release_reason(void *hal_desc,
hal_soc_handle_t hal_soc_hdl)
{
struct hal_soc *hal_soc = hal;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_tx_comp_get_release_reason(hal_desc);
}
@@ -858,12 +860,12 @@ static inline void hal_tx_comp_get_htt_desc(void *hw_desc, uint8_t *htt_desc)
/**
* hal_tx_init_data_ring() - Initialize all the TCL Descriptors in SRNG
* @hal_soc: Handle to HAL SoC structure
* @hal_soc_hdl: Handle to HAL SoC structure
* @hal_srng: Handle to HAL SRNG structure
*
* Return: none
*/
static inline void hal_tx_init_data_ring(void *hal_soc,
static inline void hal_tx_init_data_ring(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
uint8_t *desc_addr;
@@ -871,7 +873,7 @@ static inline void hal_tx_init_data_ring(void *hal_soc,
uint32_t desc_size;
uint32_t num_desc;
hal_get_srng_params(hal_soc, hal_ring_hdl, &srng_params);
hal_get_srng_params(hal_soc_hdl, hal_ring_hdl, &srng_params);
desc_addr = (uint8_t *)srng_params.ring_base_vaddr;
desc_size = sizeof(struct tcl_data_cmd);
@@ -1002,11 +1004,12 @@ static inline void hal_tx_desc_set_search_index(hal_soc_handle_t hal_soc_hdl,
*
* Return: none
*/
static inline void hal_tx_comp_get_status(void *desc, void *ts, void *hal)
static inline void hal_tx_comp_get_status(void *desc, void *ts,
hal_soc_handle_t hal_soc_hdl)
{
struct hal_soc *hal_soc = hal;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_comp_get_status(desc, ts, hal);
hal_soc->ops->hal_tx_comp_get_status(desc, ts, hal_soc);
}
@@ -1021,10 +1024,12 @@ static inline void hal_tx_comp_get_status(void *desc, void *ts, void *hal)
*
* Return: void
*/
static inline void hal_tx_desc_set_buf_addr(void *desc, dma_addr_t paddr,
uint8_t pool_id, uint32_t desc_id, uint8_t type, void *hal)
static inline
void hal_tx_desc_set_buf_addr(void *desc, dma_addr_t paddr,
uint8_t pool_id, uint32_t desc_id,
uint8_t type, hal_soc_handle_t hal_soc_hdl)
{
struct hal_soc *hal_soc = hal;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_buf_addr(desc, paddr, pool_id,
desc_id, type);

14
hal/wifi3.0/hal_wbm.h
View File

@@ -29,15 +29,17 @@
* @num_entries: Total entries of all scatter bufs
*
*/
static void hal_setup_link_idle_list_generic(void *hal_soc,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[], uint32_t num_scatter_bufs,
uint32_t scatter_buf_size, uint32_t last_buf_end_offset,
uint32_t num_entries)
static void
hal_setup_link_idle_list_generic(struct hal_soc *soc,
qdf_dma_addr_t scatter_bufs_base_paddr[],
void *scatter_bufs_base_vaddr[],
uint32_t num_scatter_bufs,
uint32_t scatter_buf_size,
uint32_t last_buf_end_offset,
uint32_t num_entries)
{
int i;
uint32_t *prev_buf_link_ptr = NULL;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
uint32_t reg_scatter_buf_size, reg_tot_scatter_buf_size;
uint32_t val;

19
hal/wifi3.0/qca6290/hal_6290_tx.h
View File

@@ -72,7 +72,8 @@ static void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc,
*
* Return: none
*/
static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc,
uint8_t *map,
uint8_t id)
{
int i;
@@ -80,8 +81,6 @@ static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
uint32_t value = 0, regval;
uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
return;
@@ -110,7 +109,7 @@ static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
(map[i + 6] << 0x12) |
(map[i + 7] << 0x15));
qdf_mem_copy(&val[cnt], (void *)&value, 3);
qdf_mem_copy(&val[cnt], &value, 3);
cnt += 3;
}
@@ -129,15 +128,14 @@ static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
HAL_REG_WRITE(soc, cmn_reg_addr, regval);
}
#else
static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc,
uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr;
uint32_t value;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT) {
addr =
HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(
@@ -179,14 +177,13 @@ static void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
*
* Return: void
*/
static void hal_tx_update_dscp_tid_6290(void *hal_soc, uint8_t tid,
static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
uint32_t addr;
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
@@ -202,7 +199,7 @@ static void hal_tx_update_dscp_tid_6290(void *hal_soc, uint8_t tid,
HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
}
#else
static void hal_tx_update_dscp_tid_6290(void *hal_soc, uint8_t tid,
static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
@@ -210,8 +207,6 @@ static void hal_tx_update_dscp_tid_6290(void *hal_soc, uint8_t tid,
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT)
addr =
HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(

11
hal/wifi3.0/qca6390/hal_6390_tx.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -57,7 +57,7 @@ static void hal_tx_desc_set_dscp_tid_table_id_6390(void *desc, uint8_t id)
*
* Return: none
*/
static void hal_tx_set_dscp_tid_map_6390(void *hal_soc, uint8_t *map,
static void hal_tx_set_dscp_tid_map_6390(struct hal_soc *soc, uint8_t *map,
uint8_t id)
{
int i;
@@ -65,8 +65,6 @@ static void hal_tx_set_dscp_tid_map_6390(void *hal_soc, uint8_t *map,
uint32_t value = 0, regval;
uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
return;
@@ -95,7 +93,7 @@ static void hal_tx_set_dscp_tid_map_6390(void *hal_soc, uint8_t *map,
(map[i + 6] << 0x12) |
(map[i + 7] << 0x15));
qdf_mem_copy(&val[cnt], (void *)&value, 3);
qdf_mem_copy(&val[cnt], &value, 3);
cnt += 3;
}
@@ -124,14 +122,13 @@ static void hal_tx_set_dscp_tid_map_6390(void *hal_soc, uint8_t *map,
*
* Return: void
*/
static void hal_tx_update_dscp_tid_6390(void *hal_soc, uint8_t tid,
static void hal_tx_update_dscp_tid_6390(struct hal_soc *soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
uint32_t addr;
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);

10
hal/wifi3.0/qca8074v1/hal_8074v1_tx.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -54,15 +54,13 @@ static void hal_tx_desc_set_dscp_tid_table_id_8074(void *desc, uint8_t id)
*
* Return: none
*/
static void hal_tx_set_dscp_tid_map_8074(void *hal_soc, uint8_t *map,
static void hal_tx_set_dscp_tid_map_8074(struct hal_soc *soc, uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr;
uint32_t value;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT) {
addr = HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
@@ -102,7 +100,7 @@ static void hal_tx_set_dscp_tid_map_8074(void *hal_soc, uint8_t *map,
* Return: void
*/
static
void hal_tx_update_dscp_tid_8074(void *hal_soc, uint8_t tid,
void hal_tx_update_dscp_tid_8074(struct hal_soc *soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
@@ -110,8 +108,6 @@ void hal_tx_update_dscp_tid_8074(void *hal_soc, uint8_t tid,
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT)
addr = HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(
SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);

16
hal/wifi3.0/qca8074v2/hal_8074v2_tx.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -59,16 +59,15 @@ static void hal_tx_desc_set_dscp_tid_table_id_8074v2(void *desc, uint8_t id)
* Return: none
*/
static void hal_tx_set_dscp_tid_map_8074v2(void *hal_soc, uint8_t *map,
uint8_t id)
static void hal_tx_set_dscp_tid_map_8074v2(struct hal_soc *soc,
uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr, cmn_reg_addr;
uint32_t value = 0, regval;
uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_V2_MAPS)
return;
@@ -97,7 +96,7 @@ static void hal_tx_set_dscp_tid_map_8074v2(void *hal_soc, uint8_t *map,
(map[i + 6] << 0x12) |
(map[i + 7] << 0x15));
qdf_mem_copy(&val[cnt], (void *)&value, 3);
qdf_mem_copy(&val[cnt], &value, 3);
cnt += 3;
}
@@ -126,13 +125,12 @@ static void hal_tx_set_dscp_tid_map_8074v2(void *hal_soc, uint8_t *map,
*
* Return: void
*/
static void hal_tx_update_dscp_tid_8074v2(void *hal_soc, uint8_t tid,
uint8_t id, uint8_t dscp)
static void hal_tx_update_dscp_tid_8074v2(struct hal_soc *soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
uint32_t addr, addr1, cmn_reg_addr;
uint32_t start_value = 0, end_value = 0;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
uint8_t end_bits = 0;
uint8_t start_bits = 0;
uint32_t start_index, end_index;

13
hif/inc/hif.h
View File

@@ -1191,4 +1191,17 @@ uint8_t *hif_log_dump_ce(struct hif_softc *scn, uint8_t *buf_cur,
uint8_t *buf_init, uint32_t buf_sz,
uint32_t ce, uint32_t skb_sz);
#endif /* OL_ATH_SMART_LOGGING */
/*
* hif_softc_to_hif_opaque_softc - API to convert hif_softc handle
* to hif_opaque_softc handle
* @hif_handle - hif_softc type
*
* Return: hif_opaque_softc type
*/
static inline struct hif_opaque_softc *
hif_softc_to_hif_opaque_softc(struct hif_softc *hif_handle)
{
return (struct hif_opaque_softc *)hif_handle;
}
#endif /* _HIF_H_ */

4
hif/src/hif_main.c
View File

@@ -492,7 +492,9 @@ void hif_close(struct hif_opaque_softc *hif_ctx)
static QDF_STATUS hif_hal_attach(struct hif_softc *scn)
{
if (ce_srng_based(scn)) {
scn->hal_soc = hal_attach(scn, scn->qdf_dev);
scn->hal_soc = hal_attach(
hif_softc_to_hif_opaque_softc(scn),
scn->qdf_dev);
if (!scn->hal_soc)
return QDF_STATUS_E_FAILURE;
}