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Merge "video: driver: remove config dependencies"

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This commit is contained in:
qctecmdr
2023-02-23 08:10:06 -08:00
committed by Gerrit - the friendly Code Review server
parent e613fa6855 c3c85e9653
commit 8df204443f
27 changed files with 239 additions and 6703 deletions
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2
config/anorak_video.conf
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@@ -1,2 +0,0 @@
export CONFIG_MSM_VIDC_ANORAK=y
export CONFIG_MSM_VIDC_IRIS3=y

8
config/anorak_video.h
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@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define CONFIG_MSM_VIDC_IRIS3 1
#define CONFIG_MSM_VIDC_ANORAK 1

1
config/kalama_video.conf
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@@ -1,2 +1 @@
export CONFIG_MSM_VIDC_KALAMA=y export CONFIG_MSM_VIDC_KALAMA=y
export CONFIG_MSM_VIDC_IRIS3=y

1
config/kalama_video.h
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@@ -4,5 +4,4 @@
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#define CONFIG_MSM_VIDC_IRIS3 1
#define CONFIG_MSM_VIDC_KALAMA 1 #define CONFIG_MSM_VIDC_KALAMA 1

1
config/pineapple_video.conf
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@@ -1,2 +1 @@
export CONFIG_MSM_VIDC_PINEAPPLE=y export CONFIG_MSM_VIDC_PINEAPPLE=y
export CONFIG_MSM_VIDC_IRIS33=y

1
config/pineapple_video.h
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@@ -4,5 +4,4 @@
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#define CONFIG_MSM_VIDC_IRIS33 1
#define CONFIG_MSM_VIDC_PINEAPPLE 1 #define CONFIG_MSM_VIDC_PINEAPPLE 1

2
config/waipio_video.conf
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@@ -1,2 +0,0 @@
export CONFIG_MSM_VIDC_WAIPIO=y
export CONFIG_MSM_VIDC_IRIS2=y

8
config/waipio_video.h
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@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define CONFIG_MSM_VIDC_IRIS2 1
#define CONFIG_MSM_VIDC_WAIPIO 1

27
driver/platform/anorak/inc/msm_vidc_anorak.h
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@@ -1,27 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _MSM_VIDC_ANORAK_H_
#define _MSM_VIDC_ANORAK_H_
#include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_ANORAK)
int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev);
int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev);
#else
int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev)
{
return -EINVAL;
}
int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev)
{
return -EINVAL;
}
#endif
#endif // _MSM_VIDC_ANORAK_H_

2435
driver/platform/anorak/src/msm_vidc_anorak.c
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File diff suppressed because it is too large Load Diff

10
driver/platform/common/inc/msm_vidc_platform.h
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@@ -167,6 +167,14 @@ struct msm_platform_inst_cap_dependency {
enum msm_vidc_inst_capability_type cap_id); enum msm_vidc_inst_capability_type cap_id);
}; };
struct msm_vidc_compat_handle {
const char *compat;
int (*init_platform)(struct msm_vidc_core *core);
int (*deinit_platform)(struct msm_vidc_core *core);
int (*init_iris)(struct msm_vidc_core *core);
int (*deinit_iris)(struct msm_vidc_core *core);
};
struct msm_vidc_csc_coeff { struct msm_vidc_csc_coeff {
u32 *vpe_csc_custom_matrix_coeff; u32 *vpe_csc_custom_matrix_coeff;
u32 *vpe_csc_custom_bias_coeff; u32 *vpe_csc_custom_bias_coeff;
@@ -201,7 +209,7 @@ struct msm_vidc_platform_data {
unsigned int regulator_tbl_size; unsigned int regulator_tbl_size;
const struct pd_table *pd_tbl; const struct pd_table *pd_tbl;
unsigned int pd_tbl_size; unsigned int pd_tbl_size;
const char **opp_tbl; const char * const *opp_tbl;
unsigned int opp_tbl_size; unsigned int opp_tbl_size;
const struct clk_table *clk_tbl; const struct clk_table *clk_tbl;
unsigned int clk_tbl_size; unsigned int clk_tbl_size;

268
driver/platform/common/src/msm_vidc_platform.c
View File

@@ -21,26 +21,17 @@
#include "hfi_property.h" #include "hfi_property.h"
#include "venus_hfi.h" #include "venus_hfi.h"
#if defined(CONFIG_MSM_VIDC_WAIPIO) #if defined(CONFIG_MSM_VIDC_PINEAPPLE)
#include "msm_vidc_waipio.h" #include "msm_vidc_pineapple.h"
#include "msm_vidc_iris33.h"
#endif #endif
#if defined(CONFIG_MSM_VIDC_KALAMA) #if defined(CONFIG_MSM_VIDC_KALAMA)
#include "msm_vidc_kalama.h" #include "msm_vidc_kalama.h"
#endif
#if defined(CONFIG_MSM_VIDC_PINEAPPLE)
#include "msm_vidc_pineapple.h"
#endif
#if defined(CONFIG_MSM_VIDC_ANORAK)
#include "msm_vidc_anorak.h"
#endif
#if defined(CONFIG_MSM_VIDC_IRIS2)
#include "msm_vidc_iris2.h"
#endif
#if defined(CONFIG_MSM_VIDC_IRIS3)
#include "msm_vidc_iris3.h" #include "msm_vidc_iris3.h"
#endif #endif
#if defined(CONFIG_MSM_VIDC_IRIS33) #if defined(CONFIG_MSM_VIDC_WAIPIO)
#include "msm_vidc_iris33.h" #include "msm_vidc_waipio.h"
#include "msm_vidc_iris2.h"
#endif #endif
#define CAP_TO_8BIT_QP(a) { \ #define CAP_TO_8BIT_QP(a) { \
@@ -214,6 +205,50 @@ static struct v4l2_m2m_ops msm_v4l2_m2m_ops = {
.job_abort = msm_v4l2_m2m_job_abort, .job_abort = msm_v4l2_m2m_job_abort,
}; };
static const struct msm_vidc_compat_handle compat_handle[] = {
#if defined(CONFIG_MSM_VIDC_PINEAPPLE)
{
.compat = "qcom,sm8650-vidc",
.init_platform = msm_vidc_init_platform_pineapple,
.deinit_platform = msm_vidc_deinit_platform_pineapple,
.init_iris = msm_vidc_init_iris33,
.deinit_iris = msm_vidc_deinit_iris33,
},
{
.compat = "qcom,sm8650-vidc-v2",
.init_platform = msm_vidc_init_platform_pineapple,
.deinit_platform = msm_vidc_deinit_platform_pineapple,
.init_iris = msm_vidc_init_iris33,
.deinit_iris = msm_vidc_deinit_iris33,
},
#endif
#if defined(CONFIG_MSM_VIDC_KALAMA)
{
.compat = "qcom,sm8550-vidc",
.init_platform = msm_vidc_init_platform_kalama,
.deinit_platform = msm_vidc_deinit_platform_kalama,
.init_iris = msm_vidc_init_iris3,
.deinit_iris = msm_vidc_deinit_iris3,
},
{
.compat = "qcom,sm8550-vidc-v2",
.init_platform = msm_vidc_init_platform_kalama,
.deinit_platform = msm_vidc_deinit_platform_kalama,
.init_iris = msm_vidc_init_iris3,
.deinit_iris = msm_vidc_deinit_iris3,
},
#endif
#if defined(CONFIG_MSM_VIDC_WAIPIO)
{
.compat = "qcom,sm8450-vidc",
.init_platform = msm_vidc_init_platform_waipio,
.deinit_platform = msm_vidc_deinit_platform_waipio,
.init_iris = msm_vidc_init_iris2,
.deinit_iris = msm_vidc_deinit_iris2,
},
#endif
};
static int msm_vidc_init_ops(struct msm_vidc_core *core) static int msm_vidc_init_ops(struct msm_vidc_core *core)
{ {
if (!core) { if (!core) {
@@ -244,179 +279,138 @@ static int msm_vidc_init_ops(struct msm_vidc_core *core)
return 0; return 0;
} }
static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core)
{ {
int rc = -EINVAL; struct device *dev = NULL;
int i, rc = 0;
if (!core || !dev) { if (!core || !core->pdev) {
d_vpr_e("%s: Invalid params\n", __func__); d_vpr_e("%s: Invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
d_vpr_h("%s()\n", __func__); d_vpr_h("%s()\n", __func__);
#if defined(CONFIG_MSM_VIDC_WAIPIO) /* select platform based on compatible match */
if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { for (i = 0; i < ARRAY_SIZE(compat_handle); i++) {
rc = msm_vidc_deinit_platform_waipio(core, dev); if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) {
if (rc) rc = compat_handle[i].deinit_platform(core);
d_vpr_e("%s: failed with %d\n", __func__, rc); if (rc) {
d_vpr_e("%s: (%s) init failed with %d\n",
__func__, compat_handle[i].compat, rc);
return rc; return rc;
} }
#endif break;
#if defined(CONFIG_MSM_VIDC_KALAMA)
if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) {
rc = msm_vidc_deinit_platform_kalama(core, dev);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_PINEAPPLE)
if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) {
rc = msm_vidc_deinit_platform_pineapple(core, dev);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_ANORAK) /* handle unknown compat type */
if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { if (i == ARRAY_SIZE(compat_handle)) {
rc = msm_vidc_deinit_platform_anorak(core, dev); d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev));
if (rc) return -EINVAL;
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
return rc; return rc;
} }
static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_init_platform_variant(struct msm_vidc_core *core)
{ {
int rc = -EINVAL; struct device *dev = NULL;
int i, rc = 0;
if (!core || !dev) { if (!core || !core->pdev) {
d_vpr_e("%s: Invalid params\n", __func__); d_vpr_e("%s: Invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
d_vpr_h("%s()\n", __func__); d_vpr_h("%s()\n", __func__);
#if defined(CONFIG_MSM_VIDC_WAIPIO) /* select platform based on compatible match */
if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { for (i = 0; i < ARRAY_SIZE(compat_handle); i++) {
rc = msm_vidc_init_platform_waipio(core, dev); if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) {
if (rc) rc = compat_handle[i].init_platform(core);
d_vpr_e("%s: failed with %d\n", __func__, rc); if (rc) {
d_vpr_e("%s: (%s) init failed with %d\n",
__func__, compat_handle[i].compat, rc);
return rc; return rc;
} }
#endif break;
#if defined(CONFIG_MSM_VIDC_KALAMA)
if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) {
rc = msm_vidc_init_platform_kalama(core, dev);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_PINEAPPLE)
if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) {
rc = msm_vidc_init_platform_pineapple(core, dev);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_ANORAK) /* handle unknown compat type */
if (of_device_is_compatible(dev->of_node, "qcom,sxr2230p-vidc")) { if (i == ARRAY_SIZE(compat_handle)) {
rc = msm_vidc_init_platform_anorak(core, dev); d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev));
if (rc) return -EINVAL;
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
return rc; return rc;
} }
static int msm_vidc_deinit_vpu(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_deinit_vpu(struct msm_vidc_core *core)
{ {
int rc = -EINVAL; struct device *dev = NULL;
int i, rc = 0;
if (!core || !dev) { if (!core || !core->pdev) {
d_vpr_e("%s: Invalid params\n", __func__); d_vpr_e("%s: Invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
d_vpr_h("%s()\n", __func__); /* select platform based on compatible match */
for (i = 0; i < ARRAY_SIZE(compat_handle); i++) {
if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) {
rc = compat_handle[i].deinit_iris(core);
if (rc) {
d_vpr_e("%s: (%s) init failed with %d\n",
__func__, compat_handle[i].compat, rc);
return rc;
}
break;
}
}
#if defined(CONFIG_MSM_VIDC_IRIS2) /* handle unknown compat type */
if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { if (i == ARRAY_SIZE(compat_handle)) {
rc = msm_vidc_deinit_iris2(core); d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev));
if (rc) return -EINVAL;
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_IRIS3)
if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) {
rc = msm_vidc_deinit_iris3(core);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
}
#endif
#if defined(CONFIG_MSM_VIDC_IRIS33)
if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) {
rc = msm_vidc_deinit_iris33(core);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
}
#endif
return rc; return rc;
} }
static int msm_vidc_init_vpu(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_init_vpu(struct msm_vidc_core *core)
{ {
int rc = -EINVAL; struct device *dev = NULL;
int i, rc = 0;
if (!core || !dev) { if (!core || !core->pdev) {
d_vpr_e("%s: Invalid params\n", __func__); d_vpr_e("%s: Invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
#if defined(CONFIG_MSM_VIDC_IRIS2) /* select platform based on compatible match */
if (of_device_is_compatible(dev->of_node, "qcom,sm8450-vidc")) { for (i = 0; i < ARRAY_SIZE(compat_handle); i++) {
rc = msm_vidc_init_iris2(core); if (of_device_is_compatible(dev->of_node, compat_handle[i].compat)) {
if (rc) rc = compat_handle[i].init_iris(core);
d_vpr_e("%s: failed with %d\n", __func__, rc); if (rc) {
d_vpr_e("%s: (%s) init failed with %d\n",
__func__, compat_handle[i].compat, rc);
return rc; return rc;
} }
#endif break;
#if defined(CONFIG_MSM_VIDC_IRIS3)
if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) {
rc = msm_vidc_init_iris3(core);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
#if defined(CONFIG_MSM_VIDC_IRIS33)
if (of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc") ||
of_device_is_compatible(dev->of_node, "qcom,sm8650-vidc-v2")) {
rc = msm_vidc_init_iris33(core);
if (rc)
d_vpr_e("%s: failed with %d\n", __func__, rc);
return rc;
} }
#endif
/* handle unknown compat type */
if (i == ARRAY_SIZE(compat_handle)) {
d_vpr_e("%s: Unsupported device: (%s)\n", __func__, dev_name(dev));
return -EINVAL;
}
return rc; return rc;
} }
@@ -439,8 +433,8 @@ int msm_vidc_deinit_platform(struct platform_device *pdev)
d_vpr_h("%s()\n", __func__); d_vpr_h("%s()\n", __func__);
msm_vidc_deinit_vpu(core, &pdev->dev); msm_vidc_deinit_vpu(core);
msm_vidc_deinit_platform_variant(core, &pdev->dev); msm_vidc_deinit_platform_variant(core);
msm_vidc_vmem_free((void **)&core->platform); msm_vidc_vmem_free((void **)&core->platform);
return 0; return 0;
@@ -479,11 +473,11 @@ int msm_vidc_init_platform(struct platform_device *pdev)
if (rc) if (rc)
return rc; return rc;
rc = msm_vidc_init_platform_variant(core, &pdev->dev); rc = msm_vidc_init_platform_variant(core);
if (rc) if (rc)
return rc; return rc;
rc = msm_vidc_init_vpu(core, &pdev->dev); rc = msm_vidc_init_vpu(core);
if (rc) if (rc)
return rc; return rc;

8
driver/platform/kalama/inc/msm_vidc_kalama.h
View File

@@ -10,15 +10,15 @@
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_KALAMA) #if defined(CONFIG_MSM_VIDC_KALAMA)
int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev); int msm_vidc_init_platform_kalama(struct msm_vidc_core *core);
int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev); int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core);
#else #else
int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_kalama(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }
int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }

1694
driver/platform/kalama/src/kalama.c
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File diff suppressed because it is too large Load Diff

13
driver/platform/kalama/src/msm_vidc_kalama.c
View File

@@ -2656,14 +2656,17 @@ int msm_vidc_kalama_check_ddr_type(void)
return 0; return 0;
} }
static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_init_data(struct msm_vidc_core *core)
{ {
struct device *dev = NULL;
int rc = 0; int rc = 0;
if (!core || !core->platform || !dev) { if (!core || !core->pdev || !core->platform) {
d_vpr_e("%s: invalid params\n", __func__); d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
d_vpr_h("%s: initialize kalama data\n", __func__); d_vpr_h("%s: initialize kalama data\n", __func__);
if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2")) if (of_device_is_compatible(dev->of_node, "qcom,sm8550-vidc-v2"))
@@ -2688,18 +2691,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev)
return rc; return rc;
} }
int msm_vidc_init_platform_kalama(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_kalama(struct msm_vidc_core *core)
{ {
int rc = 0; int rc = 0;
rc = msm_vidc_init_data(core, dev); rc = msm_vidc_init_data(core);
if (rc) if (rc)
return rc; return rc;
return 0; return 0;
} }
int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_kalama(struct msm_vidc_core *core)
{ {
/* do nothing */ /* do nothing */
return 0; return 0;

8
driver/platform/pineapple/inc/msm_vidc_pineapple.h
View File

@@ -10,15 +10,15 @@
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_PINEAPPLE) #if defined(CONFIG_MSM_VIDC_PINEAPPLE)
int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev); int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core);
int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev); int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core);
#else #else
int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }
int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }

13
driver/platform/pineapple/src/msm_vidc_pineapple.c
View File

@@ -2664,14 +2664,17 @@ int msm_vidc_pineapple_check_ddr_type(void)
return 0; return 0;
} }
static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_init_data(struct msm_vidc_core *core)
{ {
struct device *dev = NULL;
int rc = 0; int rc = 0;
if (!core || !core->platform || !dev) { if (!core || !core->pdev || !core->platform) {
d_vpr_e("%s: invalid params\n", __func__); d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL; return -EINVAL;
} }
dev = &core->pdev->dev;
d_vpr_h("%s: initialize pineapple data\n", __func__); d_vpr_h("%s: initialize pineapple data\n", __func__);
core->platform->data = pineapple_data; core->platform->data = pineapple_data;
@@ -2698,18 +2701,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev)
return rc; return rc;
} }
int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core)
{ {
int rc = 0; int rc = 0;
rc = msm_vidc_init_data(core, dev); rc = msm_vidc_init_data(core);
if (rc) if (rc)
return rc; return rc;
return 0; return 0;
} }
int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core)
{ {
/* do nothing */ /* do nothing */
return 0; return 0;

88
driver/platform/pineapple/src/pineapple.c
View File

@@ -1243,82 +1243,64 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine
* adjust, set} * adjust, set}
*/ */
{PIX_FMTS, ENC, H264,
{0},
{0}},
{PIX_FMTS, ENC, HEVC, {PIX_FMTS, ENC, HEVC,
{0},
{PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP, {PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP,
B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}}, B_FRAME_QP, MIN_QUALITY, BLUR_TYPES, LTR_COUNT}},
{PIX_FMTS, DEC, HEVC, {PIX_FMTS, DEC, HEVC,
{0},
{PROFILE}}, {PROFILE}},
{FRAME_RATE, ENC, CODECS_ALL, {FRAME_RATE, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_q16}, msm_vidc_set_q16},
{HFLIP, ENC, CODECS_ALL, {HFLIP, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_flip}, msm_vidc_set_flip},
{VFLIP, ENC, CODECS_ALL, {VFLIP, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_flip}, msm_vidc_set_flip},
{ROTATION, ENC, CODECS_ALL, {ROTATION, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_rotation}, msm_vidc_set_rotation},
{SUPER_FRAME, ENC, H264|HEVC, {SUPER_FRAME, ENC, H264|HEVC,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT}, {INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL,
NULL}, NULL},
{HEADER_MODE, ENC, CODECS_ALL, {HEADER_MODE, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_header_mode}, msm_vidc_set_header_mode},
{WITHOUT_STARTCODE, ENC, CODECS_ALL, {WITHOUT_STARTCODE, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_nal_length}, msm_vidc_set_nal_length},
{REQUEST_I_FRAME, ENC, H264|HEVC, {REQUEST_I_FRAME, ENC, H264|HEVC,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_req_sync_frame}, msm_vidc_set_req_sync_frame},
{BIT_RATE, ENC, H264, {BIT_RATE, ENC, H264,
{ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE,
ALL_INTRA, LOWLATENCY_MODE},
{PEAK_BITRATE, L0_BR}, {PEAK_BITRATE, L0_BR},
msm_vidc_adjust_bitrate, msm_vidc_adjust_bitrate,
msm_vidc_set_bitrate}, msm_vidc_set_bitrate},
{BIT_RATE, ENC, HEVC, {BIT_RATE, ENC, HEVC,
{ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE},
{PEAK_BITRATE, L0_BR}, {PEAK_BITRATE, L0_BR},
msm_vidc_adjust_bitrate, msm_vidc_adjust_bitrate,
msm_vidc_set_bitrate}, msm_vidc_set_bitrate},
{BITRATE_MODE, ENC, H264, {BITRATE_MODE, ENC, H264,
{0},
{LTR_COUNT, I_FRAME_QP, P_FRAME_QP, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP,
B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE,
MIN_QUALITY, VBV_DELAY, MIN_QUALITY, VBV_DELAY,
@@ -1328,7 +1310,6 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{BITRATE_MODE, ENC, HEVC, {BITRATE_MODE, ENC, HEVC,
{0},
{LTR_COUNT, I_FRAME_QP, P_FRAME_QP, {LTR_COUNT, I_FRAME_QP, P_FRAME_QP,
B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT,
BIT_RATE, MIN_QUALITY, VBV_DELAY, BIT_RATE, MIN_QUALITY, VBV_DELAY,
@@ -1338,387 +1319,322 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{CONSTANT_QUALITY, ENC, HEVC, {CONSTANT_QUALITY, ENC, HEVC,
{BITRATE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_constant_quality}, msm_vidc_set_constant_quality},
{GOP_SIZE, ENC, CODECS_ALL, {GOP_SIZE, ENC, CODECS_ALL,
{ENH_LAYER_COUNT},
{ALL_INTRA}, {ALL_INTRA},
msm_vidc_adjust_gop_size, msm_vidc_adjust_gop_size,
msm_vidc_set_gop_size}, msm_vidc_set_gop_size},
{B_FRAME, ENC, H264|HEVC, {B_FRAME, ENC, H264|HEVC,
{ENH_LAYER_COUNT},
{ALL_INTRA}, {ALL_INTRA},
msm_vidc_adjust_b_frame, msm_vidc_adjust_b_frame,
msm_vidc_set_u32}, msm_vidc_set_u32},
{BLUR_TYPES, ENC, H264|HEVC, {BLUR_TYPES, ENC, H264|HEVC,
{PIX_FMTS, BITRATE_MODE, MIN_QUALITY},
{0}, {0},
msm_vidc_adjust_blur_type, msm_vidc_adjust_blur_type,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{LOWLATENCY_MODE, ENC, H264 | HEVC, {LOWLATENCY_MODE, ENC, H264 | HEVC,
{BITRATE_MODE, DELIVERY_MODE},
{STAGE, BIT_RATE}, {STAGE, BIT_RATE},
msm_vidc_adjust_enc_lowlatency_mode, msm_vidc_adjust_enc_lowlatency_mode,
NULL}, NULL},
{LOWLATENCY_MODE, DEC, H264|HEVC|VP9, {LOWLATENCY_MODE, DEC, H264|HEVC|VP9,
{0},
{STAGE}, {STAGE},
msm_vidc_adjust_dec_lowlatency_mode, msm_vidc_adjust_dec_lowlatency_mode,
NULL}, NULL},
{LTR_COUNT, ENC, H264|HEVC, {LTR_COUNT, ENC, H264|HEVC,
{BITRATE_MODE, ALL_INTRA},
{0}, {0},
msm_vidc_adjust_ltr_count, msm_vidc_adjust_ltr_count,
msm_vidc_set_u32}, msm_vidc_set_u32},
{USE_LTR, ENC, H264|HEVC, {USE_LTR, ENC, H264|HEVC,
{0},
{0}, {0},
msm_vidc_adjust_use_ltr, msm_vidc_adjust_use_ltr,
msm_vidc_set_use_and_mark_ltr}, msm_vidc_set_use_and_mark_ltr},
{MARK_LTR, ENC, H264|HEVC, {MARK_LTR, ENC, H264|HEVC,
{0},
{0}, {0},
msm_vidc_adjust_mark_ltr, msm_vidc_adjust_mark_ltr,
msm_vidc_set_use_and_mark_ltr}, msm_vidc_set_use_and_mark_ltr},
{AU_DELIMITER, ENC, H264|HEVC, {AU_DELIMITER, ENC, H264|HEVC,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32}, msm_vidc_set_u32},
{CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC, {CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC,
{BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE},
{REQUEST_PREPROCESS}, {REQUEST_PREPROCESS},
msm_vidc_adjust_brs, msm_vidc_adjust_brs,
msm_vidc_set_vbr_related_properties}, msm_vidc_set_vbr_related_properties},
{REQUEST_PREPROCESS, ENC, H264|HEVC, {REQUEST_PREPROCESS, ENC, H264|HEVC,
{CONTENT_ADAPTIVE_CODING},
{0}, {0},
msm_vidc_adjust_preprocess, msm_vidc_adjust_preprocess,
msm_vidc_set_preprocess}, msm_vidc_set_preprocess},
{MIN_QUALITY, ENC, H264, {MIN_QUALITY, ENC, H264,
{BITRATE_MODE, ENH_LAYER_COUNT},
{BLUR_TYPES}, {BLUR_TYPES},
msm_vidc_adjust_min_quality, msm_vidc_adjust_min_quality,
msm_vidc_set_u32}, msm_vidc_set_u32},
{MIN_QUALITY, ENC, HEVC, {MIN_QUALITY, ENC, HEVC,
{BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT},
{BLUR_TYPES}, {BLUR_TYPES},
msm_vidc_adjust_min_quality, msm_vidc_adjust_min_quality,
msm_vidc_set_u32}, msm_vidc_set_u32},
{VBV_DELAY, ENC, H264|HEVC, {VBV_DELAY, ENC, H264|HEVC,
{BITRATE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_cbr_related_properties}, msm_vidc_set_cbr_related_properties},
{PEAK_BITRATE, ENC, H264|HEVC, {PEAK_BITRATE, ENC, H264|HEVC,
{BITRATE_MODE, BIT_RATE},
{0}, {0},
msm_vidc_adjust_peak_bitrate, msm_vidc_adjust_peak_bitrate,
msm_vidc_set_cbr_related_properties}, msm_vidc_set_cbr_related_properties},
{MIN_FRAME_QP, ENC, H264, {MIN_FRAME_QP, ENC, H264,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_min_qp}, msm_vidc_set_min_qp},
{MIN_FRAME_QP, ENC, HEVC, {MIN_FRAME_QP, ENC, HEVC,
{PIX_FMTS},
{0}, {0},
msm_vidc_adjust_hevc_min_qp, msm_vidc_adjust_hevc_min_qp,
msm_vidc_set_min_qp}, msm_vidc_set_min_qp},
{MAX_FRAME_QP, ENC, H264, {MAX_FRAME_QP, ENC, H264,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_max_qp}, msm_vidc_set_max_qp},
{MAX_FRAME_QP, ENC, HEVC, {MAX_FRAME_QP, ENC, HEVC,
{PIX_FMTS},
{0}, {0},
msm_vidc_adjust_hevc_max_qp, msm_vidc_adjust_hevc_max_qp,
msm_vidc_set_max_qp}, msm_vidc_set_max_qp},
{I_FRAME_QP, ENC, HEVC, {I_FRAME_QP, ENC, HEVC,
{PIX_FMTS, BITRATE_MODE},
{0}, {0},
msm_vidc_adjust_hevc_i_frame_qp, msm_vidc_adjust_hevc_i_frame_qp,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{I_FRAME_QP, ENC, H264, {I_FRAME_QP, ENC, H264,
{BITRATE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{P_FRAME_QP, ENC, HEVC, {P_FRAME_QP, ENC, HEVC,
{PIX_FMTS, BITRATE_MODE},
{0}, {0},
msm_vidc_adjust_hevc_p_frame_qp, msm_vidc_adjust_hevc_p_frame_qp,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{P_FRAME_QP, ENC, H264, {P_FRAME_QP, ENC, H264,
{BITRATE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{B_FRAME_QP, ENC, HEVC, {B_FRAME_QP, ENC, HEVC,
{PIX_FMTS, BITRATE_MODE},
{0}, {0},
msm_vidc_adjust_hevc_b_frame_qp, msm_vidc_adjust_hevc_b_frame_qp,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{B_FRAME_QP, ENC, H264, {B_FRAME_QP, ENC, H264,
{BITRATE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_frame_qp}, msm_vidc_set_frame_qp},
{LAYER_TYPE, ENC, H264|HEVC, {LAYER_TYPE, ENC, H264|HEVC,
{0},
{CONTENT_ADAPTIVE_CODING, LTR_COUNT}}, {CONTENT_ADAPTIVE_CODING, LTR_COUNT}},
{LAYER_ENABLE, ENC, H264|HEVC, {LAYER_ENABLE, ENC, H264|HEVC,
{0},
{CONTENT_ADAPTIVE_CODING}}, {CONTENT_ADAPTIVE_CODING}},
{ENH_LAYER_COUNT, ENC, H264|HEVC, {ENH_LAYER_COUNT, ENC, H264|HEVC,
{BITRATE_MODE},
{GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT}, {GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY, LTR_COUNT},
msm_vidc_adjust_layer_count, msm_vidc_adjust_layer_count,
msm_vidc_set_layer_count_and_type}, msm_vidc_set_layer_count_and_type},
{L0_BR, ENC, H264|HEVC, {L0_BR, ENC, H264|HEVC,
{BIT_RATE},
{L1_BR}, {L1_BR},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{L1_BR, ENC, H264|HEVC, {L1_BR, ENC, H264|HEVC,
{L0_BR},
{L2_BR}, {L2_BR},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{L2_BR, ENC, H264|HEVC, {L2_BR, ENC, H264|HEVC,
{L1_BR},
{L3_BR}, {L3_BR},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{L3_BR, ENC, H264|HEVC, {L3_BR, ENC, H264|HEVC,
{L2_BR},
{L4_BR}, {L4_BR},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{L4_BR, ENC, H264|HEVC, {L4_BR, ENC, H264|HEVC,
{L3_BR},
{L5_BR}, {L5_BR},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{L5_BR, ENC, H264|HEVC, {L5_BR, ENC, H264|HEVC,
{L4_BR},
{0}, {0},
msm_vidc_adjust_layer_bitrate, msm_vidc_adjust_layer_bitrate,
msm_vidc_set_layer_bitrate}, msm_vidc_set_layer_bitrate},
{ENTROPY_MODE, ENC, H264, {ENTROPY_MODE, ENC, H264,
{PROFILE},
{BIT_RATE}, {BIT_RATE},
msm_vidc_adjust_entropy_mode, msm_vidc_adjust_entropy_mode,
msm_vidc_set_u32}, msm_vidc_set_u32},
{PROFILE, ENC, H264, {PROFILE, ENC, H264,
{0},
{ENTROPY_MODE, TRANSFORM_8X8}, {ENTROPY_MODE, TRANSFORM_8X8},
NULL, NULL,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{PROFILE, DEC, H264, {PROFILE, DEC, H264,
{0},
{ENTROPY_MODE}, {ENTROPY_MODE},
NULL, NULL,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{PROFILE, ENC|DEC, HEVC, {PROFILE, ENC|DEC, HEVC,
{PIX_FMTS},
{0}, {0},
msm_vidc_adjust_profile, msm_vidc_adjust_profile,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{PROFILE, DEC, VP9, {PROFILE, DEC, VP9,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{LEVEL, DEC, CODECS_ALL, {LEVEL, DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{LEVEL, ENC, CODECS_ALL, {LEVEL, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_level}, msm_vidc_set_level},
{HEVC_TIER, ENC|DEC, HEVC, {HEVC_TIER, ENC|DEC, HEVC,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32_enum}, msm_vidc_set_u32_enum},
{LF_MODE, ENC, CODECS_ALL, {LF_MODE, ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_deblock_mode}, msm_vidc_set_deblock_mode},
{SLICE_MODE, ENC, H264|HEVC, {SLICE_MODE, ENC, H264|HEVC,
{BITRATE_MODE, ALL_INTRA},
{STAGE, DELIVERY_MODE}, {STAGE, DELIVERY_MODE},
msm_vidc_adjust_slice_count, msm_vidc_adjust_slice_count,
msm_vidc_set_slice_count}, msm_vidc_set_slice_count},
{TRANSFORM_8X8, ENC, H264, {TRANSFORM_8X8, ENC, H264,
{PROFILE},
{0}, {0},
msm_vidc_adjust_transform_8x8, msm_vidc_adjust_transform_8x8,
msm_vidc_set_u32}, msm_vidc_set_u32},
{CHROMA_QP_INDEX_OFFSET, ENC, HEVC, {CHROMA_QP_INDEX_OFFSET, ENC, HEVC,
{0},
{0}, {0},
msm_vidc_adjust_chroma_qp_index_offset, msm_vidc_adjust_chroma_qp_index_offset,
msm_vidc_set_chroma_qp_index_offset}, msm_vidc_set_chroma_qp_index_offset},
{DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9, {DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9,
{0},
{OUTPUT_ORDER}, {OUTPUT_ORDER},
NULL, NULL,
NULL}, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9, {DISPLAY_DELAY, DEC, H264|HEVC|VP9,
{0},
{OUTPUT_ORDER}, {OUTPUT_ORDER},
NULL, NULL,
NULL}, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9, {OUTPUT_ORDER, DEC, H264|HEVC|VP9,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0}, {0},
msm_vidc_adjust_output_order, msm_vidc_adjust_output_order,
msm_vidc_set_u32}, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, {INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
{0},
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_adjust_input_buf_host_max_count,
msm_vidc_set_u32}, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, {INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
{SUPER_FRAME},
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_adjust_input_buf_host_max_count,
msm_vidc_set_u32}, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL, {OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
{0},
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_adjust_output_buf_host_max_count,
msm_vidc_set_u32}, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC, {OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
{SUPER_FRAME, DELIVERY_MODE},
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_adjust_output_buf_host_max_count,
msm_vidc_set_u32}, msm_vidc_set_u32},
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, {CONCEAL_COLOR_8BIT, DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32_packed}, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, {CONCEAL_COLOR_10BIT, DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32_packed}, msm_vidc_set_u32_packed},
{STAGE, ENC | DEC, CODECS_ALL, {STAGE, ENC | DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_stage}, msm_vidc_set_stage},
{STAGE, ENC, H264|HEVC, {STAGE, ENC, H264|HEVC,
{LOWLATENCY_MODE, SLICE_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_stage}, msm_vidc_set_stage},
{STAGE, DEC, H264|HEVC|VP9, {STAGE, DEC, H264|HEVC|VP9,
{LOWLATENCY_MODE},
{0}, {0},
NULL, NULL,
msm_vidc_set_stage}, msm_vidc_set_stage},
{PIPE, DEC|ENC, CODECS_ALL, {PIPE, DEC|ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_pipe}, msm_vidc_set_pipe},
{THUMBNAIL_MODE, DEC, CODECS_ALL, {THUMBNAIL_MODE, DEC, CODECS_ALL,
{0},
{OUTPUT_ORDER}, {OUTPUT_ORDER},
NULL, NULL,
msm_vidc_set_u32}, msm_vidc_set_u32},
{RAP_FRAME, DEC, CODECS_ALL, {RAP_FRAME, DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
msm_vidc_set_u32}, msm_vidc_set_u32},
{FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL, {FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
NULL}, NULL},
{DPB_LIST, DEC, CODECS_ALL, {DPB_LIST, DEC, CODECS_ALL,
{0},
{0}, {0},
NULL, NULL,
NULL}, NULL},
{ALL_INTRA, ENC, H264|HEVC, {ALL_INTRA, ENC, H264|HEVC,
{GOP_SIZE, B_FRAME},
{LTR_COUNT, SLICE_MODE, BIT_RATE}, {LTR_COUNT, SLICE_MODE, BIT_RATE},
msm_vidc_adjust_all_intra, msm_vidc_adjust_all_intra,
NULL}, NULL},
@@ -1790,7 +1706,7 @@ static int msm_vidc_init_data(struct msm_vidc_core *core)
return rc; return rc;
} }
int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core)
{ {
int rc = 0; int rc = 0;
@@ -1801,7 +1717,7 @@ int msm_vidc_init_platform_pineapple(struct msm_vidc_core *core, struct device *
return 0; return 0;
} }
int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_pineapple(struct msm_vidc_core *core)
{ {
/* do nothing */ /* do nothing */
return 0; return 0;

10
driver/platform/waipio/inc/msm_vidc_waipio.h
View File

@@ -8,15 +8,13 @@
#define _MSM_VIDC_WAIPIO_H_ #define _MSM_VIDC_WAIPIO_H_
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_IRIS2)
#include "msm_vidc_iris2.h" #include "msm_vidc_iris2.h"
#endif
#if defined(CONFIG_MSM_VIDC_WAIPIO) #if defined(CONFIG_MSM_VIDC_WAIPIO)
struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core,
enum msm_vidc_buffer_region region); enum msm_vidc_buffer_region region);
int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev); int msm_vidc_init_platform_waipio(struct msm_vidc_core *core);
int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev); int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core);
#else #else
struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core, struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core,
enum msm_vidc_buffer_region region) enum msm_vidc_buffer_region region)
@@ -24,12 +22,12 @@ struct context_bank_info *msm_vidc_context_bank(struct msm_vidc_core *core,
return NULL; return NULL;
} }
int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_waipio(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }
int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core)
{ {
return -EINVAL; return -EINVAL;
} }

2172
driver/platform/waipio/src/msm_vidc_waipio.c
View File

File diff suppressed because it is too large Load Diff

8
driver/platform/waipio/src/waipio.c
View File

@@ -1750,7 +1750,7 @@ static const struct msm_vidc_platform_data waipio_data = {
.format_data = &format_data_waipio, .format_data = &format_data_waipio,
}; };
static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev) static int msm_vidc_init_data(struct msm_vidc_core *core)
{ {
int rc = 0; int rc = 0;
@@ -1765,18 +1765,18 @@ static int msm_vidc_init_data(struct msm_vidc_core *core, struct device *dev)
return rc; return rc;
} }
int msm_vidc_init_platform_waipio(struct msm_vidc_core *core, struct device *dev) int msm_vidc_init_platform_waipio(struct msm_vidc_core *core)
{ {
int rc = 0; int rc = 0;
rc = msm_vidc_init_data(core, dev); rc = msm_vidc_init_data(core);
if (rc) if (rc)
return rc; return rc;
return 0; return 0;
} }
int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core, struct device *dev) int msm_vidc_deinit_platform_waipio(struct msm_vidc_core *core)
{ {
/* do nothing */ /* do nothing */
return 0; return 0;

2
driver/variant/iris2/inc/msm_vidc_iris2.h
View File

@@ -9,7 +9,7 @@
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_IRIS2) #if defined(CONFIG_MSM_VIDC_WAIPIO)
int msm_vidc_init_iris2(struct msm_vidc_core *core); int msm_vidc_init_iris2(struct msm_vidc_core *core);
int msm_vidc_deinit_iris2(struct msm_vidc_core *core); int msm_vidc_deinit_iris2(struct msm_vidc_core *core);
int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_blur_type_iris2(void *instance, struct v4l2_ctrl *ctrl);

2
driver/variant/iris3/inc/msm_vidc_iris3.h
View File

@@ -9,7 +9,7 @@
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_IRIS3) #if defined(CONFIG_MSM_VIDC_KALAMA)
int msm_vidc_init_iris3(struct msm_vidc_core *core); int msm_vidc_init_iris3(struct msm_vidc_core *core);
int msm_vidc_deinit_iris3(struct msm_vidc_core *core); int msm_vidc_deinit_iris3(struct msm_vidc_core *core);
int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_boost_iris3(void *instance, struct v4l2_ctrl *ctrl);

2
driver/variant/iris33/inc/msm_vidc_iris33.h
View File

@@ -9,7 +9,7 @@
#include "msm_vidc_core.h" #include "msm_vidc_core.h"
#if defined(CONFIG_MSM_VIDC_IRIS33) #if defined(CONFIG_MSM_VIDC_PINEAPPLE)
int msm_vidc_init_iris33(struct msm_vidc_core *core); int msm_vidc_init_iris33(struct msm_vidc_core *core);
int msm_vidc_deinit_iris33(struct msm_vidc_core *core); int msm_vidc_deinit_iris33(struct msm_vidc_core *core);
int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl); int msm_vidc_adjust_bitrate_boost_iris33(void *instance, struct v4l2_ctrl *ctrl);

2
driver/vidc/src/resources.c
View File

@@ -351,7 +351,7 @@ static int __init_power_domains(struct msm_vidc_core *core)
const struct pd_table *pd_tbl; const struct pd_table *pd_tbl;
struct power_domain_set *pds; struct power_domain_set *pds;
struct device **opp_vdevs = NULL; struct device **opp_vdevs = NULL;
const char **opp_tbl; const char * const *opp_tbl;
u32 pd_count = 0, opp_count = 0, cnt = 0; u32 pd_count = 0, opp_count = 0, cnt = 0;
int rc = 0; int rc = 0;

77
msm_video/Kbuild
View File

@@ -4,33 +4,27 @@ KBUILD_CPPFLAGS += -DCONFIG_MSM_MMRM=1
VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/msm_video/driver VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/msm_video/driver
VIDEO_DRIVER_REL_PATH := ../msm_video/driver VIDEO_DRIVER_REL_PATH := ../msm_video/driver
ifeq ($(CONFIG_ARCH_WAIPIO), y) ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
include $(VIDEO_ROOT)/config/waipio_video.conf include $(VIDEO_ROOT)/config/pineapple_video.conf
LINUXINCLUDE += -include $(VIDEO_ROOT)/config/waipio_video.h \ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h
-I$(VIDEO_DRIVER_ABS_PATH)/platform/waipio/inc
endif endif
ifeq ($(CONFIG_ARCH_KALAMA), y) ifeq ($(CONFIG_ARCH_KALAMA), y)
include $(VIDEO_ROOT)/config/kalama_video.conf include $(VIDEO_ROOT)/config/kalama_video.conf
LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h
-I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc
endif endif
ifeq ($(CONFIG_ARCH_PINEAPPLE), y) ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y)
include $(VIDEO_ROOT)/config/pineapple_video.conf LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \
LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc
-I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc
endif endif
ifeq ($(CONFIG_MSM_VIDC_KALAMA), y)
ifeq ($(CONFIG_ARCH_ANORAK), y) LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc \
include $(VIDEO_ROOT)/config/anorak_video.conf -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc
LINUXINCLUDE += -include $(VIDEO_ROOT)/config/anorak_video.h \
-I$(VIDEO_DRIVER_ABS_PATH)/platform/anorak/inc
endif endif
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \
-I$(VIDEO_ROOT)/include/uapi/vidc -I$(VIDEO_ROOT)/include/uapi/vidc
USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \
@@ -38,46 +32,23 @@ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \
obj-m += msm_video.o obj-m += msm_video.o
ifeq ($(CONFIG_MSM_VIDC_WAIPIO), y)
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/waipio/src/msm_vidc_waipio.o
endif
ifeq ($(CONFIG_MSM_VIDC_KALAMA), y)
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o
endif
ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y) ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y)
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/msm_vidc_pineapple.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o
endif endif
ifeq ($(CONFIG_MSM_VIDC_KALAMA), y)
ifeq ($(CONFIG_MSM_VIDC_ANORAK), y) msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/msm_vidc_kalama.o \
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/anorak/src/msm_vidc_anorak.o $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \
endif
ifeq ($(CONFIG_MSM_VIDC_IRIS2), y)
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris2/inc
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_buffer_iris2.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_power_iris2.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris2/src/msm_vidc_iris2.o
endif
ifeq ($(CONFIG_MSM_VIDC_IRIS3), y)
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \ $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o
endif endif
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \
ifeq ($(CONFIG_MSM_VIDC_IRIS33), y) $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o
endif
msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \
@@ -99,6 +70,4 @@ msm_video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o
$(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \
$(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o

41
video/Kbuild
View File

@@ -3,15 +3,19 @@
VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/video/driver VIDEO_DRIVER_ABS_PATH := $(VIDEO_ROOT)/video/driver
VIDEO_DRIVER_REL_PATH := ../video/driver VIDEO_DRIVER_REL_PATH := ../video/driver
ifeq ($(CONFIG_ARCH_KALAMA), y) ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
include $(VIDEO_ROOT)/config/kalama_video.conf include $(VIDEO_ROOT)/config/pineapple_video.conf
LINUXINCLUDE += -include $(VIDEO_ROOT)/config/kalama_video.h \ LINUXINCLUDE += -include $(VIDEO_ROOT)/config/pineapple_video.h
-I$(VIDEO_DRIVER_ABS_PATH)/platform/kalama/inc
endif endif
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \ ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y)
-I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \ LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/pineapple/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/variant/iris33/inc
endif
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/platform/common/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \ -I$(VIDEO_DRIVER_ABS_PATH)/variant/common/inc \
-I$(VIDEO_DRIVER_ABS_PATH)/vidc/inc \
-I$(VIDEO_ROOT)/include/uapi/vidc -I$(VIDEO_ROOT)/include/uapi/vidc
USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \
@@ -19,20 +23,15 @@ USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \
obj-m += video.o obj-m += video.o
ifeq ($(CONFIG_MSM_VIDC_KALAMA), y) ifeq ($(CONFIG_MSM_VIDC_PINEAPPLE), y)
video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/kalama/src/kalama.o video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/pineapple/src/pineapple.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_buffer_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_power_iris33.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris33/src/msm_vidc_iris33.o
endif endif
video-objs += $(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \
ifeq ($(CONFIG_MSM_VIDC_IRIS3), y) $(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o \
LINUXINCLUDE += -I$(VIDEO_DRIVER_ABS_PATH)/variant/iris3/inc $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
video-objs += $(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_buffer_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_power_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_bus_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_clock_iris3.o \
$(VIDEO_DRIVER_REL_PATH)/variant/iris3/src/msm_vidc_iris3.o
endif
video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_vb2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vdec.o \
@@ -51,6 +50,4 @@ video-objs += $(VIDEO_DRIVER_REL_PATH)/vidc/src/msm_vidc_v4l2.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_queue.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/hfi_packet.o \
$(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o \ $(VIDEO_DRIVER_REL_PATH)/vidc/src/venus_hfi_response.o
$(VIDEO_DRIVER_REL_PATH)/platform/common/src/msm_vidc_platform.o \
$(VIDEO_DRIVER_REL_PATH)/variant/common/src/msm_vidc_variant.o