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msm: camera: isp: Add epd Blob support

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This change adds blob support to disable CSID EOT IRQ
in case of high data rate sensors which sends
EPD instead of EOT.

CRs-Fixed: 2566158
Change-Id: I8ac6d2281a6510d3702f3b651e2c7ca2391afe6c
Signed-off-by: Prakasha Nayak <pnayak@codeaurora.org>
This commit is contained in:
Prakasha Nayak
2019-11-06 17:02:50 +05:30
committed by Karthik Jayakumar
parent 8d05aad1b0
commit 8dc1774e8b
5 changed files with 110 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

67
drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
View File

@@ -4997,6 +4997,51 @@ static int cam_isp_blob_vfe_out_update(
return rc; return rc;
} }
static int cam_isp_blob_csid_config_update(
uint32_t blob_type,
struct cam_isp_generic_blob_info *blob_info,
struct cam_isp_csid_epd_config *epd_config,
struct cam_hw_prepare_update_args *prepare)
{
struct cam_ife_hw_mgr_ctx *ctx = NULL;
struct cam_isp_hw_mgr_res *hw_mgr_res;
struct cam_hw_intf *hw_intf;
struct cam_ife_csid_epd_update_args epd_update_args;
int rc = -EINVAL;
uint32_t i = 0;
ctx = prepare->ctxt_to_hw_map;
list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid, list) {
for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
if (!hw_mgr_res->hw_res[i])
continue;
hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
if (hw_intf && hw_intf->hw_ops.process_cmd) {
epd_update_args.epd_supported =
epd_config->is_epd_supported;
rc = hw_intf->hw_ops.process_cmd(
hw_intf->hw_priv,
CAM_IFE_CSID_SET_CONFIG,
&epd_update_args,
sizeof(
struct cam_ife_csid_epd_update_args)
);
if (rc)
CAM_ERR(CAM_ISP,
"Failed to epd config:%d",
epd_config->is_epd_supported);
} else {
CAM_WARN(CAM_ISP, "NULL hw_intf!");
}
}
}
return rc;
}
static int cam_isp_packet_generic_blob_handler(void *user_data, static int cam_isp_packet_generic_blob_handler(void *user_data,
uint32_t blob_type, uint32_t blob_size, uint8_t *blob_data) uint32_t blob_type, uint32_t blob_size, uint8_t *blob_data)
{ {
@@ -5011,12 +5056,6 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
return -EINVAL; return -EINVAL;
} }
if (blob_type >= CAM_ISP_GENERIC_BLOB_TYPE_MAX) {
CAM_ERR(CAM_ISP, "Invalid Blob Type %d Max %d", blob_type,
CAM_ISP_GENERIC_BLOB_TYPE_MAX);
return -EINVAL;
}
prepare = blob_info->prepare; prepare = blob_info->prepare;
if (!prepare || !prepare->ctxt_to_hw_map) { if (!prepare || !prepare->ctxt_to_hw_map) {
CAM_ERR(CAM_ISP, "Failed. prepare is NULL, blob_type %d", CAM_ERR(CAM_ISP, "Failed. prepare is NULL, blob_type %d",
@@ -5466,7 +5505,23 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
CAM_ERR(CAM_ISP, "VFE out update failed rc: %d", rc); CAM_ERR(CAM_ISP, "VFE out update failed rc: %d", rc);
} }
break; break;
case CAM_ISP_GENERIC_BLOB_TYPE_CSID_CONFIG: {
struct cam_isp_csid_epd_config *epd_config;
if (blob_size < sizeof(struct cam_isp_csid_epd_config)) {
CAM_ERR(CAM_ISP,
"Invalid epd config blob size %u expected %u",
blob_size,
sizeof(struct cam_isp_csid_epd_config));
return -EINVAL;
}
epd_config = (struct cam_isp_csid_epd_config *)blob_data;
rc = cam_isp_blob_csid_config_update(blob_type, blob_info,
epd_config, prepare);
if (rc)
CAM_ERR(CAM_ISP, "CSID Config failed rc: %d", rc);
}
break;
default: default:
CAM_WARN(CAM_ISP, "Invalid blob type %d", blob_type); CAM_WARN(CAM_ISP, "Invalid blob type %d", blob_type);
break; break;

29
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
View File

@@ -520,6 +520,7 @@ static int cam_ife_csid_global_reset(struct cam_ife_csid_hw *csid_hw)
csid_hw->hw_intf->hw_idx, val); csid_hw->hw_intf->hw_idx, val);
csid_hw->error_irq_count = 0; csid_hw->error_irq_count = 0;
csid_hw->prev_boot_timestamp = 0; csid_hw->prev_boot_timestamp = 0;
csid_hw->epd_supported = 0;
end: end:
return rc; return rc;
@@ -1349,6 +1350,7 @@ static int cam_ife_csid_disable_hw(struct cam_ife_csid_hw *csid_hw)
csid_hw->hw_info->hw_state = CAM_HW_STATE_POWER_DOWN; csid_hw->hw_info->hw_state = CAM_HW_STATE_POWER_DOWN;
csid_hw->error_irq_count = 0; csid_hw->error_irq_count = 0;
csid_hw->prev_boot_timestamp = 0; csid_hw->prev_boot_timestamp = 0;
csid_hw->epd_supported = 0;
return rc; return rc;
} }
@@ -1584,7 +1586,6 @@ static int cam_ife_csid_enable_csi2(
CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW |
CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW |
CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW |
CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION |
CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION | CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION |
CSID_CSI2_RX_ERROR_CRC | CSID_CSI2_RX_ERROR_CRC |
CSID_CSI2_RX_ERROR_ECC | CSID_CSI2_RX_ERROR_ECC |
@@ -1593,6 +1594,12 @@ static int cam_ife_csid_enable_csi2(
CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME | CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME |
CSID_CSI2_RX_ERROR_CPHY_PH_CRC; CSID_CSI2_RX_ERROR_CPHY_PH_CRC;
if (csid_hw->epd_supported == 1)
CAM_INFO(CAM_ISP,
"Disable CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION for EPD");
else
val = val | CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION;
/* Enable the interrupt based on csid debug info set */ /* Enable the interrupt based on csid debug info set */
if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ) if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ)
val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED | val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED |
@@ -3788,6 +3795,23 @@ static int cam_ife_csid_set_csid_qcfa(
return 0; return 0;
} }
static int cam_ife_csid_set_epd_config(
struct cam_ife_csid_hw *csid_hw, void *cmd_args)
{
struct cam_ife_csid_epd_update_args *epd_update = NULL;
if ((!csid_hw) || (!cmd_args))
return -EINVAL;
epd_update =
(struct cam_ife_csid_epd_update_args *)cmd_args;
csid_hw->epd_supported = epd_update->epd_supported;
CAM_DBG(CAM_ISP, "CSID EPD supported %d", csid_hw->epd_supported);
return 0;
}
static int cam_ife_csid_process_cmd(void *hw_priv, static int cam_ife_csid_process_cmd(void *hw_priv,
uint32_t cmd_type, void *cmd_args, uint32_t arg_size) uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
{ {
@@ -3825,6 +3849,9 @@ static int cam_ife_csid_process_cmd(void *hw_priv,
case CAM_ISP_HW_CMD_CSID_QCFA_SUPPORTED: case CAM_ISP_HW_CMD_CSID_QCFA_SUPPORTED:
rc = cam_ife_csid_set_csid_qcfa(csid_hw, cmd_args); rc = cam_ife_csid_set_csid_qcfa(csid_hw, cmd_args);
break; break;
case CAM_IFE_CSID_SET_CONFIG:
rc = cam_ife_csid_set_epd_config(csid_hw, cmd_args);
break;
default: default:
CAM_ERR(CAM_ISP, "CSID:%d unsupported cmd:%d", CAM_ERR(CAM_ISP, "CSID:%d unsupported cmd:%d",
csid_hw->hw_intf->hw_idx, cmd_type); csid_hw->hw_intf->hw_idx, cmd_type);

3
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.h
View File

@@ -550,9 +550,9 @@ struct cam_ife_csid_path_cfg {
* need to stop the CSID and mask interrupts. * need to stop the CSID and mask interrupts.
* @binning_enable Flag is set if hardware supports QCFA binning * @binning_enable Flag is set if hardware supports QCFA binning
* @binning_supported Flag is set if sensor supports QCFA binning * @binning_supported Flag is set if sensor supports QCFA binning
*
* @first_sof_ts first bootime stamp at the start * @first_sof_ts first bootime stamp at the start
* @prev_qtimer_ts stores csid timestamp * @prev_qtimer_ts stores csid timestamp
* @epd_supported Flag is set if sensor supports EPD
*/ */
struct cam_ife_csid_hw { struct cam_ife_csid_hw {
struct cam_hw_intf *hw_intf; struct cam_hw_intf *hw_intf;
@@ -586,6 +586,7 @@ struct cam_ife_csid_hw {
uint32_t binning_supported; uint32_t binning_supported;
uint64_t prev_boot_timestamp; uint64_t prev_boot_timestamp;
uint64_t prev_qtimer_ts; uint64_t prev_qtimer_ts;
uint32_t epd_supported;
}; };
int cam_ife_csid_hw_probe_init(struct cam_hw_intf *csid_hw_intf, int cam_ife_csid_hw_probe_init(struct cam_hw_intf *csid_hw_intf,

9
drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_ife_csid_hw_intf.h
View File

@@ -204,6 +204,7 @@ enum cam_ife_csid_cmd_type {
CAM_IFE_CSID_CMD_GET_TIME_STAMP, CAM_IFE_CSID_CMD_GET_TIME_STAMP,
CAM_IFE_CSID_SET_CSID_DEBUG, CAM_IFE_CSID_SET_CSID_DEBUG,
CAM_IFE_CSID_SOF_IRQ_DEBUG, CAM_IFE_CSID_SOF_IRQ_DEBUG,
CAM_IFE_CSID_SET_CONFIG,
CAM_IFE_CSID_CMD_MAX, CAM_IFE_CSID_CMD_MAX,
}; };
@@ -236,5 +237,13 @@ struct cam_ife_csid_qcfa_update_args {
uint32_t qcfa_binning; uint32_t qcfa_binning;
}; };
/*
* struct cam_ife_csid_epd_update_args:
*
* @epd_supported: flag to check epd supported or not
*/
struct cam_ife_csid_epd_update_args {
uint32_t epd_supported;
};
#endif /* _CAM_CSID_HW_INTF_H_ */ #endif /* _CAM_CSID_HW_INTF_H_ */

10
include/uapi/camera/media/cam_isp.h
View File

@@ -102,6 +102,7 @@
#define CAM_ISP_GENERIC_BLOB_TYPE_IFE_CORE_CONFIG 7 #define CAM_ISP_GENERIC_BLOB_TYPE_IFE_CORE_CONFIG 7
#define CAM_ISP_GENERIC_BLOB_TYPE_VFE_OUT_CONFIG 8 #define CAM_ISP_GENERIC_BLOB_TYPE_VFE_OUT_CONFIG 8
#define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG_V2 9 #define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG_V2 9
#define CAM_ISP_GENERIC_BLOB_TYPE_CSID_CONFIG 10
#define CAM_ISP_GENERIC_BLOB_TYPE_CSID_QCFA_CONFIG 12 #define CAM_ISP_GENERIC_BLOB_TYPE_CSID_QCFA_CONFIG 12
#define CAM_ISP_VC_DT_CFG 4 #define CAM_ISP_VC_DT_CFG 4
@@ -699,6 +700,15 @@ struct cam_isp_vfe_out_config {
struct cam_isp_vfe_wm_config wm_config[1]; struct cam_isp_vfe_wm_config wm_config[1];
}; };
/**
* struct cam_isp_csid_epd_config - Support for EPD Packet config
*
* @is_epd_sensor : flag to check if epd supported
*/
struct cam_isp_csid_epd_config {
uint32_t is_epd_supported;
};
#define CAM_ISP_ACQUIRE_COMMON_VER0 0x1000 #define CAM_ISP_ACQUIRE_COMMON_VER0 0x1000
#define CAM_ISP_ACQUIRE_COMMON_SIZE_VER0 0x0 #define CAM_ISP_ACQUIRE_COMMON_SIZE_VER0 0x0