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@@ -550,7 +550,8 @@ static struct sde_prop_type sde_prop[] = {
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{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},
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{WB_LINEWIDTH_LINEAR, "qcom,sde-wb-linewidth-linear",
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false, PROP_TYPE_U32},
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- {BANK_BIT, "qcom,sde-highest-bank-bit", false, PROP_TYPE_U32},
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+ {BANK_BIT, "qcom,sde-highest-bank-bit", false,
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+ PROP_TYPE_BIT_OFFSET_ARRAY},
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{UBWC_VERSION, "qcom,sde-ubwc-version", false, PROP_TYPE_U32},
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{UBWC_STATIC, "qcom,sde-ubwc-static", false, PROP_TYPE_U32},
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{UBWC_SWIZZLE, "qcom,sde-ubwc-swizzle", false, PROP_TYPE_U32},
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@@ -1078,7 +1079,6 @@ static int _validate_dt_entry(struct device_node *np,
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sde_prop[i].prop_name,
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prop_count[i], *off_count);
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rc = 0;
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- prop_count[i] = 0;
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}
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if (prop_count[i] < 0) {
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prop_count[i] = 0;
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@@ -3675,6 +3675,7 @@ static void _sde_top_parse_dt_helper(struct sde_mdss_cfg *cfg,
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struct sde_dt_props *props)
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{
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int i;
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+ u32 ddr_type;
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cfg->max_sspp_linewidth = props->exists[SSPP_LINEWIDTH] ?
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PROP_VALUE_ACCESS(props->values, SSPP_LINEWIDTH, 0) :
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@@ -3709,13 +3710,18 @@ static void _sde_top_parse_dt_helper(struct sde_mdss_cfg *cfg,
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SDE_HW_UBWC_VER(PROP_VALUE_ACCESS(props->values,
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UBWC_VERSION, 0)) : DEFAULT_SDE_UBWC_NONE;
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- cfg->mdp[0].highest_bank_bit = props->exists[BANK_BIT] ?
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- PROP_VALUE_ACCESS(props->values, BANK_BIT, 0) :
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- DEFAULT_SDE_HIGHEST_BANK_BIT;
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+ cfg->mdp[0].highest_bank_bit = DEFAULT_SDE_HIGHEST_BANK_BIT;
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- if (cfg->ubwc_version == SDE_HW_UBWC_VER_40 &&
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- of_fdt_get_ddrtype() == LP_DDR4_TYPE)
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- cfg->mdp[0].highest_bank_bit = 0x02;
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+ if (props->exists[BANK_BIT]) {
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+ for (i = 0; i < props->counts[BANK_BIT]; i++) {
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+ ddr_type = PROP_BITVALUE_ACCESS(props->values,
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+ BANK_BIT, i, 0);
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+ if (!ddr_type || (of_fdt_get_ddrtype() == ddr_type))
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+ cfg->mdp[0].highest_bank_bit =
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+ PROP_BITVALUE_ACCESS(props->values,
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+ BANK_BIT, i, 1);
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+ }
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+ }
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cfg->macrotile_mode = props->exists[MACROTILE_MODE] ?
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PROP_VALUE_ACCESS(props->values, MACROTILE_MODE, 0) :
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