ASoC: AQT1000: Fix hardware sequence for AQT1000
Fix hardware sequence for AQT1000 as per hardware requirements to bring codec out of reset for playback and capture usecases on headset. Change-Id: I7419aec36aefc2887583308a60d1ea246d000469 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
@@ -13,6 +13,8 @@
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_device.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/ratelimit.h>
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#include <linux/ratelimit.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/core.h>
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@@ -21,6 +23,9 @@
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#include <linux/debugfs.h>
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#include <linux/debugfs.h>
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#include <linux/i2c.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/regmap.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include <sound/soc.h>
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#include "../msm-cdc-pinctrl.h"
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#include "../msm-cdc-pinctrl.h"
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#include "../msm-cdc-supply.h"
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#include "../msm-cdc-supply.h"
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@@ -93,8 +98,22 @@ static int aqt1000_bringup(struct aqt1000 *aqt)
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regmap_update_bits(aqt->regmap, AQT1000_CLK_SYS_MCLK2_I2S_HS_CLK_PRG,
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regmap_update_bits(aqt->regmap, AQT1000_CLK_SYS_MCLK2_I2S_HS_CLK_PRG,
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0x01, 0x01);
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0x01, 0x01);
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regmap_update_bits(aqt->regmap, AQT1000_CHIP_CFG0_CLK_CFG_MCLK,
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0x04, 0x00);
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/* Add 100usec delay as per HW requirement */
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usleep_range(100, 110);
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regmap_update_bits(aqt->regmap, AQT1000_CDC_CLK_RST_CTRL_MCLK_CONTROL,
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0x01, 0x01);
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regmap_update_bits(aqt->regmap, AQT1000_CDC_CLK_RST_CTRL_FS_CNT_CONTROL,
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0x01, 0x01);
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regmap_update_bits(aqt->regmap, AQT1000_CHIP_CFG0_CLK_CTL_CDC_DIG,
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0x01, 0x01);
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/* Codec digital reset */
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/* Codec digital reset */
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regmap_update_bits(aqt->regmap, AQT1000_CHIP_CFG0_RST_CTL, 0x01, 0x01);
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regmap_update_bits(aqt->regmap, AQT1000_CHIP_CFG0_RST_CTL, 0x01, 0x01);
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/* Add 100usec delay as per HW requirement */
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usleep_range(100, 110);
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return 0;
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return 0;
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}
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}
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@@ -378,6 +397,13 @@ static struct aqt1000_pdata *aqt1000_populate_dt_data(struct device *dev)
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goto err_parse_dt_prop;
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goto err_parse_dt_prop;
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}
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}
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pdata->irq_gpio = of_get_named_gpio(dev->of_node,
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"qcom,gpio-connect", 0);
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if (!gpio_is_valid(pdata->irq_gpio)) {
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dev_err(dev, "%s: TLMM connect gpio not found\n", __func__);
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goto err_parse_dt_prop;
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}
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return pdata;
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return pdata;
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err_parse_dt_prop:
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err_parse_dt_prop:
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@@ -457,6 +483,7 @@ static int aqt1000_i2c_probe(struct i2c_client *client,
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aqt1000->dev = &client->dev;
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aqt1000->dev = &client->dev;
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aqt1000->dev_up = true;
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aqt1000->dev_up = true;
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aqt1000->mclk_rate = pdata->mclk_rate;
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aqt1000->mclk_rate = pdata->mclk_rate;
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aqt1000->irq = client->irq;
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aqt1000->num_of_supplies = pdata->num_supplies;
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aqt1000->num_of_supplies = pdata->num_supplies;
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ret = msm_cdc_init_supplies(aqt1000->dev, &aqt1000->supplies,
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ret = msm_cdc_init_supplies(aqt1000->dev, &aqt1000->supplies,
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@@ -496,6 +523,9 @@ static int aqt1000_i2c_probe(struct i2c_client *client,
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goto err_supplies;
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goto err_supplies;
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}
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}
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pm_runtime_set_active(aqt1000->dev);
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pm_runtime_enable(aqt1000->dev);
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ret = aqt_register_codec(&client->dev);
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ret = aqt_register_codec(&client->dev);
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if (ret) {
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if (ret) {
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dev_err(aqt1000->dev, "%s: Codec registration failed\n",
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dev_err(aqt1000->dev, "%s: Codec registration failed\n",
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@@ -506,6 +536,7 @@ static int aqt1000_i2c_probe(struct i2c_client *client,
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return ret;
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return ret;
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err_cdc_register:
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err_cdc_register:
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pm_runtime_disable(aqt1000->dev);
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aqt1000_device_exit(aqt1000);
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aqt1000_device_exit(aqt1000);
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err_supplies:
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err_supplies:
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msm_cdc_release_supplies(aqt1000->dev, aqt1000->supplies,
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msm_cdc_release_supplies(aqt1000->dev, aqt1000->supplies,
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@@ -527,6 +558,7 @@ static int aqt1000_i2c_remove(struct i2c_client *client)
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aqt = dev_get_drvdata(&client->dev);
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aqt = dev_get_drvdata(&client->dev);
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pm_runtime_disable(aqt->dev);
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msm_cdc_release_supplies(aqt->dev, aqt->supplies,
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msm_cdc_release_supplies(aqt->dev, aqt->supplies,
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pdata->regulator,
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pdata->regulator,
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pdata->num_supplies);
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pdata->num_supplies);
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@@ -535,6 +567,22 @@ static int aqt1000_i2c_remove(struct i2c_client *client)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_PM
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static int aqt1000_runtime_resume(struct device *dev)
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{
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dev_dbg(dev, "%s system resume\n", __func__);
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return 0;
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}
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static int aqt1000_runtime_suspend(struct device *dev)
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{
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dev_dbg(dev, "%s system suspend\n", __func__);
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return 0;
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}
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#endif
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM_SLEEP
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static int aqt1000_i2c_resume(struct device *dev)
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static int aqt1000_i2c_resume(struct device *dev)
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{
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{
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@@ -556,8 +604,10 @@ static struct i2c_device_id aqt1000_id_table[] = {
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MODULE_DEVICE_TABLE(i2c, aqt1000_id_table);
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MODULE_DEVICE_TABLE(i2c, aqt1000_id_table);
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static const struct dev_pm_ops aqt1000_i2c_pm_ops = {
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static const struct dev_pm_ops aqt1000_i2c_pm_ops = {
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.suspend = aqt1000_i2c_suspend,
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SET_RUNTIME_PM_OPS(aqt1000_runtime_suspend,
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.resume = aqt1000_i2c_resume,
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aqt1000_runtime_resume, NULL)
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SET_SYSTEM_SLEEP_PM_OPS(aqt1000_i2c_suspend,
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aqt1000_i2c_resume)
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};
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};
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static const struct of_device_id aqt_match_table[] = {
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static const struct of_device_id aqt_match_table[] = {
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@@ -77,7 +77,8 @@ int aqt_request_irq(struct aqt1000 *aqt, int irq, const char *name,
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if (irq < 0)
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if (irq < 0)
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return irq;
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return irq;
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return request_threaded_irq(irq, NULL, handler, IRQF_ONESHOT,
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return request_threaded_irq(irq, NULL, handler,
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IRQF_ONESHOT | IRQF_TRIGGER_RISING,
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name, data);
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name, data);
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}
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}
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EXPORT_SYMBOL(aqt_request_irq);
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EXPORT_SYMBOL(aqt_request_irq);
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@@ -160,6 +161,8 @@ static struct irq_chip aqt_irq_chip = {
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.irq_enable = aqt_irq_enable,
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.irq_enable = aqt_irq_enable,
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};
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};
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static struct lock_class_key aqt_irq_lock_class;
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static int aqt_irq_map(struct irq_domain *irqd, unsigned int virq,
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static int aqt_irq_map(struct irq_domain *irqd, unsigned int virq,
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irq_hw_number_t hw)
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irq_hw_number_t hw)
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{
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{
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@@ -167,6 +170,7 @@ static int aqt_irq_map(struct irq_domain *irqd, unsigned int virq,
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irq_set_chip_data(virq, data);
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irq_set_chip_data(virq, data);
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irq_set_chip_and_handler(virq, &aqt_irq_chip, handle_simple_irq);
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irq_set_chip_and_handler(virq, &aqt_irq_chip, handle_simple_irq);
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irq_set_lockdep_class(virq, &aqt_irq_lock_class);
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irq_set_nested_thread(virq, 1);
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irq_set_nested_thread(virq, 1);
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irq_set_noprobe(virq);
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irq_set_noprobe(virq);
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@@ -196,12 +200,6 @@ int aqt_irq_init(struct aqt1000 *aqt)
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (!aqt->irq) {
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dev_dbg(aqt->dev, "%s: No interrupt specified\n", __func__);
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aqt->irq_base = 0;
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return 0;
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}
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pdata = dev_get_platdata(aqt->dev);
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pdata = dev_get_platdata(aqt->dev);
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if (!pdata) {
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if (!pdata) {
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dev_err(aqt->dev, "%s: Invalid platform data\n", __func__);
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dev_err(aqt->dev, "%s: Invalid platform data\n", __func__);
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@@ -214,13 +212,7 @@ int aqt_irq_init(struct aqt1000 *aqt)
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flags = pdata->irq_flags;
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flags = pdata->irq_flags;
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if (pdata->irq_gpio) {
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if (pdata->irq_gpio) {
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if (gpio_to_irq(pdata->irq_gpio) != aqt->irq) {
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aqt->irq = gpio_to_irq(pdata->irq_gpio);
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dev_warn(aqt->dev, "%s: IRQ %d is not GPIO %d (%d)\n",
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__func__, aqt->irq, pdata->irq_gpio,
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gpio_to_irq(pdata->irq_gpio));
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aqt->irq = gpio_to_irq(pdata->irq_gpio);
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}
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ret = devm_gpio_request_one(aqt->dev, pdata->irq_gpio,
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ret = devm_gpio_request_one(aqt->dev, pdata->irq_gpio,
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GPIOF_IN, "AQT IRQ");
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GPIOF_IN, "AQT IRQ");
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if (ret) {
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if (ret) {
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@@ -229,10 +221,6 @@ int aqt_irq_init(struct aqt1000 *aqt)
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pdata->irq_gpio = 0;
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pdata->irq_gpio = 0;
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return ret;
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return ret;
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}
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}
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} else {
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dev_dbg(aqt->dev, "%s: irq_gpio is %d\n",
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__func__, pdata->irq_gpio);
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return 0;
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}
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}
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irq_data = irq_get_irq_data(aqt->irq);
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irq_data = irq_get_irq_data(aqt->irq);
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@@ -242,6 +230,7 @@ int aqt_irq_init(struct aqt1000 *aqt)
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return -EINVAL;
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return -EINVAL;
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}
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}
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aqt->num_irq_regs = aqt_regmap_irq_chip.num_regs;
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for (i = 0; i < aqt->num_irq_regs; i++) {
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for (i = 0; i < aqt->num_irq_regs; i++) {
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regmap_write(aqt->regmap,
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regmap_write(aqt->regmap,
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(AQT1000_INTR_CTRL_INT_TYPE_2 + i), 0);
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(AQT1000_INTR_CTRL_INT_TYPE_2 + i), 0);
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@@ -85,30 +85,30 @@ const struct snd_soc_dapm_route aqt_audio_map[] = {
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{"AQT ANC0 FB MUX", "ANC_IN_HPHL", "AQT RX INT1 MIX2"},
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{"AQT ANC0 FB MUX", "ANC_IN_HPHL", "AQT RX INT1 MIX2"},
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{"AQT ANC1 FB MUX", "ANC_IN_HPHR", "AQT RX INT2 MIX2"},
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{"AQT ANC1 FB MUX", "ANC_IN_HPHR", "AQT RX INT2 MIX2"},
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{"AQT I2S_L RX", "AIF1_PB", "AQT AIF1 PB"},
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{"AQT I2S_L RX", NULL, "AQT AIF1 PB"},
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{"AQT I2S_R RX", "AIF1_PB", "AQT AIF1 PB"},
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{"AQT I2S_R RX", NULL, "AQT AIF1 PB"},
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{"AQT RX INT1_1 MUX", "I2S_L", "AQT I2S_L RX"},
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{"AQT RX INT1_1 MUX", "I2S0_L", "AQT I2S_L RX"},
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{"AQT RX INT1_1 MUX", "I2S_R", "AQT I2S_R RX"},
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{"AQT RX INT1_1 MUX", "I2S0_R", "AQT I2S_R RX"},
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{"AQT RX INT1_1 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT1_1 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT1_1 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT1_1 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT1_1 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT1_1 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT2_1 MUX", "I2S_L", "AQT I2S_L RX"},
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{"AQT RX INT2_1 MUX", "I2S0_L", "AQT I2S_L RX"},
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{"AQT RX INT2_1 MUX", "I2S_R", "AQT I2S_R RX"},
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{"AQT RX INT2_1 MUX", "I2S0_R", "AQT I2S_R RX"},
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{"AQT RX INT2_1 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT2_1 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT2_1 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT2_1 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT2_1 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT2_1 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT1_2 MUX", "I2S_L", "AQT I2S_L RX"},
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{"AQT RX INT1_2 MUX", "I2S0_L", "AQT I2S_L RX"},
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{"AQT RX INT1_2 MUX", "I2S_R", "AQT I2S_R RX"},
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{"AQT RX INT1_2 MUX", "I2S0_R", "AQT I2S_R RX"},
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{"AQT RX INT1_2 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT1_2 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT1_2 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT1_2 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT1_2 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT1_2 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT1_2 MUX", "IIR0", "AQT IIR0"},
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{"AQT RX INT1_2 MUX", "IIR0", "AQT IIR0"},
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{"AQT RX INT2_2 MUX", "I2S_L", "AQT I2S_L RX"},
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{"AQT RX INT2_2 MUX", "I2S0_L", "AQT I2S_L RX"},
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{"AQT RX INT2_2 MUX", "I2S_R", "AQT I2S_R RX"},
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{"AQT RX INT2_2 MUX", "I2S0_R", "AQT I2S_R RX"},
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{"AQT RX INT2_2 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT2_2 MUX", "DEC_L", "AQT ADC0 MUX"},
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{"AQT RX INT2_2 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT2_2 MUX", "DEC_R", "AQT ADC1 MUX"},
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{"AQT RX INT2_2 MUX", "DEC_V", "AQT ADC2 MUX"},
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{"AQT RX INT2_2 MUX", "DEC_V", "AQT ADC2 MUX"},
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@@ -137,6 +137,8 @@ const struct snd_soc_dapm_route aqt_audio_map[] = {
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{"AQT RX INT1 DEM MUX", "CLSH_DSM_OUT", "AQT RX INT1 MIX2"},
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{"AQT RX INT1 DEM MUX", "CLSH_DSM_OUT", "AQT RX INT1 MIX2"},
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{"AQT RX INT1 DAC", NULL, "AQT RX INT1 DEM MUX"},
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{"AQT RX INT1 DAC", NULL, "AQT RX INT1 DEM MUX"},
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{"AQT RX INT1 DAC", NULL, "AQT RX_BIAS"},
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{"AQT RX INT1 DAC", NULL, "AQT RX_BIAS"},
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{"AQT RX_BIAS", NULL, "AQT MCLK"},
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{"AQT MIC BIAS1", NULL, "AQT MCLK"},
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{"AQT HPHL PA", NULL, "AQT RX INT1 DAC"},
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{"AQT HPHL PA", NULL, "AQT RX INT1 DAC"},
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{"AQT HPHL", NULL, "AQT HPHL PA"},
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{"AQT HPHL", NULL, "AQT HPHL PA"},
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@@ -152,10 +154,12 @@ const struct snd_soc_dapm_route aqt_audio_map[] = {
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{"AQT ANC HPHR PA", NULL, "AQT RX INT2 DAC"},
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{"AQT ANC HPHR PA", NULL, "AQT RX INT2 DAC"},
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{"AQT ANC HPHR", NULL, "AQT ANC HPHR PA"},
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{"AQT ANC HPHR", NULL, "AQT ANC HPHR PA"},
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{"AQT IIR0", NULL, "AQT TX_PATH2"},
|
{"AQT IIR0", NULL, "AQT ADC2 MUX"},
|
||||||
{"AQT SRC0", NULL, "AQT IIR0"},
|
{"AQT SRC0", NULL, "AQT IIR0"},
|
||||||
{"AQT RX INT1 MIX2", "SRC0", "AQT SRC0"},
|
{"AQT RX ST MUX", "SRC0", "AQT SRC0"},
|
||||||
{"AQT RX INT2 MIX2", "SRC0", "AQT SRC0"},
|
|
||||||
|
{"AQT RX INT1 MIX2", NULL, "AQT RX ST MUX"},
|
||||||
|
{"AQT RX INT2 MIX2", NULL, "AQT RX ST MUX"},
|
||||||
|
|
||||||
/* Native clk main path routing */
|
/* Native clk main path routing */
|
||||||
{"AQT RX INT1_1 NATIVE MUX", "ON", "AQT RX INT1_1 MUX"},
|
{"AQT RX INT1_1 NATIVE MUX", "ON", "AQT RX INT1_1 MUX"},
|
||||||
|
@@ -2542,6 +2542,26 @@ static const char * const native_mux_text[] = {
|
|||||||
AQT_DAPM_ENUM(int1_1_native, SND_SOC_NOPM, 0, native_mux_text);
|
AQT_DAPM_ENUM(int1_1_native, SND_SOC_NOPM, 0, native_mux_text);
|
||||||
AQT_DAPM_ENUM(int2_1_native, SND_SOC_NOPM, 0, native_mux_text);
|
AQT_DAPM_ENUM(int2_1_native, SND_SOC_NOPM, 0, native_mux_text);
|
||||||
|
|
||||||
|
static int aqt_mclk_event(struct snd_soc_dapm_widget *w,
|
||||||
|
struct snd_kcontrol *kcontrol, int event)
|
||||||
|
{
|
||||||
|
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
dev_dbg(codec->dev, "%s: event = %d\n", __func__, event);
|
||||||
|
|
||||||
|
switch (event) {
|
||||||
|
case SND_SOC_DAPM_PRE_PMU:
|
||||||
|
ret = aqt_cdc_mclk_enable(codec, true);
|
||||||
|
break;
|
||||||
|
case SND_SOC_DAPM_POST_PMD:
|
||||||
|
ret = aqt_cdc_mclk_enable(codec, false);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
static int aif_cap_mixer_get(struct snd_kcontrol *kcontrol,
|
static int aif_cap_mixer_get(struct snd_kcontrol *kcontrol,
|
||||||
struct snd_ctl_elem_value *ucontrol)
|
struct snd_ctl_elem_value *ucontrol)
|
||||||
{
|
{
|
||||||
@@ -2561,8 +2581,17 @@ static const struct snd_kcontrol_new aif1_cap_mixer[] = {
|
|||||||
aif_cap_mixer_get, aif_cap_mixer_put),
|
aif_cap_mixer_get, aif_cap_mixer_put),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const char * const rx_inp_st_mux_text[] = {
|
||||||
|
"ZERO", "SRC0",
|
||||||
|
};
|
||||||
|
AQT_DAPM_ENUM(rx_inp_st, AQT1000_CDC_RX_INP_MUX_SIDETONE_SRC_CFG0, 4,
|
||||||
|
rx_inp_st_mux_text);
|
||||||
|
|
||||||
static const struct snd_soc_dapm_widget aqt_dapm_widgets[] = {
|
static const struct snd_soc_dapm_widget aqt_dapm_widgets[] = {
|
||||||
|
|
||||||
|
SND_SOC_DAPM_SUPPLY("AQT MCLK", SND_SOC_NOPM, 0, 0, aqt_mclk_event,
|
||||||
|
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
|
||||||
|
|
||||||
SND_SOC_DAPM_AIF_OUT_E("AQT AIF1 CAP", "AQT AIF1 Capture", 0,
|
SND_SOC_DAPM_AIF_OUT_E("AQT AIF1 CAP", "AQT AIF1 Capture", 0,
|
||||||
SND_SOC_NOPM, AIF1_CAP, 0, aqt_codec_enable_i2s_tx,
|
SND_SOC_NOPM, AIF1_CAP, 0, aqt_codec_enable_i2s_tx,
|
||||||
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
|
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
|
||||||
@@ -2720,6 +2749,10 @@ static const struct snd_soc_dapm_widget aqt_dapm_widgets[] = {
|
|||||||
|
|
||||||
AQT_DAPM_MUX("AQT RX INT1_1 NATIVE MUX", 0, int1_1_native),
|
AQT_DAPM_MUX("AQT RX INT1_1 NATIVE MUX", 0, int1_1_native),
|
||||||
AQT_DAPM_MUX("AQT RX INT2_1 NATIVE MUX", 0, int2_1_native),
|
AQT_DAPM_MUX("AQT RX INT2_1 NATIVE MUX", 0, int2_1_native),
|
||||||
|
|
||||||
|
SND_SOC_DAPM_MUX("AQT RX ST MUX",
|
||||||
|
AQT1000_CDC_RX_INP_MUX_SIDETONE_SRC_CFG0, 2, 0,
|
||||||
|
&rx_inp_st_mux),
|
||||||
};
|
};
|
||||||
|
|
||||||
static int aqt_startup(struct snd_pcm_substream *substream,
|
static int aqt_startup(struct snd_pcm_substream *substream,
|
||||||
@@ -3230,14 +3263,10 @@ int aqt_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
|
|||||||
EXPORT_SYMBOL(aqt_codec_info_create_codec_entry);
|
EXPORT_SYMBOL(aqt_codec_info_create_codec_entry);
|
||||||
|
|
||||||
static const struct aqt_reg_mask_val aqt_codec_reg_init[] = {
|
static const struct aqt_reg_mask_val aqt_codec_reg_init[] = {
|
||||||
{AQT1000_CHIP_CFG0_CLK_CFG_MCLK, 0x04, 0x00},
|
|
||||||
{AQT1000_CHIP_CFG0_EFUSE_CTL, 0x01, 0x01},
|
{AQT1000_CHIP_CFG0_EFUSE_CTL, 0x01, 0x01},
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct aqt_reg_mask_val aqt_codec_reg_update[] = {
|
static const struct aqt_reg_mask_val aqt_codec_reg_update[] = {
|
||||||
{AQT1000_CDC_CLK_RST_CTRL_MCLK_CONTROL, 0x01, 0x01},
|
|
||||||
{AQT1000_CDC_CLK_RST_CTRL_FS_CNT_CONTROL, 0x01, 0x01},
|
|
||||||
{AQT1000_CHIP_CFG0_CLK_CTL_CDC_DIG, 0x01, 0x01},
|
|
||||||
{AQT1000_LDOH_MODE, 0x1F, 0x0B},
|
{AQT1000_LDOH_MODE, 0x1F, 0x0B},
|
||||||
{AQT1000_MICB1_TEST_CTL_2, 0x07, 0x01},
|
{AQT1000_MICB1_TEST_CTL_2, 0x07, 0x01},
|
||||||
{AQT1000_MICB1_MISC_MICB1_INM_RES_BIAS, 0x03, 0x02},
|
{AQT1000_MICB1_MISC_MICB1_INM_RES_BIAS, 0x03, 0x02},
|
||||||
|
Reference in New Issue
Block a user