samsung-sm8650/android_kernel_samsung_sm8650-modules
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msm: ipa3: Add support for hamilton chip for pinnacles

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Addded change to enable support for hamilton chipset as part of
pinnacles.

Change-Id: Ie8f58c1b385780e778b80f7581c81e2f1a7b6b44
Signed-off-by: Raghavendar rao l <quic_rlomte@quicinc.com>
This commit is contained in:
Raghavendar rao l
2022-04-13 17:25:00 +05:30
rodzic ffa07e273f
commit 8a624916bf
9 zmienionych plików z 167 dodań i 57 usunięć
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53
drivers/platform/msm/gsi/gsi.c
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@@ -1865,8 +1865,8 @@ static void gsi_program_evt_ring_ctx(struct gsi_evt_ring_props *props,
struct gsihal_reg_ev_ch_k_cntxt_3 ev_ch_k_cntxt_3;
struct gsihal_reg_ev_ch_k_cntxt_8 ev_ch_k_cntxt_8;
struct gsihal_reg_ev_ch_k_cntxt_9 ev_ch_k_cntxt_9;
struct gsihal_reg_ev_ch_k_cntxt_10 ev_ch_k_cntxt_10;
struct gsihal_reg_ev_ch_k_cntxt_11 ev_ch_k_cntxt_11;
union gsihal_reg_ev_ch_k_cntxt_10 ev_ch_k_cntxt_10;
union gsihal_reg_ev_ch_k_cntxt_11 ev_ch_k_cntxt_11;
struct gsihal_reg_ev_ch_k_cntxt_12 ev_ch_k_cntxt_12;
struct gsihal_reg_ev_ch_k_cntxt_13 ev_ch_k_cntxt_13;
@@ -1904,25 +1904,41 @@ static void gsi_program_evt_ring_ctx(struct gsi_evt_ring_props *props,
ee, evt_id,
&ev_ch_k_cntxt_9);
ev_ch_k_cntxt_10.msi_addr_lsb = GSI_LSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
if(props->intf != GSI_EVT_CHTYPE_WDI3_V2_EV) {
ev_ch_k_cntxt_10.msi_addr_lsb = GSI_LSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
ev_ch_k_cntxt_11.msi_addr_msb = GSI_MSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
ev_ch_k_cntxt_11.msi_addr_msb = GSI_MSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
ev_ch_k_cntxt_12.rp_update_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_12,
ee, evt_id,
&ev_ch_k_cntxt_12);
ev_ch_k_cntxt_13.rp_update_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_13,
ee, evt_id,
&ev_ch_k_cntxt_13);
}
else {
ev_ch_k_cntxt_10.rp_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
ev_ch_k_cntxt_11.rp_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
}
ev_ch_k_cntxt_12.rp_update_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_12,
ee, evt_id,
&ev_ch_k_cntxt_12);
ev_ch_k_cntxt_13.rp_update_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_13,
ee, evt_id,
&ev_ch_k_cntxt_13);
}
static void gsi_init_evt_ring(struct gsi_evt_ring_props *props,
@@ -2721,6 +2737,7 @@ static void gsi_program_chan_ctx(struct gsi_chan_props *props, unsigned int ee,
case GSI_CHAN_PROT_WDI3:
case GSI_CHAN_PROT_GCI:
case GSI_CHAN_PROT_MHIP:
case GSI_CHAN_PROT_WDI3_V2:
ch_k_cntxt_0.chtype_protocol_msb = 0;
break;
case GSI_CHAN_PROT_AQC: