video: driver: Enable SSR type target specific

- Allow SSR type according to the target with
defining SSR type in platform file.

Change-Id: Idca62ce34b66a885da388d798eddb0c6c00871e5
Signed-off-by: Megha Byahatti <quic_mbyahatt@quicinc.com>

driver/platform/cliffs/src/msm_vidc_cliffs.c

@@ -5073,6 +5073,11 @@ static const u32 cliffs_vdec_output_properties_av1[] = {
 	HFI_PROP_FENCE,
 };
 
+static const u32 cliffs_msm_vidc_ssr_type[] = {
+	HFI_SSR_TYPE_SW_ERR_FATAL,
+	HFI_SSR_TYPE_CPU_WDOG_IRQ,
+};
+
 static struct msm_vidc_efuse_data efuse_data_cliffs[] = {
 	/* IRIS_DISABLE_AV1, SKU VERSION: 1 */
 	EFUSE_ENTRY(0x221C8118, 4, 0x2000, 0xD, SKU_VERSION),
@@ -5146,6 +5151,9 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = {
 	.dec_output_prop_size_vp9 = ARRAY_SIZE(cliffs_vdec_output_properties_vp9),
 	.dec_output_prop_size_av1 = ARRAY_SIZE(cliffs_vdec_output_properties_av1),
 
+	.msm_vidc_ssr_type = cliffs_msm_vidc_ssr_type,
+	.msm_vidc_ssr_type_size = ARRAY_SIZE(cliffs_msm_vidc_ssr_type),
+
 	/* Fuse specific resources */
 	.efuse_data = efuse_data_cliffs,
 	.efuse_data_size = ARRAY_SIZE(efuse_data_cliffs),

driver/platform/common/inc/msm_vidc_platform.h

@@ -266,6 +266,9 @@ struct msm_vidc_platform_data {
 	unsigned int dec_output_prop_size_vp9;
 	const u32 *dec_output_prop_av1;
 	unsigned int dec_output_prop_size_av1;
+	const u32  *msm_vidc_ssr_type;
+	unsigned int msm_vidc_ssr_type_size;
+
 };
 
 struct msm_vidc_platform {

driver/platform/pineapple/src/msm_vidc_pineapple.c

@@ -2879,6 +2879,10 @@ static const u32 pineapple_vdec_output_properties_av1[] = {
 	HFI_PROP_FENCE,
 };
 
+static const u32 pineapple_msm_vidc_ssr_type[] = {
+	HFI_SSR_TYPE_SW_ERR_FATAL,
+};
+
 static const struct msm_vidc_platform_data pineapple_data = {
 	/* resources dependent on other module */
 	.bw_tbl = pineapple_bw_table,
@@ -2946,6 +2950,10 @@ static const struct msm_vidc_platform_data pineapple_data = {
 	.dec_output_prop_size_hevc = ARRAY_SIZE(pineapple_vdec_output_properties_hevc),
 	.dec_output_prop_size_vp9 = ARRAY_SIZE(pineapple_vdec_output_properties_vp9),
 	.dec_output_prop_size_av1 = ARRAY_SIZE(pineapple_vdec_output_properties_av1),
+
+	.msm_vidc_ssr_type = pineapple_msm_vidc_ssr_type,
+	.msm_vidc_ssr_type_size = ARRAY_SIZE(pineapple_msm_vidc_ssr_type),
+
 };
 
 int msm_vidc_pineapple_check_ddr_type(void)

driver/vidc/inc/msm_vidc_internal.h

@@ -644,6 +644,7 @@ enum msm_vidc_core_capability_type {
 	DEVICE_CAPS,
 	SUPPORTS_REQUESTS,
 	SUPPORTS_SYNX_FENCE,
+	SSR_TYPE,
 	CORE_CAP_MAX,
 };
 

driver/vidc/inc/venus_hfi.h

@@ -65,6 +65,7 @@ int venus_hfi_core_init(struct msm_vidc_core *core);
 int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force);
 int venus_hfi_noc_error_info(struct msm_vidc_core *core);
 int venus_hfi_suspend(struct msm_vidc_core *core);
+bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type);
 int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type,
 			  u32 client_id, u32 addr);
 int venus_hfi_trigger_stability(struct msm_vidc_inst *inst, u32 type,

driver/vidc/src/venus_hfi.c

@@ -922,15 +922,27 @@ int venus_hfi_suspend(struct msm_vidc_core *core)
 	return rc;
 }
 
+bool is_ssr_type_allowed(struct msm_vidc_core *core, u32 type)
+{
+	u32 i;
+	const u32 *ssr_type = core->platform->data.msm_vidc_ssr_type;
+	u32 ssr_type_size = core->platform->data.msm_vidc_ssr_type_size;
+
+	for (i = 0; i < ssr_type_size; i++) {
+		if (type == ssr_type[i])
+			return true;
+	}
+	return false;
+}
+
 int venus_hfi_trigger_ssr(struct msm_vidc_core *core, u32 type,
 	u32 client_id, u32 addr)
 {
 	int rc = 0;
 	u32 payload[2];
 
-	// WA for CR: 3584248
-	if (type != HFI_SSR_TYPE_SW_ERR_FATAL) {
-		d_vpr_h("SSR Type 0x1 is only allowed for pineapple\n");
+	if (!is_ssr_type_allowed(core, type)) {
+		d_vpr_h("SSR Type %d is not allowed\n", type);
 		return rc;
 	}