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@@ -33,7 +33,7 @@
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* When disabling INIT property, we don't want to reset those bits since
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* they are needed for both LTM histogram and VLUT.
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*/
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-#define REG_DMA_LTM_INIT_ENABLE_OP_MASK 0xFFFF8CAB
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+#define REG_DMA_LTM_INIT_ENABLE_OP_MASK 0x1100153
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#define REG_DMA_LTM_INIT_DISABLE_OP_MASK 0xFFFF8CAF
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#define REG_DMA_LTM_ROI_OP_MASK 0xFEFFFFFF
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/**
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@@ -4202,22 +4202,16 @@ void reg_dmav1_setup_ltm_initv1(struct sde_hw_dspp *ctx, void *cfg)
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}
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if (init_param->init_param_01) {
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- if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
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- opmode |= BIT(6);
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ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_dither;
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opmode |= ((init_param->init_param_02 & 0x7) << 12);
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} else {
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- opmode &= ~BIT(6);
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ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_dither;
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}
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if (init_param->init_param_03) {
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- if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
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- opmode |= BIT(4);
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ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_unsharp;
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opmode |= ((init_param->init_param_04 & 0x3) << 8);
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} else {
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- opmode &= ~BIT(4);
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ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_unsharp;
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}
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@@ -4396,8 +4390,6 @@ void reg_dmav1_setup_ltm_roiv1(struct sde_hw_dspp *ctx, void *cfg)
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return;
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}
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- if (ltm_vlut_ops_mask[dspp_idx[i]] & ltm_vlut)
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- opmode |= BIT(24);
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ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_roi;
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REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode),
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