disp: msm: sde: add support for mdss spr hw block

This change parses SPR hw block entries from device tree and populate
SPR block as sub block of DSPP block. Change also enables register dump
by registering sub blocks with sde driver register dump routine.

Change-Id: Ic603cd3cc001dddce5dfea61341c166a5fec1682
Signed-off-by: Prabhanjan Kandula <[email protected]>

msm/sde/sde_hw_catalog.c

@@ -397,6 +397,13 @@ enum {
 	RC_PROP_MAX,
 };
 
+enum {
+	SPR_OFF,
+	SPR_LEN,
+	SPR_VERSION,
+	SPR_PROP_MAX,
+};
+
 enum {
 	MIXER_OFF,
 	MIXER_LEN,
@@ -717,6 +724,12 @@ static struct sde_prop_type rc_prop[] = {
 	{RC_MEM_TOTAL_SIZE, "qcom,sde-dspp-rc-mem-size", false, PROP_TYPE_U32},
 };
 
+static struct sde_prop_type spr_prop[] = {
+	{SPR_OFF, "qcom,sde-dspp-spr-off", false, PROP_TYPE_U32_ARRAY},
+	{SPR_LEN, "qcom,sde-dspp-spr-size", false, PROP_TYPE_U32},
+	{SPR_VERSION, "qcom,sde-dspp-spr-version", false, PROP_TYPE_U32},
+};
+
 static struct sde_prop_type ds_top_prop[] = {
 	{DS_TOP_OFF, "qcom,sde-dest-scaler-top-off", false, PROP_TYPE_U32},
 	{DS_TOP_LEN, "qcom,sde-dest-scaler-top-size", false, PROP_TYPE_U32},
@@ -2489,6 +2502,46 @@ end:
 	return rc;
 }
 
+static int _sde_dspp_spr_parse_dt(struct device_node *np,
+		struct sde_mdss_cfg *sde_cfg)
+{
+	int off_count, i;
+	struct sde_dt_props *props;
+	struct sde_dspp_cfg *dspp;
+	struct sde_dspp_sub_blks *sblk;
+
+	props = sde_get_dt_props(np, SPR_PROP_MAX, spr_prop,
+			ARRAY_SIZE(spr_prop), &off_count);
+	if (IS_ERR(props))
+		return PTR_ERR(props);
+
+	sde_cfg->spr_count = off_count;
+	if (off_count > sde_cfg->dspp_count) {
+		SDE_ERROR("limiting %d spr blocks to %d DSPP instances\n",
+				off_count, sde_cfg->dspp_count);
+		sde_cfg->spr_count = sde_cfg->dspp_count;
+	}
+
+	for (i = 0; i < sde_cfg->dspp_count; i++) {
+		dspp = &sde_cfg->dspp[i];
+		sblk = sde_cfg->dspp[i].sblk;
+
+		sblk->spr.id = SDE_DSPP_SPR;
+		if (props->exists[SPR_OFF] && i < off_count) {
+			sblk->spr.base = PROP_VALUE_ACCESS(props->values,
+					SPR_OFF, i);
+			sblk->spr.len = PROP_VALUE_ACCESS(props->values,
+					SPR_LEN, 0);
+			sblk->spr.version = PROP_VALUE_ACCESS(props->values,
+					SPR_VERSION, 0);
+			set_bit(SDE_DSPP_SPR, &dspp->features);
+		}
+	}
+
+	sde_put_dt_props(props);
+	return 0;
+}
+
 static int _sde_rc_parse_dt(struct device_node *np,
 		struct sde_mdss_cfg *sde_cfg)
 {
@@ -2669,8 +2722,11 @@ static int sde_dspp_parse_dt(struct device_node *np,
 	if (rc)
 		goto end;
 
-	rc = _sde_rc_parse_dt(np, sde_cfg);
+	rc = _sde_dspp_spr_parse_dt(np, sde_cfg);
+	if (rc)
+		goto end;
 
+	rc = _sde_rc_parse_dt(np, sde_cfg);
 end:
 	return rc;
 }

msm/sde/sde_hw_catalog.h

@@ -765,6 +765,7 @@ struct sde_dspp_sub_blks {
 	struct sde_pp_blk hist;
 	struct sde_pp_blk ad;
 	struct sde_pp_blk ltm;
+	struct sde_pp_blk spr;
 	struct sde_pp_blk vlut;
 	struct sde_dspp_rc rc;
 };
@@ -1545,6 +1546,7 @@ struct sde_mdss_cfg {
 	u32 ad_count;
 	u32 ltm_count;
 	u32 rc_count;
+	u32 spr_count;
 
 	u32 merge_3d_count;
 	struct sde_merge_3d_cfg merge_3d[MAX_BLOCKS];

msm/sde/sde_hw_dspp.c

@@ -371,6 +371,14 @@ struct sde_hw_dspp *sde_hw_dspp_init(enum sde_dspp idx,
 				c->hw.blk_off + cfg->sblk->rc.base +
 				cfg->sblk->rc.len, c->hw.xin_id);
 	}
+
+	if ((cfg->sblk->spr.id == SDE_DSPP_SPR) && cfg->sblk->spr.base) {
+		snprintf(buf, ARRAY_SIZE(buf), "%s_%d", "spr", c->idx - DSPP_0);
+		sde_dbg_reg_register_dump_range(SDE_DBG_NAME, buf,
+				c->hw.blk_off + cfg->sblk->spr.base,
+				c->hw.blk_off + cfg->sblk->spr.base +
+				cfg->sblk->spr.len, c->hw.xin_id);
+	}
 	return c;
 
 blk_init_error: