msm: vidc: update iris2 clock calculation

As per vperf sheet, VSP FW Overhead factor(1.05) needs
to be applied to both entropy mode CABAC & CAVLC.

Change-Id: I93dc00137e0633ac2a79862c58970ba43b515ad6
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
This commit is contained in:
Priyanka Gujjula
2021-07-01 09:10:45 +05:30
parent c80c5b8bbb
commit 892f8c6647

View File

@@ -116,9 +116,9 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size)
} else {
base_cycles = 0;
vsp_cycles = div_u64(vsp_cycles, 2);
/* VSP FW Overhead 1.05 */
vsp_cycles = div_u64(vsp_cycles * 21, 20);
}
/* VSP FW Overhead 1.05 */
vsp_cycles = div_u64(vsp_cycles * 21, 20);
if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1)
vsp_cycles = vsp_cycles * 3;
@@ -148,9 +148,9 @@ u64 msm_vidc_calc_freq_iris2(struct msm_vidc_inst *inst, u32 data_size)
} else {
base_cycles = 0;
vsp_cycles = div_u64(vsp_cycles, 2);
/* VSP FW overhead 1.05 */
vsp_cycles = div_u64(vsp_cycles * 21, 20);
}
/* VSP FW overhead 1.05 */
vsp_cycles = div_u64(vsp_cycles * 21, 20);
if (inst->capabilities->cap[STAGE].value == MSM_VIDC_STAGE_1)
vsp_cycles = vsp_cycles * 3;