disp: msm: sde: add hardware catalog support for VDC-m block
Add hardware catalog support for VDC-m block to parse the register offsets and feature capabilities. Change-Id: I1bfbc4b6e7e9f34738d49fecdef4b427a0ccded7 Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Bu işleme şunda yer alıyor:
Abhinav Kumar
işlemeyi yapan:
Gerrit - the friendly Code Review server
Gerrit - the friendly Code Review server
ebeveyn
3e0f65f882
işleme
88a43f2441
@@ -318,6 +318,15 @@ enum {
|
||||
DSC_PROP_MAX,
|
||||
};
|
||||
|
||||
enum {
|
||||
VDC_OFF,
|
||||
VDC_LEN,
|
||||
VDC_REV,
|
||||
VDC_ENC,
|
||||
VDC_CTL,
|
||||
VDC_PROP_MAX,
|
||||
};
|
||||
|
||||
enum {
|
||||
DS_TOP_OFF,
|
||||
DS_TOP_LEN,
|
||||
@@ -710,6 +719,14 @@ static struct sde_prop_type dsc_prop[] = {
|
||||
{DSC_422, "qcom,sde-dsc-native422-supp", false, PROP_TYPE_U32_ARRAY}
|
||||
};
|
||||
|
||||
static struct sde_prop_type vdc_prop[] = {
|
||||
{VDC_OFF, "qcom,sde-vdc-off", false, PROP_TYPE_U32_ARRAY},
|
||||
{VDC_LEN, "qcom,sde-vdc-size", false, PROP_TYPE_U32},
|
||||
{VDC_REV, "qcom,sde-vdc-hw-rev", false, PROP_TYPE_STRING},
|
||||
{VDC_ENC, "qcom,sde-vdc-enc", false, PROP_TYPE_U32_ARRAY},
|
||||
{VDC_CTL, "qcom,sde-vdc-ctl", false, PROP_TYPE_U32_ARRAY},
|
||||
};
|
||||
|
||||
static struct sde_prop_type cdm_prop[] = {
|
||||
{HW_OFF, "qcom,sde-cdm-off", false, PROP_TYPE_U32_ARRAY},
|
||||
{HW_LEN, "qcom,sde-cdm-size", false, PROP_TYPE_U32},
|
||||
@@ -2784,6 +2801,85 @@ end:
|
||||
return rc;
|
||||
};
|
||||
|
||||
static int sde_vdc_parse_dt(struct device_node *np,
|
||||
struct sde_mdss_cfg *sde_cfg)
|
||||
{
|
||||
int rc, prop_count[MAX_BLOCKS], i;
|
||||
struct sde_prop_value *prop_value = NULL;
|
||||
bool prop_exists[VDC_PROP_MAX];
|
||||
u32 off_count, vdc_rev;
|
||||
const char *rev;
|
||||
struct sde_vdc_cfg *vdc;
|
||||
struct sde_vdc_sub_blks *sblk;
|
||||
|
||||
if (!sde_cfg) {
|
||||
SDE_ERROR("invalid argument\n");
|
||||
rc = -EINVAL;
|
||||
goto end;
|
||||
}
|
||||
|
||||
prop_value = kzalloc(VDC_PROP_MAX *
|
||||
sizeof(struct sde_prop_value), GFP_KERNEL);
|
||||
if (!prop_value) {
|
||||
rc = -ENOMEM;
|
||||
goto end;
|
||||
}
|
||||
|
||||
rc = _validate_dt_entry(np, vdc_prop, ARRAY_SIZE(vdc_prop), prop_count,
|
||||
&off_count);
|
||||
if (rc)
|
||||
goto end;
|
||||
|
||||
sde_cfg->vdc_count = off_count;
|
||||
|
||||
rc = of_property_read_string(np, vdc_prop[VDC_REV].prop_name, &rev);
|
||||
if ((rc == -EINVAL) || (rc == -ENODATA)) {
|
||||
vdc_rev = SDE_VDC_HW_REV_1_1;
|
||||
rc = 0;
|
||||
} else if (!rc && !strcmp(rev, "vdc_1_1")) {
|
||||
vdc_rev = SDE_VDC_HW_REV_1_1;
|
||||
rc = 0;
|
||||
} else {
|
||||
SDE_ERROR("invalid vdc configuration\n");
|
||||
}
|
||||
|
||||
rc = _read_dt_entry(np, vdc_prop, ARRAY_SIZE(vdc_prop), prop_count,
|
||||
prop_exists, prop_value);
|
||||
if (rc)
|
||||
goto end;
|
||||
|
||||
for (i = 0; i < off_count; i++) {
|
||||
vdc = sde_cfg->vdc + i;
|
||||
|
||||
sblk = kzalloc(sizeof(*sblk), GFP_KERNEL);
|
||||
if (!sblk) {
|
||||
rc = -ENOMEM;
|
||||
/* catalog deinit will release the allocated blocks */
|
||||
goto end;
|
||||
}
|
||||
vdc->sblk = sblk;
|
||||
|
||||
vdc->base = PROP_VALUE_ACCESS(prop_value, VDC_OFF, i);
|
||||
vdc->id = VDC_0 + i;
|
||||
vdc->len = PROP_VALUE_ACCESS(prop_value, VDC_LEN, 0);
|
||||
snprintf(vdc->name, SDE_HW_BLK_NAME_LEN, "vdc_%u",
|
||||
vdc->id - VDC_0);
|
||||
|
||||
if (!prop_exists[VDC_LEN])
|
||||
vdc->len = DEFAULT_SDE_HW_BLOCK_LEN;
|
||||
|
||||
sblk->enc.base = PROP_VALUE_ACCESS(prop_value,
|
||||
VDC_ENC, i);
|
||||
sblk->ctl.base = PROP_VALUE_ACCESS(prop_value,
|
||||
VDC_CTL, i);
|
||||
set_bit(SDE_VDC_HW_REV_1_1, &vdc->features);
|
||||
}
|
||||
|
||||
end:
|
||||
kfree(prop_value);
|
||||
return rc;
|
||||
};
|
||||
|
||||
static int sde_cdm_parse_dt(struct device_node *np,
|
||||
struct sde_mdss_cfg *sde_cfg)
|
||||
{
|
||||
@@ -4542,6 +4638,9 @@ void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg)
|
||||
for (i = 0; i < sde_cfg->pingpong_count; i++)
|
||||
kfree(sde_cfg->pingpong[i].sblk);
|
||||
|
||||
for (i = 0; i < sde_cfg->vdc_count; i++)
|
||||
kfree(sde_cfg->vdc[i].sblk);
|
||||
|
||||
for (i = 0; i < sde_cfg->vbif_count; i++) {
|
||||
kfree(sde_cfg->vbif[i].dynamic_ot_rd_tbl.cfg);
|
||||
kfree(sde_cfg->vbif[i].dynamic_ot_wr_tbl.cfg);
|
||||
@@ -4634,6 +4733,10 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev)
|
||||
if (rc)
|
||||
goto end;
|
||||
|
||||
rc = sde_vdc_parse_dt(np, sde_cfg);
|
||||
if (rc)
|
||||
goto end;
|
||||
|
||||
rc = sde_pp_parse_dt(np, sde_cfg);
|
||||
if (rc)
|
||||
goto end;
|
||||
|
||||
@@ -404,6 +404,19 @@ enum {
|
||||
SDE_DSC_MAX
|
||||
};
|
||||
|
||||
/** VDC sub-blocks/features
|
||||
* @SDE_VDC_HW_REV_1_1 vdc block supports vdc 1.1 only
|
||||
* @SDE_VDC_ENC vdc encoder sub block
|
||||
* @SDE_VDC_CTL vdc ctl sub block
|
||||
* @SDE_VDC_MAX
|
||||
*/
|
||||
enum {
|
||||
SDE_VDC_HW_REV_1_1,
|
||||
SDE_VDC_ENC,
|
||||
SDE_VDC_CTL,
|
||||
SDE_VDC_MAX
|
||||
};
|
||||
|
||||
/**
|
||||
* CTL sub-blocks
|
||||
* @SDE_CTL_SPLIT_DISPLAY CTL supports video mode split display
|
||||
@@ -594,6 +607,14 @@ struct sde_dsc_blk {
|
||||
SDE_HW_SUBBLK_INFO;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sde_vdc_blk : VDC Encoder sub-blk information
|
||||
* @info: HW register and features supported by this sub-blk
|
||||
*/
|
||||
struct sde_vdc_blk {
|
||||
SDE_HW_SUBBLK_INFO;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sde_format_extended - define sde specific pixel format+modifier
|
||||
* @fourcc_format: Base FOURCC pixel format code
|
||||
@@ -760,6 +781,15 @@ struct sde_dsc_sub_blks {
|
||||
struct sde_dsc_blk ctl;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sde_vdc_sub_blks : VDC sub-blks
|
||||
*
|
||||
*/
|
||||
struct sde_vdc_sub_blks {
|
||||
struct sde_vdc_blk enc;
|
||||
struct sde_vdc_blk ctl;
|
||||
};
|
||||
|
||||
struct sde_wb_sub_blocks {
|
||||
u32 maxlinewidth;
|
||||
};
|
||||
@@ -993,6 +1023,20 @@ struct sde_dsc_cfg {
|
||||
struct sde_dsc_sub_blks *sblk;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sde_vdc_cfg - information of VDC blocks
|
||||
* @id enum identifying this block
|
||||
* @base register offset of this block
|
||||
* @len: length of hardware block
|
||||
* @features bit mask identifying sub-blocks/features
|
||||
* @enc VDC encoder register offset(relative to VDC base)
|
||||
* @ctl VDC Control register offset(relative to VDC base)
|
||||
*/
|
||||
struct sde_vdc_cfg {
|
||||
SDE_HW_BLK_INFO;
|
||||
struct sde_vdc_sub_blks *sblk;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sde_cdm_cfg - information of chroma down blocks
|
||||
* @id enum identifying this block
|
||||
@@ -1442,6 +1486,9 @@ struct sde_mdss_cfg {
|
||||
u32 dsc_count;
|
||||
struct sde_dsc_cfg dsc[MAX_BLOCKS];
|
||||
|
||||
u32 vdc_count;
|
||||
struct sde_vdc_cfg vdc[MAX_BLOCKS];
|
||||
|
||||
u32 cdm_count;
|
||||
struct sde_cdm_cfg cdm[MAX_BLOCKS];
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _SDE_HW_MDSS_H
|
||||
@@ -230,6 +230,13 @@ enum sde_dsc {
|
||||
DSC_MAX
|
||||
};
|
||||
|
||||
enum sde_vdc {
|
||||
VDC_NONE = 0,
|
||||
VDC_0,
|
||||
VDC_1,
|
||||
VDC_MAX
|
||||
};
|
||||
|
||||
enum sde_intf {
|
||||
INTF_0 = 1,
|
||||
INTF_1,
|
||||
|
||||
Yeni konuda referans
Bir kullanıcı engelle