Add 'qcom/opensource/graphics-kernel/' from commit 'b4fdc4c04295ac59109ae19d64747522740c3f14'
git-subtree-dir: qcom/opensource/graphics-kernel git-subtree-mainline:992813d9c1
git-subtree-split:b4fdc4c042
Change-Id: repo: https://git.codelinaro.org/clo/la/platform/vendor/qcom/opensource/graphics-kernel tag: GRAPHICS.LA.14.0.r1-07700-lanai.0
This commit is contained in:
175
qcom/opensource/graphics-kernel/adreno_cp_parser.h
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175
qcom/opensource/graphics-kernel/adreno_cp_parser.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2013-2014, 2017, 2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef __ADRENO_IB_PARSER__
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#define __ADRENO_IB_PARSER__
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#include "adreno.h"
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extern const unsigned int a3xx_cp_addr_regs[];
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extern const unsigned int a4xx_cp_addr_regs[];
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/*
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* struct adreno_ib_object - Structure containing information about an
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* address range found in an IB
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* @gpuaddr: The starting gpuaddress of the range
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* @size: Size of the range
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* @snapshot_obj_type - Type of range used in snapshot
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* @entry: The memory entry in which this range is found
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*/
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struct adreno_ib_object {
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uint64_t gpuaddr;
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uint64_t size;
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int snapshot_obj_type;
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struct kgsl_mem_entry *entry;
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};
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/*
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* struct adreno_ib_object_list - List of address ranges found in IB
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* @obj_list: The address range list
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* @num_objs: Number of objects in list
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*/
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struct adreno_ib_object_list {
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struct adreno_ib_object *obj_list;
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int num_objs;
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};
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/*
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* adreno registers used during IB parsing, there contain addresses
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* and sizes of the addresses that present in an IB
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*/
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enum adreno_cp_addr_regs {
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_0 = 0,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_0,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_1,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_1,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_2,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_2,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_3,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_3,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_4,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_4,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_5,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_5,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_6,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_6,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_ADDRESS_7,
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ADRENO_CP_ADDR_VSC_PIPE_DATA_LENGTH_7,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_0,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_1,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_2,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_3,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_4,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_5,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_6,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_7,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_8,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_9,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_10,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_11,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_12,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_13,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_14,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_15,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_16,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_17,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_18,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_19,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_20,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_21,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_22,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_23,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_24,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_25,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_26,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_27,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_28,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_29,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_30,
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ADRENO_CP_ADDR_VFD_FETCH_INSTR_1_31,
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ADRENO_CP_ADDR_VSC_SIZE_ADDRESS,
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ADRENO_CP_ADDR_SP_VS_PVT_MEM_ADDR,
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ADRENO_CP_ADDR_SP_FS_PVT_MEM_ADDR,
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ADRENO_CP_ADDR_SP_VS_OBJ_START_REG,
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ADRENO_CP_ADDR_SP_FS_OBJ_START_REG,
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ADRENO_CP_UCHE_INVALIDATE0,
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ADRENO_CP_UCHE_INVALIDATE1,
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ADRENO_CP_ADDR_MAX,
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};
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/*
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* adreno_ib_init_ib_obj() - Create an ib object structure and initialize it
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* with gpuaddress and size
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* @gpuaddr: gpuaddr with which to initialize the object with
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* @size: Size in bytes with which the object is initialized
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* @ib_type: The IB type used by snapshot
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*
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* Returns the object pointer on success else error code in the pointer
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*/
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static inline void adreno_ib_init_ib_obj(uint64_t gpuaddr,
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uint64_t size, int obj_type,
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struct kgsl_mem_entry *entry,
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struct adreno_ib_object *ib_obj)
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{
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ib_obj->gpuaddr = gpuaddr;
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ib_obj->size = size;
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ib_obj->snapshot_obj_type = obj_type;
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ib_obj->entry = entry;
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}
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/*
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* adreno_cp_parser_getreg() - Returns the value of register offset
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* @adreno_dev: The adreno device being operated upon
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* @reg_enum: Enum index of the register whose offset is returned
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*/
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static inline int adreno_cp_parser_getreg(struct adreno_device *adreno_dev,
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enum adreno_cp_addr_regs reg_enum)
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{
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if (reg_enum == ADRENO_CP_ADDR_MAX)
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return -EEXIST;
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if (!adreno_is_a3xx(adreno_dev))
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return -EEXIST;
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return a3xx_cp_addr_regs[reg_enum];
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}
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/*
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* adreno_cp_parser_regindex() - Returns enum index for a given register offset
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* @adreno_dev: The adreno device being operated upon
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* @offset: Register offset
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* @start: The start index to search from
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* @end: The last index to search
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*
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* Checks the list of registers defined for the device and returns the index
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* whose offset value matches offset parameter.
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*/
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static inline int adreno_cp_parser_regindex(struct adreno_device *adreno_dev,
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unsigned int offset,
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enum adreno_cp_addr_regs start,
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enum adreno_cp_addr_regs end)
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{
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int i;
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const unsigned int *regs;
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if (!adreno_is_a3xx(adreno_dev))
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return -EEXIST;
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regs = a3xx_cp_addr_regs;
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for (i = start; i <= end && i < ADRENO_CP_ADDR_MAX; i++)
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if (regs[i] == offset)
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return i;
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return -EEXIST;
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}
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int adreno_ib_create_object_list(
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struct kgsl_device *device,
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struct kgsl_process_private *process,
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uint64_t gpuaddr, uint64_t dwords, uint64_t ib2base,
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struct adreno_ib_object_list **out_ib_obj_list);
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void adreno_ib_destroy_obj_list(struct adreno_ib_object_list *ib_obj_list);
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#endif
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