qcacmn: Include Umac reset irq line only when enabled

Include Umac reset irq line in the mask table only
when it is enabled for 8 msi group to make sure
the legacy devices are not impacted.

Change-Id: If8f6b7f948a7c9f45247e8ff934642f0a532ff0d
CRs-Fixed: 3499500
Cette révision appartient à :
Pavankumar Nandeshwar
2023-06-09 02:57:14 -07:00
révisé par Rahul Choudhary
Parent a238a3e04b
révision 876f765030
3 fichiers modifiés avec 121 ajouts et 17 suppressions

Voir le fichier

@@ -2208,9 +2208,9 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
{ 0, 0, 0, 0,
WLAN_CFG_RX_RING_MASK_0,
WLAN_CFG_RX_RING_MASK_1,
WLAN_CFG_RX_RING_MASK_2 |
WLAN_CFG_RX_RING_MASK_2,
WLAN_CFG_RX_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
0, 0, 0, 0, 0, 0, 0, 0},
/* rx mon ring masks */
{ 0, 0, 0,
WLAN_CFG_RX_MON_RING_MASK_0,
@@ -2284,8 +2284,7 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
/* ppe2tcl ring mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* umac reset mask */
{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
},
/* Interrupt assignment for 9 MSI combination */
{
@@ -2994,6 +2993,99 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
};
#endif
struct dp_int_mask_assignment dp_ur_mask_assignment_8msi =
/* Interrupt assignment for 8 MSI combination with Umac reset support */
{
/* tx ring masks */
{ WLAN_CFG_TX_RING_MASK_0,
WLAN_CFG_TX_RING_MASK_1,
WLAN_CFG_TX_RING_MASK_2,
WLAN_CFG_TX_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx ring masks */
{ 0, 0, 0, 0,
WLAN_CFG_RX_RING_MASK_0,
WLAN_CFG_RX_RING_MASK_1,
WLAN_CFG_RX_RING_MASK_2 |
WLAN_CFG_RX_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx mon ring masks */
{ 0, 0, 0,
WLAN_CFG_RX_MON_RING_MASK_0,
WLAN_CFG_RX_MON_RING_MASK_1,
WLAN_CFG_RX_MON_RING_MASK_2,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2rxdma ring masks */
{ 0, 0, 0,
WLAN_CFG_HOST2RXDMA_RING_MASK_0,
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rxdma2host ring masks */
{ 0, 0, 0,
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2rxdma mon ring masks */
{ 0, 0, 0,
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rxdma2host mon ring masks */
{ 0, 0, 0,
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx err ring masks */
{ 0, 0, 0,
WLAN_CFG_RX_ERR_RING_MASK_0,
WLAN_CFG_RX_ERR_RING_MASK_1,
WLAN_CFG_RX_ERR_RING_MASK_2,
WLAN_CFG_RX_ERR_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx wbm rel ring masks */
{ 0, 0, 0,
WLAN_CFG_RX_WBM_REL_RING_MASK_0,
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* reo status ring masks */
{ 0, 0, 0,
WLAN_CFG_REO_STATUS_RING_MASK_0,
WLAN_CFG_REO_STATUS_RING_MASK_1,
WLAN_CFG_REO_STATUS_RING_MASK_2,
WLAN_CFG_REO_STATUS_RING_MASK_3,
0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* rx_ring_near_full_irq_2 mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx_ring_near_full_irq mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* host2txmon ring masks */
{ WLAN_CFG_HOST2TXMON_RING_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* tx mon ring masks */
{ WLAN_CFG_TX_MON_RING_MASK_0,
WLAN_CFG_TX_MON_RING_MASK_1,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* ppe ds wbm release ring ring mask */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* Reo2ppe ring mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* ppe2tcl ring mask */
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
/* umac reset mask */
{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0,
0, 0, 0, 0, 0, 0, 0, 0},
};
struct dp_int_mask_assignment dp_ds_mask_assignment_8msi =
/* Interrupt assignment for 8 MSI combination */
{
@@ -3330,7 +3422,8 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
int num_dp_msi,
int interrupt_mode,
bool is_monitor_mode,
bool ppeds_attached)
bool ppeds_attached,
bool umac_reset_support)
{ int i = 0;
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
@@ -3361,7 +3454,8 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
int num_dp_msi,
int interrupt_mode,
bool is_monitor_mode,
bool ppeds_attached)
bool ppeds_attached,
bool umac_reset_support)
{ int i = 0;
const uint8_t *tx_ring_intr_mask =
wlan_cfg_get_tx_ring_int_mask(wlan_cfg_ctx);
@@ -3482,10 +3576,11 @@ wlan_cfg_mask_assignment(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
}
void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
int num_dp_msi,
int interrupt_mode,
bool is_monitor_mode,
bool ppeds_attached)
int num_dp_msi,
int interrupt_mode,
bool is_monitor_mode,
bool ppeds_attached,
bool umac_reset_support)
{
int i = 0;
int interrupt_index = 0;
@@ -3501,14 +3596,20 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
}
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
if (!ppeds_attached)
mask_assignment = &dp_mask_assignment[interrupt_index];
else if (interrupt_index == 8)
if (!ppeds_attached) {
if (interrupt_index == 8 && umac_reset_support)
mask_assignment = &dp_ur_mask_assignment_8msi;
else
mask_assignment =
&dp_mask_assignment[interrupt_index];
} else if (interrupt_index == 8) {
mask_assignment = &dp_ds_mask_assignment_8msi;
else if (interrupt_index == 9)
} else if (interrupt_index == 9) {
mask_assignment = &dp_ds_mask_assignment_9msi;
else
} else {
mask_assignment = &dp_mask_assignment[interrupt_index];
}
wlan_cfg_mask_assignment(wlan_cfg_ctx, mask_assignment,
interrupt_index, i, is_monitor_mode);