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@@ -91,11 +91,16 @@ QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc)
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return QDF_STATUS_E_NULL_VALUE;
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}
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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+ return QDF_STATUS_E_NOSUPPORT;
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+ }
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+
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umac_reset_ctx = &soc->umac_reset_ctx;
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qdf_mem_zero(umac_reset_ctx, sizeof(*umac_reset_ctx));
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- umac_reset_ctx->supported = true;
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umac_reset_ctx->current_state = UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET;
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+ umac_reset_ctx->shmem_exp_magic_num = DP_UMAC_RESET_SHMEM_MAGIC_NUM;
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status = dp_get_umac_reset_intr_ctx(soc, &umac_reset_ctx->intr_offset);
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if (QDF_IS_STATUS_ERROR(status)) {
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@@ -120,11 +125,55 @@ QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc)
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umac_reset_ctx->shmem_paddr_aligned = qdf_roundup(
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(uint64_t)umac_reset_ctx->shmem_paddr_unaligned,
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DP_UMAC_RESET_SHMEM_ALIGN);
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+ umac_reset_ctx->shmem_size = alloc_size;
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+
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+ /* Write the magic number to the shared memory */
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+ umac_reset_ctx->shmem_vaddr_aligned->magic_num =
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+ DP_UMAC_RESET_SHMEM_MAGIC_NUM;
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+
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+ /* Attach the interrupts */
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+ status = dp_umac_reset_interrupt_attach(soc);
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+ if (QDF_IS_STATUS_ERROR(status)) {
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+ dp_umac_reset_err("Interrupt attach failed");
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+ qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
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+ umac_reset_ctx->shmem_size,
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+ umac_reset_ctx->shmem_vaddr_unaligned,
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+ umac_reset_ctx->shmem_paddr_unaligned,
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+ 0);
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+ return status;
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+ }
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/* Send the setup cmd to the target */
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return dp_umac_reset_send_setup_cmd(soc);
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}
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+QDF_STATUS dp_soc_umac_reset_deinit(struct cdp_soc_t *txrx_soc)
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+{
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+ struct dp_soc *soc = (struct dp_soc *)txrx_soc;
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+ struct dp_soc_umac_reset_ctx *umac_reset_ctx;
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+
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+ if (!soc) {
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+ dp_umac_reset_err("DP SOC is null");
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+ return QDF_STATUS_E_NULL_VALUE;
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+ }
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+
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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+ return QDF_STATUS_E_NOSUPPORT;
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+ }
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+
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+ dp_umac_reset_interrupt_detach(soc);
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+
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+ umac_reset_ctx = &soc->umac_reset_ctx;
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+ qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
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+ umac_reset_ctx->shmem_size,
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+ umac_reset_ctx->shmem_vaddr_unaligned,
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+ umac_reset_ctx->shmem_paddr_unaligned,
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+ 0);
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+
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+ return QDF_STATUS_SUCCESS;
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+}
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+
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/**
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* dp_umac_reset_get_rx_event() - Extract the Rx event from the shared memory
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* @umac_reset_ctx: UMAC reset context
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@@ -325,14 +374,13 @@ QDF_STATUS dp_umac_reset_interrupt_attach(struct dp_soc *soc)
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return QDF_STATUS_E_NULL_VALUE;
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}
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- umac_reset_ctx = &soc->umac_reset_ctx;
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-
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- /* return if feature is not supported */
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- if (!umac_reset_ctx->supported) {
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- dp_umac_reset_info("UMAC reset is not supported on this SOC");
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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return QDF_STATUS_SUCCESS;
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}
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+ umac_reset_ctx = &soc->umac_reset_ctx;
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+
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if (pld_get_enable_intx(soc->osdev->dev)) {
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dp_umac_reset_err("UMAC reset is not supported in legacy interrupt mode");
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return QDF_STATUS_E_FAILURE;
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@@ -368,18 +416,13 @@ QDF_STATUS dp_umac_reset_interrupt_attach(struct dp_soc *soc)
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QDF_STATUS dp_umac_reset_interrupt_detach(struct dp_soc *soc)
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{
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- struct dp_soc_umac_reset_ctx *umac_reset_ctx;
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-
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if (!soc) {
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dp_umac_reset_err("DP SOC is null");
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return QDF_STATUS_E_NULL_VALUE;
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}
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- umac_reset_ctx = &soc->umac_reset_ctx;
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-
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- /* return if feature is not supported */
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- if (!umac_reset_ctx->supported) {
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- dp_umac_reset_info("UMAC reset is not supported on this SOC");
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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return QDF_STATUS_SUCCESS;
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}
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@@ -398,6 +441,11 @@ QDF_STATUS dp_umac_reset_register_rx_action_callback(
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return QDF_STATUS_E_NULL_VALUE;
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}
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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+ return QDF_STATUS_E_NOSUPPORT;
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+ }
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+
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if (action >= UMAC_RESET_ACTION_MAX) {
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dp_umac_reset_err("invalid action: %d", action);
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return QDF_STATUS_E_INVAL;
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@@ -541,6 +589,16 @@ QDF_STATUS dp_umac_reset_notify_action_completion(
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{
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enum umac_reset_state next_state;
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+ if (!soc) {
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+ dp_umac_reset_err("DP SOC is null");
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+ return QDF_STATUS_E_NULL_VALUE;
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+ }
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+
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+ if (!soc->features.umac_hw_reset_support) {
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+ dp_umac_reset_info("Target doesn't support the UMAC HW reset feature");
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+ return QDF_STATUS_E_NOSUPPORT;
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+ }
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+
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switch (action) {
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case UMAC_RESET_ACTION_DO_PRE_RESET:
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next_state = UMAC_RESET_STATE_HOST_PRE_RESET_DONE;
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