samsung-sm8650/android_kernel_samsung_sm8650-modules
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Merge "msm: camera: tfe: Enable the tfe diag debug feature" into camera-kernel.lnx.4.0

ソースを参照
このコミットが含まれているのは:
Haritha Chintalapati
2020-11-05 14:02:26 -08:00
committed by Gerrit - the friendly Code Review server
親 792be0d9c4 162bc103f2
コミット 857cbdaa51
4個のファイルの変更、131行の追加、32行の削除
Patchファイルをダウンロード Diffファイルをダウンロード すべてのファイルを展開 すべてのファイルを折り畳む

44
drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.c
ファイルの表示

@@ -2981,11 +2981,12 @@ static int cam_tfe_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
struct cam_isp_stop_args stop_isp;
struct cam_tfe_hw_mgr_ctx *ctx;
struct cam_isp_hw_mgr_res *hw_mgr_res;
struct cam_isp_resource_node *rsrc_node = NULL;
uint32_t i, camif_debug;
struct cam_hw_intf *hw_intf;
uint32_t i;
bool res_rdi_context_set = false;
uint32_t primary_rdi_in_res;
uint32_t primary_rdi_out_res;
bool hw_id[CAM_TFE_HW_NUM_MAX] = {0};
primary_rdi_in_res = CAM_ISP_HW_TFE_IN_MAX;
primary_rdi_out_res = CAM_ISP_TFE_OUT_RES_MAX;
@@ -3018,31 +3019,40 @@ static int cam_tfe_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
if (ctx->init_done && start_isp->start_only)
goto start_only;
/* set current csid debug information to CSID HW */
for (i = 0; i < CAM_TFE_CSID_HW_NUM_MAX; i++) {
if (g_tfe_hw_mgr.csid_devices[i])
rc = g_tfe_hw_mgr.csid_devices[i]->hw_ops.process_cmd(
g_tfe_hw_mgr.csid_devices[i]->hw_priv,
list_for_each_entry(hw_mgr_res, &ctx->res_list_tfe_csid, list) {
for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
if (!hw_mgr_res->hw_res[i])
continue;
hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
if (hw_id[hw_intf->hw_idx])
continue;
rc = hw_intf->hw_ops.process_cmd(
hw_intf->hw_priv,
CAM_TFE_CSID_SET_CSID_DEBUG,
&g_tfe_hw_mgr.debug_cfg.csid_debug,
sizeof(g_tfe_hw_mgr.debug_cfg.csid_debug));
hw_id[hw_intf->hw_idx] = true;
}
}
camif_debug = g_tfe_hw_mgr.debug_cfg.camif_debug;
memset(&hw_id[0], 0, sizeof(hw_id));
list_for_each_entry(hw_mgr_res, &ctx->res_list_tfe_in, list) {
for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
if (!hw_mgr_res->hw_res[i])
continue;
rsrc_node = hw_mgr_res->hw_res[i];
if (rsrc_node->process_cmd && (rsrc_node->res_id ==
CAM_ISP_HW_TFE_IN_CAMIF)) {
rc = hw_mgr_res->hw_res[i]->process_cmd(
hw_mgr_res->hw_res[i],
CAM_ISP_HW_CMD_SET_CAMIF_DEBUG,
&camif_debug,
sizeof(camif_debug));
}
hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
if (hw_id[hw_intf->hw_idx])
continue;
rc = hw_intf->hw_ops.process_cmd(
hw_intf->hw_priv,
CAM_ISP_HW_CMD_SET_CAMIF_DEBUG,
&g_tfe_hw_mgr.debug_cfg.camif_debug,
sizeof(g_tfe_hw_mgr.debug_cfg.camif_debug));
hw_id[hw_intf->hw_idx] = true;
}
}

10
drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe530.h
ファイルの表示

@@ -40,6 +40,9 @@ static struct cam_tfe_top_reg_offset_common tfe530_top_commong_reg = {
.perf_stall_count = 0x000010EC,
.perf_always_count = 0x000010F0,
.perf_count_status = 0x000010F4,
.diag_min_hbi_error_shift = 15,
.diag_neq_hbi_shift = 14,
.diag_sensor_hbi_mask = 0x3FFF,
};
static struct cam_tfe_camif_reg tfe530_camif_reg = {
@@ -131,6 +134,8 @@ static struct cam_tfe_rdi_reg_data tfe530_rdi0_reg_data = {
0x00000000,
},
.enable_diagnostic_hw = 0x1,
.diag_sensor_sel = 0x1,
.diag_sensor_shift = 0x1,
};
static struct cam_tfe_rdi_reg tfe530_rdi1_reg = {
@@ -166,6 +171,8 @@ static struct cam_tfe_rdi_reg_data tfe530_rdi1_reg_data = {
0x00000000,
},
.enable_diagnostic_hw = 0x1,
.diag_sensor_sel = 0x2,
.diag_sensor_shift = 0x1,
};
static struct cam_tfe_rdi_reg tfe530_rdi2_reg = {
@@ -201,6 +208,9 @@ static struct cam_tfe_rdi_reg_data tfe530_rdi2_reg_data = {
0x00000000,
},
.enable_diagnostic_hw = 0x1,
.diag_sensor_sel = 0x3,
.diag_sensor_shift = 0x1,
};
static struct cam_tfe_clc_hw_status tfe530_clc_hw_info[CAM_TFE_MAX_CLC] = {

102
drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c
ファイルの表示

@@ -52,6 +52,7 @@ struct cam_tfe_top_priv {
struct timeval epoch_ts;
struct timeval eof_ts;
struct timeval error_ts;
uint32_t top_debug;
};
struct cam_tfe_camif_data {
@@ -497,9 +498,11 @@ static int cam_tfe_rdi_irq_bottom_half(
bool epoch_process,
struct cam_tfe_irq_evt_payload *evt_payload)
{
struct cam_tfe_rdi_data *rdi_priv;
struct cam_isp_hw_event_info evt_info;
struct cam_hw_info *hw_info;
struct cam_tfe_rdi_data *rdi_priv;
struct cam_isp_hw_event_info evt_info;
struct cam_hw_info *hw_info;
struct cam_tfe_top_reg_offset_common *common_reg;
uint32_t val, val2;
rdi_priv = (struct cam_tfe_rdi_data *)rdi_node->res_priv;
hw_info = rdi_node->hw_intf->hw_priv;
@@ -532,6 +535,23 @@ static int cam_tfe_rdi_irq_bottom_half(
if (rdi_priv->event_cb)
rdi_priv->event_cb(rdi_priv->priv,
CAM_ISP_HW_EVENT_SOF, (void *)&evt_info);
if (top_priv->top_debug &
CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
common_reg = rdi_priv->common_reg;
val = cam_io_r(rdi_priv->mem_base +
common_reg->diag_sensor_status_0);
val2 = cam_io_r(rdi_priv->mem_base +
common_reg->diag_sensor_status_1);
CAM_INFO(CAM_ISP,
"TFE:%d diag sensor hbi min error:%d neq hbi:%d HBI:%d VBI:%d",
rdi_node->hw_intf->hw_idx,
((val >> common_reg->diag_min_hbi_error_shift)
& 0x1),
((val >> common_reg->diag_neq_hbi_shift) & 0x1),
(val & common_reg->diag_sensor_hbi_mask),
val2);
}
}
if (epoch_process && (evt_payload->irq_reg_val[1] &
@@ -556,10 +576,11 @@ static int cam_tfe_camif_irq_bottom_half(
bool epoch_process,
struct cam_tfe_irq_evt_payload *evt_payload)
{
struct cam_tfe_camif_data *camif_priv;
struct cam_isp_hw_event_info evt_info;
struct cam_hw_info *hw_info;
uint32_t val;
struct cam_tfe_camif_data *camif_priv;
struct cam_isp_hw_event_info evt_info;
struct cam_hw_info *hw_info;
struct cam_tfe_top_reg_offset_common *common_reg;
uint32_t val, val2;
camif_priv = camif_node->res_priv;
hw_info = camif_node->hw_intf->hw_priv;
@@ -606,6 +627,23 @@ static int cam_tfe_camif_irq_bottom_half(
if (camif_priv->event_cb)
camif_priv->event_cb(camif_priv->priv,
CAM_ISP_HW_EVENT_SOF, (void *)&evt_info);
if (top_priv->top_debug &
CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
common_reg = camif_priv->common_reg;
val = cam_io_r(camif_priv->mem_base +
common_reg->diag_sensor_status_0);
val2 = cam_io_r(camif_priv->mem_base +
common_reg->diag_sensor_status_1);
CAM_INFO(CAM_ISP,
"TFE:%d diag sensor hbi min error:%d neq hbi:%d HBI:%d VBI:%d",
camif_node->hw_intf->hw_idx,
((val >> common_reg->diag_min_hbi_error_shift)
& 0x1),
((val >> common_reg->diag_neq_hbi_shift) & 0x1),
(val & common_reg->diag_sensor_hbi_mask),
val2);
}
}
if (epoch_process && (evt_payload->irq_reg_val[1] &
@@ -622,13 +660,6 @@ static int cam_tfe_camif_irq_bottom_half(
CAM_ISP_HW_EVENT_EPOCH, (void *)&evt_info);
}
if (camif_priv->camif_debug & CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
val = cam_io_r(camif_priv->mem_base +
camif_priv->common_reg->diag_sensor_status_0);
CAM_DBG(CAM_ISP, "TFE_DIAG_SENSOR_STATUS: 0x%x",
camif_priv->mem_base, val);
}
return 0;
}
@@ -1770,6 +1801,29 @@ static int cam_tfe_camif_irq_reg_dump(
return rc;
}
int cam_tfe_set_top_debug(struct cam_tfe_hw_core_info *core_info,
void *cmd_args, uint32_t arg_size)
{
struct cam_tfe_top_priv *top_priv;
uint32_t *debug_val;
if (!cmd_args) {
CAM_ERR(CAM_ISP, "Error! Invalid input arguments");
return -EINVAL;
}
top_priv = (struct cam_tfe_top_priv *)core_info->top_priv;
debug_val = (uint32_t *)cmd_args;
top_priv->top_debug = *debug_val;
CAM_DBG(CAM_ISP, "TFE:%d top debug set:%d",
core_info->core_index,
top_priv->top_debug);
return 0;
}
int cam_tfe_top_reserve(void *device_priv,
void *reserve_args, uint32_t arg_size)
{
@@ -1910,6 +1964,7 @@ static int cam_tfe_camif_resource_start(
{
struct cam_tfe_camif_data *rsrc_data;
struct cam_tfe_soc_private *soc_private;
struct cam_tfe_top_priv *top_priv;
uint32_t val = 0;
uint32_t epoch0_irq_mask;
uint32_t epoch1_irq_mask;
@@ -1929,6 +1984,7 @@ static int cam_tfe_camif_resource_start(
rsrc_data = (struct cam_tfe_camif_data *)camif_res->res_priv;
soc_private = rsrc_data->soc_info->soc_private;
top_priv = (struct cam_tfe_top_priv *)core_info->top_priv;
if (!soc_private) {
CAM_ERR(CAM_ISP, "TFE:%d Error soc_private NULL",
@@ -2007,7 +2063,7 @@ static int cam_tfe_camif_resource_start(
rsrc_data->enable_sof_irq_debug = false;
rsrc_data->irq_debug_cnt = 0;
if (rsrc_data->camif_debug & CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
if (top_priv->top_debug & CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
val = cam_io_r_mb(rsrc_data->mem_base +
rsrc_data->common_reg->diag_config);
val |= rsrc_data->reg_data->enable_diagnostic_hw;
@@ -2109,6 +2165,17 @@ int cam_tfe_top_start(struct cam_tfe_hw_core_info *core_info,
rsrc_rdi_data->reg_data->subscribe_irq_mask,
CAM_TFE_TOP_IRQ_REG_NUM, true);
if (top_priv->top_debug &
CAMIF_DEBUG_ENABLE_SENSOR_DIAG_STATUS) {
val = cam_io_r_mb(rsrc_rdi_data->mem_base +
rsrc_rdi_data->common_reg->diag_config);
val |= ((rsrc_rdi_data->reg_data->enable_diagnostic_hw)|
(rsrc_rdi_data->reg_data->diag_sensor_sel <<
rsrc_rdi_data->reg_data->diag_sensor_shift));
cam_io_w_mb(val, rsrc_rdi_data->mem_base +
rsrc_rdi_data->common_reg->diag_config);
}
CAM_DBG(CAM_ISP, "TFE:%d Start RDI %d", core_info->core_index,
in_res->res_id - CAM_ISP_HW_TFE_IN_RDI0);
}
@@ -2762,6 +2829,7 @@ int cam_tfe_process_cmd(void *hw_priv, uint32_t cmd_type,
struct cam_hw_soc_info *soc_info = NULL;
struct cam_tfe_hw_core_info *core_info = NULL;
struct cam_tfe_hw_info *hw_info = NULL;
int rc = 0;
if (!hw_priv) {
@@ -2809,6 +2877,10 @@ int cam_tfe_process_cmd(void *hw_priv, uint32_t cmd_type,
rc = cam_tfe_hw_dump(core_info,
cmd_args, arg_size);
break;
case CAM_ISP_HW_CMD_SET_CAMIF_DEBUG:
rc = cam_tfe_set_top_debug(core_info, cmd_args,
arg_size);
break;
case CAM_ISP_HW_CMD_GET_BUF_UPDATE:
case CAM_ISP_HW_CMD_GET_HFR_UPDATE:
case CAM_ISP_HW_CMD_STRIPE_UPDATE:

7
drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.h
ファイルの表示

@@ -97,6 +97,11 @@ struct cam_tfe_top_reg_offset_common {
uint32_t perf_stall_count;
uint32_t perf_always_count;
uint32_t perf_count_status;
/*reg data */
uint32_t diag_min_hbi_error_shift;
uint32_t diag_neq_hbi_shift;
uint32_t diag_sensor_hbi_mask;
};
struct cam_tfe_camif_reg {
@@ -190,6 +195,8 @@ struct cam_tfe_rdi_reg_data {
uint32_t error_irq_mask2;
uint32_t subscribe_irq_mask[CAM_TFE_TOP_IRQ_REG_NUM];
uint32_t enable_diagnostic_hw;
uint32_t diag_sensor_sel;
uint32_t diag_sensor_shift;
};
struct cam_tfe_clc_hw_status {