Fasr Forward 'origin/video-kernel.lnx.1.0' into video-kernel.lnx.4.0

* origin/video-kernel.lnx.1.0:
  vidoe driver: increase decoder maximum FPS and OR
  video-driver: Add driver support for anorak
  video: driver: release internal buffer as part of start/resume
  video-driver: fix encoder output buffer size
  video: driver: check for drain last flag for decoder only
  video: driver: initial state machine changes
  video: driver: fix use-after-free issues with __read_queue() api

Change-Id: I55bd67dd1f2d6d2025b3fc9840d815589fcfc2fc

Kbuild

@@ -14,6 +14,11 @@ LINUXINCLUDE    += -include $(VIDEO_ROOT)/config/kalama_video.h \
                    -I$(VIDEO_ROOT)/driver/platform/kalama/inc
 endif
 
+ifeq ($(CONFIG_ARCH_ANORAK), y)
+include $(VIDEO_ROOT)/config/anorak_video.conf
+LINUXINCLUDE    += -include $(VIDEO_ROOT)/config/anorak_video.h \
+                   -I$(VIDEO_ROOT)/driver/platform/anorak/inc
+endif
 
 LINUXINCLUDE    += -I$(VIDEO_ROOT)/driver/vidc/inc \
                    -I$(VIDEO_ROOT)/driver/platform/common/inc \
@@ -32,6 +37,10 @@ ifeq ($(CONFIG_MSM_VIDC_KALAMA), y)
 msm_video-objs += driver/platform/kalama/src/msm_vidc_kalama.o
 endif
 
+ifeq ($(CONFIG_MSM_VIDC_ANORAK), y)
+msm_video-objs += driver/platform/anorak/src/msm_vidc_anorak.o
+endif
+
 ifeq ($(CONFIG_MSM_VIDC_IRIS2), y)
 LINUXINCLUDE   += -I$(VIDEO_ROOT)/driver/variant/iris2/inc
 msm_video-objs += driver/variant/iris2/src/msm_vidc_buffer_iris2.o \

config/anorak_video.conf

@@ -0,0 +1,2 @@
+export CONFIG_MSM_VIDC_ANORAK=y
+export CONFIG_MSM_VIDC_IRIS3=y

config/anorak_video.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#define CONFIG_MSM_VIDC_ANORAK   1
+#define CONFIG_MSM_VIDC_IRIS3    1

driver/platform/anorak/inc/msm_vidc_anorak.h

@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef _MSM_VIDC_ANORAK_H_
+#define _MSM_VIDC_ANORAK_H_
+
+#include "msm_vidc_core.h"
+
+#if defined(CONFIG_MSM_VIDC_ANORAK)
+int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev);
+int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev);
+#else
+int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev)
+{
+	return -EINVAL;
+}
+int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev)
+{
+	return -EINVAL;
+}
+#endif
+
+#endif // _MSM_VIDC_ANORAK_H_

driver/platform/anorak/src/msm_vidc_anorak.c

@@ -0,0 +1,2489 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <soc/qcom/of_common.h>
+
+#include "msm_vidc_anorak.h"
+#include "msm_vidc_platform.h"
+#include "msm_vidc_debug.h"
+#include "msm_vidc_internal.h"
+#include "msm_vidc_control.h"
+#include "hfi_property.h"
+#include "msm_vidc_iris3.h"
+#include "hfi_command.h"
+
+#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8020010
+#define MAX_LTR_FRAME_COUNT     2
+#define MAX_BASE_LAYER_PRIORITY_ID 63
+#define MAX_OP_POINT            31
+#define MAX_BITRATE             220000000
+#define DEFAULT_BITRATE         20000000
+#define MINIMUM_FPS             1
+#define MAXIMUM_FPS             480
+#define MAX_QP                  51
+#define DEFAULT_QP              20
+#define MAX_CONSTANT_QUALITY    100
+#define MIN_SLICE_BYTE_SIZE     512
+#define MAX_SLICE_BYTE_SIZE       \
+	((MAX_BITRATE) >> 3)
+#define MAX_SLICE_MB_SIZE         \
+	(((4096 + 15) >> 4) * ((2304 + 15) >> 4))
+
+#define ENC     MSM_VIDC_ENCODER
+#define DEC     MSM_VIDC_DECODER
+#define H264    MSM_VIDC_H264
+#define HEVC    MSM_VIDC_HEVC
+#define VP9     MSM_VIDC_VP9
+#define AV1     MSM_VIDC_AV1
+#define HEIC    MSM_VIDC_HEIC
+#define CODECS_ALL     (H264 | HEVC | VP9 | HEIC | AV1)
+#define MAXIMUM_OVERRIDE_VP9_FPS 180
+
+static struct msm_platform_core_capability core_data_anorak[] = {
+	/* {type, value} */
+	{ENC_CODECS, H264|HEVC|HEIC},
+	{DEC_CODECS, H264|HEVC|VP9|AV1|HEIC},
+	{MAX_SESSION_COUNT, 16},
+	{MAX_NUM_720P_SESSIONS, 16},
+	{MAX_NUM_1080P_SESSIONS, 16},
+	{MAX_NUM_4K_SESSIONS, 8},
+	{MAX_NUM_8K_SESSIONS, 2},
+	{MAX_SECURE_SESSION_COUNT, 3},
+	{MAX_RT_MBPF, 174080},	/* (8192x4352)/256 + (4096x2176)/256*/
+	{MAX_MBPF, 278528}, /* ((8192x4352)/256) * 2 */
+	{MAX_MBPS, 7833600},	/* max_load
+					 * 7680x4320@60fps or 3840x2176@240fps
+					 * which is greater than 4096x2176@120fps,
+					 * 8192x4320@48fps
+					 */
+	{MAX_IMAGE_MBPF, 1048576},  /* (16384x16384)/256 */
+	{MAX_MBPF_HQ, 8160}, /* ((1920x1088)/256) */
+	{MAX_MBPS_HQ, 489600}, /* ((1920x1088)/256)@60fps */
+	{MAX_MBPF_B_FRAME, 32640}, /* 3840x2176/256 */
+	{MAX_MBPS_B_FRAME, 1958400}, /* 3840x2176/256 MBs@60fps */
+	{MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */
+	{MAX_ENH_LAYER_COUNT, 5},
+	{NUM_VPP_PIPE, 4},
+	{SW_PC, 1},
+	{FW_UNLOAD, 0},
+	{HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */
+	{SW_PC_DELAY,         SW_PC_DELAY_VALUE        }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/
+	{FW_UNLOAD_DELAY,     FW_UNLOAD_DELAY_VALUE    }, /* 3000 ms (>SW_PC_DELAY)*/
+	// TODO: review below entries, and if required rename as PREFETCH
+	{PREFIX_BUF_COUNT_PIX, 18},
+	{PREFIX_BUF_SIZE_PIX, 13434880}, /* Calculated by VIDEO_RAW_BUFFER_SIZE for 4096x2160 UBWC */
+	{PREFIX_BUF_COUNT_NON_PIX, 1},
+	{PREFIX_BUF_SIZE_NON_PIX, 209715200}, /*
+		 * Internal buffer size is calculated for secure decode session
+		 * of resolution 4k (4096x2160)
+		 * Internal buf size = calculate_scratch_size() +
+		 *	calculate_scratch1_size() + calculate_persist1_size()
+		 * Take maximum between VP9 10bit, HEVC 10bit, AVC secure
+		 * decoder sessions
+		 */
+	{PAGEFAULT_NON_FATAL, 1},
+	{PAGETABLE_CACHING, 0},
+	{DCVS, 1},
+	{DECODE_BATCH, 1},
+	{DECODE_BATCH_TIMEOUT, 200},
+	{STATS_TIMEOUT_MS, 2000},
+	{AV_SYNC_WINDOW_SIZE, 40},
+	{NON_FATAL_FAULTS, 1},
+	{ENC_AUTO_FRAMERATE, 1},
+	{MMRM, 0},
+};
+
+static struct msm_platform_inst_capability instance_cap_data_anorak[] = {
+	/* {cap, domain, codec,
+	 *      min, max, step_or_mask, value,
+	 *      v4l2_id,
+	 *      hfi_id,
+	 *      flags}
+	 */
+
+	{FRAME_WIDTH, DEC, CODECS_ALL, 96, 8192, 1, 1920},
+
+	{FRAME_WIDTH, DEC, VP9, 96, 4096, 1, 1920},
+
+	{FRAME_WIDTH, ENC, CODECS_ALL, 128, 8192, 1, 1920},
+
+	{FRAME_WIDTH, ENC, HEVC, 96, 8192, 1, 1920},
+
+	{FRAME_WIDTH, ENC, HEIC, 128, 16384, 1, 16384},
+
+	{LOSSLESS_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920},
+
+	{LOSSLESS_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920},
+
+	{SECURE_FRAME_WIDTH, DEC, CODECS_ALL, 96, 4096, 1, 1920},
+
+	{SECURE_FRAME_WIDTH, ENC, CODECS_ALL, 128, 4096, 1, 1920},
+
+	{SECURE_FRAME_WIDTH, ENC, HEVC, 96, 4096, 1, 1920},
+
+	{FRAME_HEIGHT, DEC, CODECS_ALL, 96, 8192, 1, 1080},
+
+	{FRAME_HEIGHT, DEC, VP9, 96, 4096, 1, 1080},
+
+	{FRAME_HEIGHT, ENC, CODECS_ALL, 128, 8192, 1, 1080},
+
+	{FRAME_HEIGHT, ENC, HEVC, 96, 8192, 1, 1080},
+
+	{FRAME_HEIGHT, ENC, HEIC, 128, 16384, 1, 16384},
+
+	{LOSSLESS_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080},
+
+	{LOSSLESS_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080},
+
+	{SECURE_FRAME_HEIGHT, DEC, CODECS_ALL, 96, 4096, 1, 1080},
+
+	{SECURE_FRAME_HEIGHT, ENC, CODECS_ALL, 128, 4096, 1, 1080},
+
+	{SECURE_FRAME_HEIGHT, ENC, HEVC, 96, 4096, 1, 1080},
+
+	{PIX_FMTS, ENC|DEC, H264,
+		MSM_VIDC_FMT_NV12,
+		MSM_VIDC_FMT_NV12C,
+		MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C,
+		MSM_VIDC_FMT_NV12C},
+
+	{PIX_FMTS, ENC|DEC, HEVC|VP9|AV1,
+		MSM_VIDC_FMT_NV12,
+		MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C |
+		MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12C},
+
+	{PIX_FMTS, ENC, HEIC,
+		MSM_VIDC_FMT_NV12,
+		MSM_VIDC_FMT_P010,
+		MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010,
+		MSM_VIDC_FMT_NV12},
+
+	{PIX_FMTS, DEC, HEIC,
+		MSM_VIDC_FMT_NV12,
+		MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C |
+		MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12C},
+
+	{MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4,
+		V4L2_CID_MIN_BUFFERS_FOR_OUTPUT},
+
+	{MIN_BUFFERS_INPUT, ENC|DEC, HEIC, 0, 64, 1, 1,
+		V4L2_CID_MIN_BUFFERS_FOR_OUTPUT},
+
+	{MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL,
+		0, 64, 1, 4,
+		V4L2_CID_MIN_BUFFERS_FOR_CAPTURE,
+		HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT,
+		CAP_FLAG_OUTPUT_PORT},
+
+	/* (8192 * 4320) / 256 */
+	{MBPF, ENC, CODECS_ALL, 64, 138240, 1, 138240},
+
+	{MBPF, ENC, HEVC, 36, 138240, 1, 138240},
+
+	/* ((16384x16384)/256) */
+	{MBPF, ENC, HEIC, 36, 1048576, 1, 1048576},
+
+	{MBPF, DEC, CODECS_ALL, 36, 138240, 1, 138240},
+
+	/* (4096 * 2304) / 256 */
+	{MBPF, DEC, VP9, 36, 36864, 1, 36864},
+
+	/* ((8192x8192)/256) */
+	{MBPF, DEC, HEIC, 64, 262144,  1, 262144 },
+
+	/* (4096 * 2304) / 256 */
+	{LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864},
+
+	/* Batch Mode Decode */
+	/* TODO: update with new values based on updated voltage corner */
+	{BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816},
+
+	/* (4096 * 2304) / 256 */
+	{BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120},
+
+	{SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864},
+
+	{SECURE_MBPF, ENC, HEVC, 36, 36864, 1, 36864},
+
+	/* ((1920 * 1088) / 256) * 480 fps */
+	{MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800},
+
+	{MBPS, ENC, HEVC, 36, 3916800, 1, 3916800},
+
+	/* ((16384x16384)/256)@1fps */
+	{MBPS, ENC, HEIC, 36, 1048576, 1, 1048576},
+
+	/* ((3840 * 2176) / 256) * 240 fps */
+	{MBPS, DEC, CODECS_ALL, 64, 7833600, 1, 7833600},
+
+	/* ((4096 * 2304) / 256) * 120 */
+	{MBPS, DEC, VP9, 36, 4423680, 1, 4423680},
+
+	/* ((8192x8192)/256)@1fps */
+	{MBPS, DEC, HEIC, 64, 262144,  1, 262144 },
+
+	/* ((4096 * 2304) / 256) * 60 fps */
+	{POWER_SAVE_MBPS, ENC, CODECS_ALL, 0, 2211840, 1, 2211840},
+
+	/* Enable check mbps for encoder */
+	{CHECK_MBPS, ENC, CODECS_ALL, 0, 1, 1, 1},
+
+	/* Disable check mbps for encoder */
+	{CHECK_MBPS, DEC, CODECS_ALL, 0, 1, 1, 0},
+
+	{FRAME_RATE, ENC, CODECS_ALL,
+		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		1, (DEFAULT_FPS << 16),
+		0,
+		HFI_PROP_FRAME_RATE,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{FRAME_RATE, ENC, HEIC,
+		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		1, (MINIMUM_FPS << 16),
+		0,
+		HFI_PROP_FRAME_RATE,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{FRAME_RATE, DEC, CODECS_ALL,
+		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		1, (DEFAULT_FPS << 16),
+		V4L2_CID_MPEG_VIDC_FRAME_RATE,
+		0,
+		CAP_FLAG_OUTPUT_PORT |
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{FRAME_RATE, DEC, VP9,
+		(MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16),
+		1, (DEFAULT_FPS << 16),
+		V4L2_CID_MPEG_VIDC_FRAME_RATE,
+		0,
+		CAP_FLAG_OUTPUT_PORT |
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{OPERATING_RATE, ENC, CODECS_ALL,
+		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		1, (DEFAULT_FPS << 16)},
+
+	{OPERATING_RATE, DEC, CODECS_ALL,
+		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		1, (DEFAULT_FPS << 16),
+		V4L2_CID_MPEG_VIDC_OPERATING_RATE,
+		0,
+		CAP_FLAG_OUTPUT_PORT |
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{OPERATING_RATE, DEC, VP9,
+		(MINIMUM_FPS << 16), (MAXIMUM_OVERRIDE_VP9_FPS << 16),
+		1, (DEFAULT_FPS << 16),
+		V4L2_CID_MPEG_VIDC_OPERATING_RATE,
+		0,
+		CAP_FLAG_OUTPUT_PORT |
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{INPUT_RATE, ENC|DEC, CODECS_ALL,
+		(MINIMUM_FPS << 16), INT_MAX,
+		1, (DEFAULT_FPS << 16)},
+
+	{TIMESTAMP_RATE, ENC|DEC, CODECS_ALL,
+		(MINIMUM_FPS << 16), INT_MAX,
+		1, (DEFAULT_FPS << 16)},
+
+	{SCALE_FACTOR, ENC, H264|HEVC, 1, 8, 1, 8},
+
+	{MB_CYCLES_VSP, ENC, CODECS_ALL, 25, 25, 1, 25},
+
+	{MB_CYCLES_VSP, DEC, CODECS_ALL, 25, 25, 1, 25},
+
+	{MB_CYCLES_VSP, DEC, VP9|AV1, 60, 60, 1, 60},
+
+	{MB_CYCLES_VPP, ENC, CODECS_ALL, 675, 675, 1, 675},
+
+	{MB_CYCLES_VPP, DEC, CODECS_ALL, 200, 200, 1, 200},
+
+	{MB_CYCLES_LP, ENC, CODECS_ALL, 320, 320, 1, 320},
+
+	{MB_CYCLES_LP, DEC, CODECS_ALL, 200, 200, 1, 200},
+
+	{MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 489583, 489583, 1, 489583},
+
+	{MB_CYCLES_FW_VPP, ENC, CODECS_ALL, 48405, 48405, 1, 48405},
+
+	{MB_CYCLES_FW_VPP, DEC, CODECS_ALL, 66234, 66234, 1, 66234},
+
+	{CLIENT_ID, ENC|DEC, CODECS_ALL,
+		INVALID_CLIENT_ID, INT_MAX, 1, INVALID_CLIENT_ID,
+		V4L2_CID_MPEG_VIDC_CLIENT_ID},
+
+	{SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_SECURE,
+		HFI_PROP_SECURE,
+		CAP_FLAG_NONE},
+
+	/*
+	 * Client will enable V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE
+	 * to get fence_id in input metadata buffer done.
+	 */
+	{META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_OUTBUF_FENCE,
+		HFI_PROP_FENCE,
+		CAP_FLAG_BITMASK},
+
+	/*
+	 * Client to do set_ctrl with FENCE_ID to set fence_id
+	 * and then client will do get_ctrl with FENCE_FD to get
+	 * fence_fd corresponding to client set fence_id.
+	 */
+	{FENCE_ID, DEC, CODECS_ALL,
+		0, INT_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_SW_FENCE_ID,
+		0,
+		CAP_FLAG_DYNAMIC_ALLOWED | CAP_FLAG_OUTPUT_PORT},
+
+	{FENCE_FD, DEC, CODECS_ALL,
+		INVALID_FD, INT_MAX, 1, INVALID_FD,
+		V4L2_CID_MPEG_VIDC_SW_FENCE_FD},
+
+	{TS_REORDER, DEC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_TS_REORDER},
+
+	{HFLIP, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_HFLIP,
+		HFI_PROP_FLIP,
+		CAP_FLAG_OUTPUT_PORT |
+			CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{VFLIP, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_VFLIP,
+		HFI_PROP_FLIP,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{ROTATION, ENC, CODECS_ALL,
+		0, 270, 90, 0,
+		V4L2_CID_ROTATE,
+		HFI_PROP_ROTATION,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{SUPER_FRAME, ENC, H264|HEVC,
+		0, 32, 1, 0,
+		V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
+		CAP_FLAG_NONE},
+
+	{SLICE_INTERFACE, DEC, CODECS_ALL,
+		0, 0, 0, 0,
+		V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE,
+		0},
+
+	{HEADER_MODE, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
+		V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
+		BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) |
+		BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME),
+		V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
+		V4L2_CID_MPEG_VIDEO_HEADER_MODE,
+		HFI_PROP_SEQ_HEADER_MODE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{PREPEND_SPSPPS_TO_IDR, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR},
+
+	{WITHOUT_STARTCODE, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+		HFI_PROP_NAL_LENGTH_FIELD,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{WITHOUT_STARTCODE, DEC, AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
+		HFI_PROP_NAL_LENGTH_FIELD,
+		CAP_FLAG_INPUT_PORT},
+
+	{NAL_LENGTH_FIELD, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+		V4L2_MPEG_VIDEO_HEVC_SIZE_4,
+		BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_0) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_SIZE_4),
+		V4L2_MPEG_VIDEO_HEVC_SIZE_0,
+		V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD,
+		HFI_PROP_NAL_LENGTH_FIELD,
+		CAP_FLAG_MENU | CAP_FLAG_OUTPUT_PORT},
+
+	/* TODO: Firmware introduced enumeration type for this
+	 * with and without seq header.
+	 */
+	{REQUEST_I_FRAME, ENC, H264|HEVC,
+		0, 0, 0, 0,
+		V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME,
+		HFI_PROP_REQUEST_SYNC_FRAME,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	/* Enc: Keeping CABAC and CAVLC as same bitrate.
+	 * Dec: there's no use of Bitrate cap
+	 */
+	{BIT_RATE, ENC, H264|HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_BITRATE,
+		HFI_PROP_TOTAL_BITRATE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{BITRATE_MODE, ENC, H264,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR),
+		V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
+		V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
+		HFI_PROP_RATE_CONTROL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{BITRATE_MODE, ENC, HEVC,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_CQ,
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) |
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ),
+		V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
+		V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
+		HFI_PROP_RATE_CONTROL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{BITRATE_MODE, ENC, HEIC,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_CQ,
+		V4L2_MPEG_VIDEO_BITRATE_MODE_CQ,
+		BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CQ),
+		V4L2_MPEG_VIDEO_BITRATE_MODE_CQ,
+		V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
+		HFI_PROP_RATE_CONTROL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{CABAC_MAX_BITRATE, ENC, H264|HEVC, 0,
+		160000000, 1, 160000000},
+
+	{CAVLC_MAX_BITRATE, ENC, H264, 0,
+		220000000, 1, 220000000},
+
+	{ALLINTRA_MAX_BITRATE, ENC, H264|HEVC, 0,
+		220000000, 1, 220000000},
+
+	{LOWLATENCY_MAX_BITRATE, ENC, H264|HEVC, 0,
+		70000000, 1, 70000000},
+
+	{LOSSLESS, ENC, HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU},
+
+	{FRAME_SKIP_MODE, ENC, H264|HEVC|HEIC,
+		V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
+		V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
+		BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) |
+		BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) |
+		BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT),
+		V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
+		V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE,
+		0,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{FRAME_RC_ENABLE, ENC, H264|HEVC|HEIC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE},
+
+	{CONSTANT_QUALITY, ENC, HEVC,
+		1, MAX_CONSTANT_QUALITY, 1, 90,
+		V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY,
+		HFI_PROP_CONSTANT_QUALITY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{CONSTANT_QUALITY, ENC, HEIC,
+		1, MAX_CONSTANT_QUALITY, 1, 100,
+		V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY,
+		HFI_PROP_CONSTANT_QUALITY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{GOP_SIZE, ENC, CODECS_ALL,
+		0, INT_MAX, 1, 2 * DEFAULT_FPS - 1,
+		V4L2_CID_MPEG_VIDEO_GOP_SIZE,
+		HFI_PROP_MAX_GOP_FRAMES,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{GOP_SIZE, ENC, HEIC,
+		0, INT_MAX, 1, 0 /* all intra */,
+		V4L2_CID_MPEG_VIDEO_GOP_SIZE,
+		HFI_PROP_MAX_GOP_FRAMES,
+		CAP_FLAG_OUTPUT_PORT |
+			CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{GOP_CLOSURE, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
+		0},
+
+	{B_FRAME, ENC, H264|HEVC,
+		0, 7, 1, 0,
+		V4L2_CID_MPEG_VIDEO_B_FRAMES,
+		HFI_PROP_MAX_B_FRAMES,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{B_FRAME, ENC, HEIC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_B_FRAMES,
+		HFI_PROP_MAX_B_FRAMES,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{BLUR_TYPES, ENC, H264|HEVC,
+		VIDC_BLUR_NONE, VIDC_BLUR_EXTERNAL,
+		BIT(VIDC_BLUR_NONE) | BIT(VIDC_BLUR_EXTERNAL),
+		VIDC_BLUR_NONE,
+		V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES,
+		HFI_PROP_BLUR_TYPES,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{BLUR_RESOLUTION, ENC, H264|HEVC,
+		0, S32_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION,
+		HFI_PROP_BLUR_RESOLUTION,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+		CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{CSC, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_CSC},
+
+	{CSC_CUSTOM_MATRIX, ENC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_CUSTOM_MATRIX,
+		HFI_PROP_CSC_MATRIX,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{LOWLATENCY_MODE, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST,
+		0,
+		CAP_FLAG_NONE},
+
+	{LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST,
+		HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME,
+		CAP_FLAG_INPUT_PORT},
+
+	{LTR_COUNT, ENC, H264|HEVC,
+		0, 2, 1, 0,
+		V4L2_CID_MPEG_VIDEO_LTR_COUNT,
+		HFI_PROP_LTR_COUNT,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{USE_LTR, ENC, H264|HEVC,
+		INVALID_DEFAULT_MARK_OR_USE_LTR,
+		((1 << MAX_LTR_FRAME_COUNT) - 1),
+		1, INVALID_DEFAULT_MARK_OR_USE_LTR,
+		V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES,
+		HFI_PROP_LTR_USE,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{MARK_LTR, ENC, H264|HEVC,
+		INVALID_DEFAULT_MARK_OR_USE_LTR,
+		(MAX_LTR_FRAME_COUNT - 1),
+		1, INVALID_DEFAULT_MARK_OR_USE_LTR,
+		V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX,
+		HFI_PROP_LTR_MARK,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{BASELAYER_PRIORITY, ENC, H264,
+		0, MAX_BASE_LAYER_PRIORITY_ID, 1, 0,
+		V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID,
+		HFI_PROP_BASELAYER_PRIORITYID,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{IR_TYPE, ENC, H264|HEVC,
+		V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM,
+		V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC,
+		BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM) |
+		BIT(V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_CYCLIC),
+		V4L2_MPEG_VIDEO_VIDC_INTRA_REFRESH_RANDOM,
+		V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE,
+		0,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{IR_PERIOD, ENC, H264|HEVC,
+		0, INT_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_INTRA_REFRESH_PERIOD,
+		0,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_OUTPUT_PORT |
+		CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{AU_DELIMITER, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_AU_DELIMITER,
+		HFI_PROP_AUD,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{TIME_DELTA_BASED_RC, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC,
+		HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{TIME_DELTA_BASED_RC, ENC, HEIC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_TIME_DELTA_BASED_RC,
+		HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDC_CONTENT_ADAPTIVE_CODING,
+		HFI_PROP_CONTENT_ADAPTIVE_CODING,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{REQUEST_PREPROCESS, ENC, H264|HEVC,
+		MSM_VIDC_PREPROCESS_NONE,
+		MSM_VIDC_PREPROCESS_TYPE0,
+		BIT(MSM_VIDC_PREPROCESS_NONE) |
+		BIT(MSM_VIDC_PREPROCESS_TYPE0),
+		MSM_VIDC_PREPROCESS_NONE,
+		0, HFI_PROP_REQUEST_PREPROCESS,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{BITRATE_BOOST, ENC, H264|HEVC,
+		0, MAX_BITRATE_BOOST, 25, MAX_BITRATE_BOOST,
+		V4L2_CID_MPEG_VIDC_QUALITY_BITRATE_BOOST,
+		HFI_PROP_BITRATE_BOOST,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{MIN_QUALITY, ENC, H264|HEVC,
+		0, MAX_SUPPORTED_MIN_QUALITY, 70, MAX_SUPPORTED_MIN_QUALITY,
+		0,
+		HFI_PROP_MAINTAIN_MIN_QUALITY,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{VBV_DELAY, ENC, H264|HEVC,
+		200, 300, 100, 300,
+		V4L2_CID_MPEG_VIDEO_VBV_DELAY,
+		HFI_PROP_VBV_DELAY,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{PEAK_BITRATE, ENC, H264|HEVC,
+		/* default peak bitrate is 10% larger than avg bitrate */
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
+		HFI_PROP_TOTAL_PEAK_BITRATE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{MIN_FRAME_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT,
+		V4L2_CID_MPEG_VIDEO_H264_MIN_QP,
+		HFI_PROP_MIN_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{MIN_FRAME_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT,
+		V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP,
+		HFI_PROP_MIN_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{I_FRAME_MIN_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT,
+		V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP},
+
+	{I_FRAME_MIN_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT,
+		V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP},
+
+	{P_FRAME_MIN_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT,
+		V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP},
+
+	{P_FRAME_MIN_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT,
+		V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP},
+
+	{B_FRAME_MIN_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MIN_QP_8BIT,
+		V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP},
+
+	{B_FRAME_MIN_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MIN_QP_10BIT,
+		V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP},
+
+	{MAX_FRAME_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_H264_MAX_QP,
+		HFI_PROP_MAX_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{MAX_FRAME_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP,
+		HFI_PROP_MAX_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{I_FRAME_MAX_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP},
+
+	{I_FRAME_MAX_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP},
+
+	{P_FRAME_MAX_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP},
+
+	{P_FRAME_MAX_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP},
+
+	{B_FRAME_MAX_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP},
+
+	{B_FRAME_MAX_QP, ENC, HEVC|HEIC,
+		MIN_QP_10BIT, MAX_QP, 1, MAX_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP},
+
+	{I_FRAME_QP, ENC, HEVC,
+		MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{I_FRAME_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{P_FRAME_QP, ENC, HEVC,
+		MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{P_FRAME_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{B_FRAME_QP, ENC, HEVC,
+		MIN_QP_10BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{B_FRAME_QP, ENC, H264,
+		MIN_QP_8BIT, MAX_QP, 1, DEFAULT_QP,
+		V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP,
+		HFI_PROP_QP_PACKED,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{LAYER_TYPE, ENC, HEVC,
+		V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B,
+		V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+		BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P),
+		V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE,
+		HFI_PROP_LAYER_ENCODING_TYPE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LAYER_TYPE, ENC, H264,
+		V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B,
+		V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
+		BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) |
+		BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P),
+		V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
+		V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE,
+		HFI_PROP_LAYER_ENCODING_TYPE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LAYER_ENABLE, ENC, H264,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING,
+		HFI_PROP_LAYER_ENCODING_TYPE,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{LAYER_ENABLE, ENC, HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		0,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{ENH_LAYER_COUNT, ENC, HEVC,
+		0, 5, 1, 0,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER,
+		HFI_PROP_LAYER_COUNT,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{ENH_LAYER_COUNT, ENC, H264,
+		0, 5, 1, 0,
+		V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER,
+		HFI_PROP_LAYER_COUNT,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{ENH_LAYER_COUNT, DEC, AV1,
+		0, MAX_OP_POINT, 1, 0,
+		0,
+		HFI_PROP_AV1_OP_POINT,
+		CAP_FLAG_INPUT_PORT},
+
+	{L0_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR,
+		HFI_PROP_BITRATE_LAYER1,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L0_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR,
+		HFI_PROP_BITRATE_LAYER1,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L1_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR,
+		HFI_PROP_BITRATE_LAYER2,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L1_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR,
+		HFI_PROP_BITRATE_LAYER2,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L2_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR,
+		HFI_PROP_BITRATE_LAYER3,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L2_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR,
+		HFI_PROP_BITRATE_LAYER3,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L3_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR,
+		HFI_PROP_BITRATE_LAYER4,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+	{L3_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR,
+		HFI_PROP_BITRATE_LAYER4,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L4_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR,
+		HFI_PROP_BITRATE_LAYER5,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L4_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR,
+		HFI_PROP_BITRATE_LAYER5,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L5_BR, ENC, H264,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR,
+		HFI_PROP_BITRATE_LAYER6,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{L5_BR, ENC, HEVC,
+		1, MAX_BITRATE, 1, DEFAULT_BITRATE,
+		V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR,
+		HFI_PROP_BITRATE_LAYER6,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
+			CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{ENTROPY_MODE, ENC, H264,
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
+		BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
+		BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC),
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
+		V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE,
+		HFI_PROP_CABAC_SESSION,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
+		BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
+		BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC),
+		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
+		0,
+		HFI_PROP_CABAC_SESSION},
+
+	{PROFILE, ENC|DEC, H264,
+		V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
+		V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH,
+		BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
+		BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) |
+		BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
+		BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
+		BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH),
+		V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
+		V4L2_CID_MPEG_VIDEO_H264_PROFILE,
+		HFI_PROP_PROFILE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{PROFILE, ENC|DEC, HEVC|HEIC,
+		V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+		V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE,
+		BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10_STILL_PICTURE),
+		V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+		V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+		HFI_PROP_PROFILE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{PROFILE, DEC, VP9,
+		V4L2_MPEG_VIDEO_VP9_PROFILE_0,
+		V4L2_MPEG_VIDEO_VP9_PROFILE_2,
+		BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2),
+		V4L2_MPEG_VIDEO_VP9_PROFILE_0,
+		V4L2_CID_MPEG_VIDEO_VP9_PROFILE,
+		HFI_PROP_PROFILE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{PROFILE, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN),
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		V4L2_CID_MPEG_VIDEO_AV1_PROFILE,
+		HFI_PROP_PROFILE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, ENC, H264,
+		V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
+		V4L2_MPEG_VIDEO_H264_LEVEL_6_0,
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0),
+		V4L2_MPEG_VIDEO_H264_LEVEL_5_0,
+		V4L2_CID_MPEG_VIDEO_H264_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, ENC, HEVC|HEIC,
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_6,
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6),
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_5,
+		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, DEC, H264,
+		V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
+		V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) |
+		BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2),
+		V4L2_MPEG_VIDEO_H264_LEVEL_6_1,
+		V4L2_CID_MPEG_VIDEO_H264_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, DEC, HEVC|HEIC,
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)|
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
+		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
+		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, DEC, VP9,
+		V4L2_MPEG_VIDEO_VP9_LEVEL_1_0,
+		V4L2_MPEG_VIDEO_VP9_LEVEL_6_0,
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0),
+		V4L2_MPEG_VIDEO_VP9_LEVEL_6_0,
+		V4L2_CID_MPEG_VIDEO_VP9_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LEVEL, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_LEVEL_2_0,
+		V4L2_MPEG_VIDEO_AV1_LEVEL_6_1,
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1),
+		V4L2_MPEG_VIDEO_AV1_LEVEL_6_1,
+		V4L2_CID_MPEG_VIDEO_AV1_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{AV1_TIER, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_TIER_MAIN,
+		V4L2_MPEG_VIDEO_AV1_TIER_HIGH,
+		BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) |
+		BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH),
+		V4L2_MPEG_VIDEO_AV1_TIER_HIGH,
+		V4L2_CID_MPEG_VIDEO_AV1_TIER,
+		HFI_PROP_TIER,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{HEVC_TIER, ENC|DEC, HEVC,
+		V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+		V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
+		BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH),
+		V4L2_MPEG_VIDEO_HEVC_TIER_HIGH,
+		V4L2_CID_MPEG_VIDEO_HEVC_TIER,
+		HFI_PROP_TIER,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{HEVC_TIER, ENC|DEC, HEIC,
+		V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+		V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+		BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN),
+		V4L2_MPEG_VIDEO_HEVC_TIER_MAIN,
+		V4L2_CID_MPEG_VIDEO_HEVC_TIER,
+		HFI_PROP_TIER,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LF_MODE, ENC, H264,
+		V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
+		DB_H264_DISABLE_SLICE_BOUNDARY,
+		BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED) |
+		BIT(V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED) |
+		BIT(DB_H264_DISABLE_SLICE_BOUNDARY),
+		V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
+		V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
+		HFI_PROP_DEBLOCKING_MODE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LF_MODE, ENC, HEVC|HEIC,
+		V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED,
+		DB_HEVC_DISABLE_SLICE_BOUNDARY,
+		BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED) |
+		BIT(V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED) |
+		BIT(DB_HEVC_DISABLE_SLICE_BOUNDARY),
+		V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED,
+		V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE,
+		HFI_PROP_DEBLOCKING_MODE,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{LF_ALPHA, ENC, H264,
+		-6, 6, 1, 0,
+		V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA},
+
+	{LF_ALPHA, ENC, HEVC|HEIC,
+		-6, 6, 1, 0,
+		V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2},
+
+	{LF_BETA, ENC, H264,
+		-6, 6, 1, 0,
+		V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA},
+
+	{LF_BETA, ENC, HEVC|HEIC,
+		-6, 6, 1, 0,
+		V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2},
+
+	{SLICE_MODE, ENC, H264|HEVC,
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES,
+		BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE) |
+		BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) |
+		BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES),
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
+		V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
+		0,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{SLICE_MODE, ENC, HEIC,
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
+		BIT(V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE),
+		V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
+		V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
+		0,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{SLICE_MAX_BYTES, ENC, H264|HEVC,
+		MIN_SLICE_BYTE_SIZE, MAX_SLICE_BYTE_SIZE,
+		1, MIN_SLICE_BYTE_SIZE,
+		V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES,
+		HFI_PROP_MULTI_SLICE_BYTES_COUNT,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{SLICE_MAX_MB, ENC, H264|HEVC,
+		1, MAX_SLICE_MB_SIZE, 1, 1,
+		V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB,
+		HFI_PROP_MULTI_SLICE_MB_COUNT,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{MB_RC, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE,
+		0,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{TRANSFORM_8X8, ENC, H264,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM,
+		HFI_PROP_8X8_TRANSFORM,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{CHROMA_QP_INDEX_OFFSET, ENC, HEVC,
+		MIN_CHROMA_QP_OFFSET, MAX_CHROMA_QP_OFFSET,
+		1, MAX_CHROMA_QP_OFFSET,
+		V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET,
+		HFI_PROP_CHROMA_QP_OFFSET,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
+		HFI_PROP_DECODE_ORDER_OUTPUT,
+		CAP_FLAG_INPUT_PORT},
+
+	{DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1,
+		0, 1, 1, 0,
+		V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
+		HFI_PROP_DECODE_ORDER_OUTPUT,
+		CAP_FLAG_INPUT_PORT},
+
+	{OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_DECODE_ORDER_OUTPUT,
+		CAP_FLAG_INPUT_PORT},
+
+	{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
+		DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
+		1, DEFAULT_MAX_HOST_BUF_COUNT,
+		0,
+		HFI_PROP_BUFFER_HOST_MAX_COUNT,
+		CAP_FLAG_INPUT_PORT},
+
+	{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
+		DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
+		1, DEFAULT_MAX_HOST_BUF_COUNT,
+		0,
+		HFI_PROP_BUFFER_HOST_MAX_COUNT,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
+		DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
+		V4L2_CID_MPEG_VIDEO_MUTE_YUV,
+		HFI_PROP_CONCEAL_COLOR_8BIT,
+		CAP_FLAG_INPUT_PORT},
+
+	{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
+		DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
+		V4L2_CID_MPEG_VIDEO_MUTE_YUV,
+		HFI_PROP_CONCEAL_COLOR_10BIT,
+		CAP_FLAG_INPUT_PORT},
+
+	{STAGE, DEC|ENC, CODECS_ALL,
+		MSM_VIDC_STAGE_1,
+		MSM_VIDC_STAGE_2, 1,
+		MSM_VIDC_STAGE_2,
+		0,
+		HFI_PROP_STAGE},
+
+	{PIPE, DEC|ENC, CODECS_ALL,
+		MSM_VIDC_PIPE_1,
+		MSM_VIDC_PIPE_4, 1,
+		MSM_VIDC_PIPE_4,
+		0,
+		HFI_PROP_PIPE},
+
+	{POC, DEC, H264, 0, 2, 1, 1,
+		0,
+		HFI_PROP_PIC_ORDER_CNT_TYPE},
+
+	{QUALITY_MODE, ENC, CODECS_ALL,
+		MSM_VIDC_MAX_QUALITY_MODE,
+		MSM_VIDC_POWER_SAVE_MODE, 1,
+		MSM_VIDC_POWER_SAVE_MODE},
+
+	{CODED_FRAMES, DEC, H264|HEVC|HEIC,
+		CODED_FRAMES_PROGRESSIVE, CODED_FRAMES_INTERLACE,
+		1, CODED_FRAMES_PROGRESSIVE,
+		0,
+		HFI_PROP_CODED_FRAMES},
+
+	{BIT_DEPTH, DEC, CODECS_ALL, BIT_DEPTH_8, BIT_DEPTH_10, 1, BIT_DEPTH_8,
+		0,
+		HFI_PROP_LUMA_CHROMA_BIT_DEPTH},
+
+	{CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0,
+		V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0,
+		CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{BITSTREAM_SIZE_OVERWRITE, DEC, CODECS_ALL, 0, INT_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE},
+
+	{THUMBNAIL_MODE, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
+		HFI_PROP_THUMBNAIL_MODE,
+		CAP_FLAG_INPUT_PORT},
+
+	{DEFAULT_HEADER, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_DEC_DEFAULT_HEADER},
+
+	{RAP_FRAME, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		0,
+		HFI_PROP_DEC_START_FROM_RAP_FRAME,
+		CAP_FLAG_INPUT_PORT},
+
+	{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		0,
+		HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{PRIORITY, DEC|ENC, CODECS_ALL,
+		0, 1 + NRT_PRIORITY_OFFSET, 1, 1 + NRT_PRIORITY_OFFSET,
+		V4L2_CID_MPEG_VIDC_PRIORITY,
+		HFI_PROP_SESSION_PRIORITY,
+		CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL,
+		1, 1, 1, 1},
+
+	{CRITICAL_PRIORITY, ENC, CODECS_ALL,
+		0, 1, 1, 0,
+		V4L2_CID_MPEG_VIDC_CRITICAL_PRIORITY},
+
+	{RESERVE_DURATION, ENC, CODECS_ALL,
+		0, INT_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_RESERVE_DURATION,
+		HFI_CMD_RESERVE,
+		CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{ENC_IP_CR, ENC, CODECS_ALL,
+		0, S32_MAX, 1, 0,
+		V4L2_CID_MPEG_VIDC_ENC_INPUT_COMPRESSION_RATIO,
+		0, CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{DPB_LIST, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_DPB_LIST,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{FILM_GRAIN, DEC, AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_AV1D_FILM_GRAIN_PRESENT,
+		HFI_PROP_AV1_FILM_GRAIN_PRESENT},
+
+	{SUPER_BLOCK, DEC, AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_AV1_SUPER_BLOCK_ENABLED},
+
+	{DRAP, DEC, AV1,
+		0, S32_MAX, 1, 0,
+		0,
+		HFI_PROP_AV1_DRAP_CONFIG,
+		CAP_FLAG_INPUT_PORT},
+
+	{META_BITSTREAM_RESOLUTION, DEC, AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_BITSTREAM_RESOLUTION,
+		HFI_PROP_BITSTREAM_RESOLUTION,
+		CAP_FLAG_BITMASK},
+
+	{META_CROP_OFFSETS, DEC, AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_CROP_OFFSETS,
+		HFI_PROP_CROP_OFFSETS,
+		CAP_FLAG_BITMASK},
+
+	{ALL_INTRA, ENC, H264|HEVC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		0,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{INPUT_METADATA_FD, ENC|DEC, CODECS_ALL,
+		INVALID_FD, INT_MAX, 1, INVALID_FD,
+		V4L2_CID_MPEG_VIDC_INPUT_METADATA_FD,
+		0,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
+
+	{INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_INPUT_METADATA_VIA_REQUEST_ENABLE,
+		0,
+		CAP_FLAG_INPUT_PORT},
+
+	{META_LTR_MARK_USE, ENC, H264|HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_LTR_MARK_USE_DETAILS,
+		HFI_PROP_LTR_MARK_USE_DETAILS,
+		CAP_FLAG_BITMASK},
+
+	{META_SEQ_HDR_NAL, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SEQ_HEADER_NAL,
+		HFI_PROP_METADATA_SEQ_HEADER_NAL,
+		CAP_FLAG_BITMASK},
+
+	{META_DPB_MISR, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_DPB_LUMA_CHROMA_MISR,
+		HFI_PROP_DPB_LUMA_CHROMA_MISR,
+		CAP_FLAG_BITMASK},
+
+	{META_OPB_MISR, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_OPB_LUMA_CHROMA_MISR,
+		HFI_PROP_OPB_LUMA_CHROMA_MISR,
+		CAP_FLAG_BITMASK},
+
+	{META_INTERLACE, DEC, H264,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_INTERLACE,
+		HFI_PROP_INTERLACE_INFO,
+		CAP_FLAG_BITMASK},
+
+	{META_TIMESTAMP, DEC | ENC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_TIMESTAMP,
+		HFI_PROP_TIMESTAMP,
+		CAP_FLAG_BITMASK},
+
+	{META_CONCEALED_MB_CNT, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_CONCEALED_MB_COUNT,
+		HFI_PROP_CONEALED_MB_COUNT,
+		CAP_FLAG_BITMASK},
+
+	{META_HIST_INFO, DEC, HEVC|AV1|VP9,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO,
+		HFI_PROP_HISTOGRAM_INFO,
+		CAP_FLAG_BITMASK},
+
+	{META_TRANSCODING_STAT_INFO, DEC, HEVC|H264,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO,
+		HFI_PROP_TRANSCODING_STAT_INFO,
+		CAP_FLAG_BITMASK},
+
+	{META_TRANSCODING_STAT_INFO, ENC, HEVC|H264,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_TRANSCODE_STAT_INFO,
+		HFI_PROP_TRANSCODING_STAT_INFO,
+		CAP_FLAG_BITMASK},
+
+	{META_PICTURE_TYPE, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE,
+		HFI_PROP_PICTURE_TYPE,
+		CAP_FLAG_BITMASK},
+
+	{META_SEI_MASTERING_DISP, ENC, HEVC|HEIC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR,
+		HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR,
+		CAP_FLAG_BITMASK},
+
+	{META_SEI_MASTERING_DISP, DEC, HEVC|HEIC|AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR,
+		HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR,
+		CAP_FLAG_BITMASK},
+
+	{META_SEI_CLL, ENC, HEVC|HEIC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL,
+		HFI_PROP_SEI_CONTENT_LIGHT_LEVEL,
+		CAP_FLAG_BITMASK},
+
+	{META_SEI_CLL, DEC, HEVC|HEIC|AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL,
+		HFI_PROP_SEI_CONTENT_LIGHT_LEVEL,
+		CAP_FLAG_BITMASK},
+
+	{META_HDR10PLUS, ENC, HEVC|HEIC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS,
+		HFI_PROP_SEI_HDR10PLUS_USERDATA,
+		CAP_FLAG_BITMASK},
+
+	{META_HDR10PLUS, DEC, HEVC|HEIC|AV1,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS,
+		HFI_PROP_SEI_HDR10PLUS_USERDATA,
+		CAP_FLAG_BITMASK},
+
+	{META_DOLBY_RPU, ENC, HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU,
+		HFI_PROP_DOLBY_RPU_METADATA,
+		CAP_FLAG_BITMASK},
+
+	{META_DOLBY_RPU, DEC, H264|HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_DOLBY_RPU,
+		HFI_PROP_DOLBY_RPU_METADATA,
+		CAP_FLAG_BITMASK},
+
+	{META_EVA_STATS, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_EVA_STATS,
+		HFI_PROP_EVA_STAT_INFO,
+		CAP_FLAG_BITMASK},
+
+	{META_BUF_TAG, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG,
+		HFI_PROP_BUFFER_TAG,
+		CAP_FLAG_BITMASK},
+
+	/*
+	 * when fence enabled, client needs output buffer_tag
+	 * in input metadata buffer done.
+	 */
+	{META_BUF_TAG, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT |
+			V4L2_MPEG_VIDC_META_TX_OUTPUT | V4L2_MPEG_VIDC_META_RX_INPUT |
+			V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_BUFFER_TAG,
+		HFI_PROP_BUFFER_TAG,
+		CAP_FLAG_BITMASK},
+
+	{META_DPB_TAG_LIST, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_DPB_TAG_LIST,
+		HFI_PROP_DPB_TAG_LIST,
+		CAP_FLAG_BITMASK},
+
+	{META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT,
+		HFI_PROP_SUBFRAME_OUTPUT,
+		CAP_FLAG_BITMASK},
+
+	{META_SUBFRAME_OUTPUT, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SUBFRAME_OUTPUT,
+		HFI_PROP_SUBFRAME_OUTPUT,
+		CAP_FLAG_BITMASK},
+
+	{META_ENC_QP_METADATA, ENC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_ENC_QP_METADATA,
+		HFI_PROP_ENC_QP_METADATA,
+		CAP_FLAG_BITMASK},
+
+	{META_ROI_INFO, ENC, H264|HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_ROI_INFO,
+		HFI_PROP_ROI_INFO,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK},
+
+	{META_SALIENCY_INFO, ENC, H264|HEVC,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_TX_INPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_SALIENCY_INFO,
+		HFI_PROP_ROI_AS_SALIENCY_INFO,
+		CAP_FLAG_INPUT_PORT | CAP_FLAG_BITMASK},
+
+	{META_DEC_QP_METADATA, DEC, CODECS_ALL,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_DEC_QP_METADATA,
+		HFI_PROP_DEC_QP_METADATA,
+		CAP_FLAG_BITMASK},
+
+	{GRID, ENC, HEIC,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_ENABLE,
+		0,
+		HFI_PROP_HEIC_GRID_ENABLE,
+		CAP_FLAG_OUTPUT_PORT},
+
+	{COMPLEXITY, ENC, H264|HEVC,
+		0, 100,
+		1, DEFAULT_COMPLEXITY,
+		V4L2_CID_MPEG_VIDC_VENC_COMPLEXITY},
+
+	{META_MAX_NUM_REORDER_FRAMES, DEC, HEVC | H264,
+		V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
+		0, V4L2_MPEG_VIDC_META_DISABLE,
+		V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES,
+		HFI_PROP_MAX_NUM_REORDER_FRAMES,
+		CAP_FLAG_BITMASK},
+
+	{DELIVERY_MODE, ENC, HEVC,
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED,
+		BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) |
+		BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED),
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE,
+		HFI_PROP_ENABLE_SLICE_DELIVERY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{DELIVERY_MODE, ENC, H264,
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED,
+		BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) |
+		BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED),
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE,
+		HFI_PROP_ENABLE_SLICE_DELIVERY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+};
+
+static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_anorak[] = {
+	/* {cap, domain, codec,
+	 *      parents,
+	 *      children,
+	 *      adjust, set}
+	 */
+
+	{PIX_FMTS, ENC, H264,
+		{0},
+		{META_ROI_INFO, IR_PERIOD}},
+
+	{PIX_FMTS, ENC, HEVC,
+		{0},
+		{PROFILE, MIN_FRAME_QP, MAX_FRAME_QP, I_FRAME_QP, P_FRAME_QP,
+			B_FRAME_QP, META_ROI_INFO, MIN_QUALITY, BLUR_TYPES, IR_PERIOD}},
+
+	{PIX_FMTS, ENC, HEIC,
+		{0},
+		{PROFILE}},
+
+	{PIX_FMTS, DEC, HEVC|HEIC,
+		{0},
+		{PROFILE}},
+
+	{FRAME_RATE, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_q16},
+
+	{FRAME_RATE, DEC, CODECS_ALL,
+		{0},
+		{0},
+		msm_vidc_adjust_dec_frame_rate},
+
+	{OPERATING_RATE, DEC, CODECS_ALL,
+		{0},
+		{0},
+		msm_vidc_adjust_dec_operating_rate},
+
+	{SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{META_OUTBUF_FENCE, DEC, H264|HEVC|VP9|AV1,
+		{OUTPUT_ORDER},
+		{LOWLATENCY_MODE},
+		msm_vidc_adjust_dec_outbuf_fence,
+		NULL},
+
+	{HFLIP, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_flip},
+
+	{VFLIP, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_flip},
+
+	{ROTATION, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_rotation},
+
+	{SUPER_FRAME, ENC, H264|HEVC,
+		{0},
+		{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
+		NULL,
+		NULL},
+
+	{HEADER_MODE, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_header_mode},
+
+	{WITHOUT_STARTCODE, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_nal_length},
+
+	{WITHOUT_STARTCODE, DEC, AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{REQUEST_I_FRAME, ENC, H264|HEVC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_req_sync_frame},
+
+	{BIT_RATE, ENC, H264,
+		{ENH_LAYER_COUNT, BITRATE_MODE, ENTROPY_MODE,
+			ALL_INTRA, LOWLATENCY_MODE},
+		{PEAK_BITRATE, BITRATE_BOOST},
+		msm_vidc_adjust_bitrate,
+		msm_vidc_set_bitrate},
+
+	{BIT_RATE, ENC, HEVC,
+		{ENH_LAYER_COUNT, BITRATE_MODE, ALL_INTRA, LOWLATENCY_MODE},
+		{PEAK_BITRATE, BITRATE_BOOST},
+		msm_vidc_adjust_bitrate,
+		msm_vidc_set_bitrate},
+
+	{BITRATE_MODE, ENC, H264,
+		{0},
+		{LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP,
+			P_FRAME_QP, B_FRAME_QP, ENH_LAYER_COUNT, BIT_RATE,
+			META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY,
+			PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING,
+			BLUR_TYPES, LOWLATENCY_MODE},
+		msm_vidc_adjust_bitrate_mode,
+		msm_vidc_set_u32_enum},
+
+	{BITRATE_MODE, ENC, HEVC,
+		{0},
+		{LTR_COUNT, IR_PERIOD, TIME_DELTA_BASED_RC, I_FRAME_QP,
+			P_FRAME_QP, B_FRAME_QP, CONSTANT_QUALITY, ENH_LAYER_COUNT,
+			BIT_RATE, META_ROI_INFO, MIN_QUALITY, BITRATE_BOOST, VBV_DELAY,
+			PEAK_BITRATE, SLICE_MODE, CONTENT_ADAPTIVE_CODING,
+			BLUR_TYPES, LOWLATENCY_MODE},
+		msm_vidc_adjust_bitrate_mode,
+		msm_vidc_set_u32_enum},
+
+	{BITRATE_MODE, ENC, HEIC,
+		{0},
+		{TIME_DELTA_BASED_RC, CONSTANT_QUALITY},
+		msm_vidc_adjust_bitrate_mode,
+		msm_vidc_set_u32_enum},
+
+	{CONSTANT_QUALITY, ENC, HEVC|HEIC,
+		{BITRATE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_constant_quality},
+
+	{GOP_SIZE, ENC, CODECS_ALL,
+		{ENH_LAYER_COUNT},
+		{ALL_INTRA},
+		msm_vidc_adjust_gop_size,
+		msm_vidc_set_gop_size},
+
+	{GOP_SIZE, ENC, HEIC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{B_FRAME, ENC, H264|HEVC,
+		{ENH_LAYER_COUNT},
+		{ALL_INTRA},
+		msm_vidc_adjust_b_frame,
+		msm_vidc_set_u32},
+
+	{B_FRAME, ENC, HEIC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{BLUR_TYPES, ENC, H264|HEVC,
+		{PIX_FMTS, BITRATE_MODE, MIN_QUALITY, META_ROI_INFO},
+		{BLUR_RESOLUTION},
+		msm_vidc_adjust_blur_type,
+		msm_vidc_set_u32_enum},
+
+	{BLUR_RESOLUTION, ENC, H264|HEVC,
+		{BLUR_TYPES},
+		{0},
+		msm_vidc_adjust_blur_resolution,
+		msm_vidc_set_blur_resolution},
+
+	{CSC_CUSTOM_MATRIX, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_csc_custom_matrix},
+
+	{LOWLATENCY_MODE, ENC, H264 | HEVC,
+		{BITRATE_MODE, DELIVERY_MODE},
+		{STAGE, BIT_RATE},
+		msm_vidc_adjust_enc_lowlatency_mode,
+		NULL},
+
+	{LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1,
+		{META_OUTBUF_FENCE},
+		{STAGE},
+		msm_vidc_adjust_dec_lowlatency_mode,
+		NULL},
+
+	{LTR_COUNT, ENC, H264|HEVC,
+		{BITRATE_MODE, ALL_INTRA},
+		{0},
+		msm_vidc_adjust_ltr_count,
+		msm_vidc_set_u32},
+
+	{USE_LTR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_use_ltr,
+		msm_vidc_set_use_and_mark_ltr},
+
+	{MARK_LTR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_mark_ltr,
+		msm_vidc_set_use_and_mark_ltr},
+
+	{IR_PERIOD, ENC, H264|HEVC,
+		{BITRATE_MODE, ALL_INTRA, META_ROI_INFO, PIX_FMTS},
+		{0},
+		msm_vidc_adjust_ir_period,
+		msm_vidc_set_ir_period},
+
+	{AU_DELIMITER, ENC, H264|HEVC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{TIME_DELTA_BASED_RC, ENC, CODECS_ALL,
+		{BITRATE_MODE},
+		{0},
+		msm_vidc_adjust_delta_based_rc,
+		msm_vidc_set_u32},
+
+	{CONTENT_ADAPTIVE_CODING, ENC, H264|HEVC,
+		{BITRATE_MODE, LAYER_ENABLE, LAYER_TYPE},
+		{REQUEST_PREPROCESS},
+		msm_vidc_adjust_brs,
+		msm_vidc_set_vbr_related_properties},
+
+	{REQUEST_PREPROCESS, ENC, H264|HEVC,
+		{CONTENT_ADAPTIVE_CODING, META_EVA_STATS},
+		{0},
+		msm_vidc_adjust_preprocess,
+		msm_vidc_set_preprocess},
+
+	{BITRATE_BOOST, ENC, H264|HEVC,
+		{BITRATE_MODE, MIN_QUALITY, BIT_RATE},
+		{0},
+		msm_vidc_adjust_bitrate_boost_iris3,
+		msm_vidc_set_vbr_related_properties},
+
+	{MIN_QUALITY, ENC, H264,
+		{BITRATE_MODE, ENH_LAYER_COUNT, META_ROI_INFO},
+		{BLUR_TYPES},
+		msm_vidc_adjust_min_quality,
+		msm_vidc_set_vbr_related_properties},
+
+	{MIN_QUALITY, ENC, HEVC,
+		{BITRATE_MODE, PIX_FMTS, ENH_LAYER_COUNT,
+			META_ROI_INFO},
+		{BLUR_TYPES},
+		msm_vidc_adjust_min_quality,
+		msm_vidc_set_vbr_related_properties},
+
+	{VBV_DELAY, ENC, H264|HEVC,
+		{BITRATE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_cbr_related_properties},
+
+	{PEAK_BITRATE, ENC, H264|HEVC,
+		{BITRATE_MODE, BIT_RATE},
+		{0},
+		msm_vidc_adjust_peak_bitrate,
+		msm_vidc_set_cbr_related_properties},
+
+	{MIN_FRAME_QP, ENC, H264,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_min_qp},
+
+	{MIN_FRAME_QP, ENC, HEVC|HEIC,
+		{PIX_FMTS},
+		{0},
+		msm_vidc_adjust_hevc_min_qp,
+		msm_vidc_set_min_qp},
+
+	{MAX_FRAME_QP, ENC, H264,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_max_qp},
+
+	{MAX_FRAME_QP, ENC, HEVC|HEIC,
+		{PIX_FMTS},
+		{0},
+		msm_vidc_adjust_hevc_max_qp,
+		msm_vidc_set_max_qp},
+
+	{I_FRAME_QP, ENC, HEVC,
+		{PIX_FMTS, BITRATE_MODE},
+		{0},
+		msm_vidc_adjust_hevc_i_frame_qp,
+		msm_vidc_set_frame_qp},
+
+	{I_FRAME_QP, ENC, H264,
+		{BITRATE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_frame_qp},
+
+	{P_FRAME_QP, ENC, HEVC,
+		{PIX_FMTS, BITRATE_MODE},
+		{0},
+		msm_vidc_adjust_hevc_p_frame_qp,
+		msm_vidc_set_frame_qp},
+
+	{P_FRAME_QP, ENC, H264,
+		{BITRATE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_frame_qp},
+
+	{B_FRAME_QP, ENC, HEVC,
+		{PIX_FMTS, BITRATE_MODE},
+		{0},
+		msm_vidc_adjust_hevc_b_frame_qp,
+		msm_vidc_set_frame_qp},
+
+	{B_FRAME_QP, ENC, H264,
+		{BITRATE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_frame_qp},
+
+	{LAYER_TYPE, ENC, H264,
+		{0},
+		{CONTENT_ADAPTIVE_CODING}},
+
+	{LAYER_ENABLE, ENC, H264|HEVC,
+		{0},
+		{CONTENT_ADAPTIVE_CODING}},
+
+	{ENH_LAYER_COUNT, ENC, H264|HEVC,
+		{BITRATE_MODE, META_EVA_STATS},
+		{GOP_SIZE, B_FRAME, BIT_RATE, MIN_QUALITY},
+		msm_vidc_adjust_layer_count,
+		msm_vidc_set_layer_count_and_type},
+
+	{ENH_LAYER_COUNT, DEC, AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{L0_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{L1_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{L2_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{L3_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{L4_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{L5_BR, ENC, H264|HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_dynamic_layer_bitrate,
+		msm_vidc_set_dynamic_layer_bitrate},
+
+	{ENTROPY_MODE, ENC, H264,
+		{PROFILE},
+		{BIT_RATE},
+		msm_vidc_adjust_entropy_mode,
+		msm_vidc_set_u32},
+
+	{PROFILE, ENC, H264,
+		{0},
+		{ENTROPY_MODE, TRANSFORM_8X8},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{PROFILE, DEC, H264,
+		{0},
+		{ENTROPY_MODE},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{PROFILE, ENC|DEC, HEVC|HEIC,
+		{PIX_FMTS},
+		{0},
+		msm_vidc_adjust_profile,
+		msm_vidc_set_u32_enum},
+
+	{PROFILE, DEC, VP9|AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{LEVEL, DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{LEVEL, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_level},
+
+	{AV1_TIER, DEC, AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{HEVC_TIER, ENC|DEC, HEVC|HEIC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_enum},
+
+	{LF_MODE, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_deblock_mode},
+
+	{SLICE_MODE, ENC, H264|HEVC,
+		{BITRATE_MODE, ALL_INTRA},
+		{STAGE, DELIVERY_MODE},
+		msm_vidc_adjust_slice_count,
+		msm_vidc_set_slice_count},
+
+	{SLICE_MODE, ENC, HEIC,
+		{0},
+		{0},
+		msm_vidc_adjust_slice_count,
+		msm_vidc_set_slice_count},
+
+	{TRANSFORM_8X8, ENC, H264,
+		{PROFILE},
+		{0},
+		msm_vidc_adjust_transform_8x8,
+		msm_vidc_set_u32},
+
+	{CHROMA_QP_INDEX_OFFSET, ENC, HEVC,
+		{0},
+		{0},
+		msm_vidc_adjust_chroma_qp_index_offset,
+		msm_vidc_set_chroma_qp_index_offset},
+
+	{DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1,
+		{0},
+		{OUTPUT_ORDER},
+		NULL,
+		NULL},
+
+	{DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1,
+		{0},
+		{OUTPUT_ORDER},
+		NULL,
+		NULL},
+
+	{OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1,
+		{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
+		{META_OUTBUF_FENCE},
+		msm_vidc_adjust_output_order,
+		msm_vidc_set_u32},
+
+	{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
+		{0},
+		{0},
+		msm_vidc_adjust_input_buf_host_max_count,
+		msm_vidc_set_u32},
+
+	{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
+		{SUPER_FRAME},
+		{0},
+		msm_vidc_adjust_input_buf_host_max_count,
+		msm_vidc_set_u32},
+
+	{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
+		{0},
+		{0},
+		msm_vidc_adjust_output_buf_host_max_count,
+		msm_vidc_set_u32},
+
+	{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
+		{SUPER_FRAME, DELIVERY_MODE},
+		{0},
+		msm_vidc_adjust_output_buf_host_max_count,
+		msm_vidc_set_u32},
+
+	{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_packed},
+
+	{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32_packed},
+
+	{STAGE, ENC | DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_stage},
+
+	{STAGE, ENC, H264|HEVC,
+		{LOWLATENCY_MODE, SLICE_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_stage},
+
+	{STAGE, DEC, H264|HEVC|VP9|AV1,
+		{LOWLATENCY_MODE},
+		{0},
+		NULL,
+		msm_vidc_set_stage},
+
+	{PIPE, DEC|ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_pipe},
+
+	{THUMBNAIL_MODE, DEC, CODECS_ALL,
+		{0},
+		{OUTPUT_ORDER},
+		NULL,
+		msm_vidc_set_u32},
+
+	{RAP_FRAME, DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{PRIORITY, DEC|ENC, CODECS_ALL,
+		{0},
+		{0},
+		msm_vidc_adjust_session_priority,
+		msm_vidc_set_session_priority},
+
+	{FIRMWARE_PRIORITY_OFFSET, DEC | ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		NULL},
+
+	{CRITICAL_PRIORITY, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		NULL},
+
+	{RESERVE_DURATION, ENC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_reserve_duration},
+
+	{DPB_LIST, DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		NULL},
+
+	{DRAP, DEC, AV1,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{ALL_INTRA, ENC, H264|HEVC,
+		{GOP_SIZE, B_FRAME},
+		{LTR_COUNT, IR_PERIOD, SLICE_MODE, BIT_RATE},
+		msm_vidc_adjust_all_intra,
+		NULL},
+
+	{INPUT_METADATA_FD, ENC|DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		NULL},
+
+	{INPUT_META_VIA_REQUEST, ENC|DEC, CODECS_ALL,
+		{0},
+		{0},
+		NULL,
+		NULL},
+
+	{META_EVA_STATS, ENC, CODECS_ALL,
+		{0},
+		{ENH_LAYER_COUNT, REQUEST_PREPROCESS}},
+
+	{META_ROI_INFO, ENC, H264|HEVC,
+		{BITRATE_MODE, PIX_FMTS},
+		{MIN_QUALITY, IR_PERIOD},
+		msm_vidc_adjust_roi_info,
+		NULL},
+
+	{GRID, ENC, HEIC,
+		{0},
+		{0},
+		NULL,
+		msm_vidc_set_u32},
+
+	{DELIVERY_MODE, ENC, H264|HEVC,
+		{SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT},
+		msm_vidc_adjust_delivery_mode,
+		msm_vidc_set_u32},
+};
+
+/* Default UBWC config for LPDDR5 */
+static struct msm_vidc_ubwc_config_data ubwc_config_anorak[] = {
+	UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1),
+};
+
+static const struct msm_vidc_platform_data anorak_data = {
+	.core_data = core_data_anorak,
+	.core_data_size = ARRAY_SIZE(core_data_anorak),
+	.inst_cap_data = instance_cap_data_anorak,
+	.inst_cap_data_size = ARRAY_SIZE(instance_cap_data_anorak),
+	.inst_cap_dependency_data = instance_cap_dependency_data_anorak,
+	.inst_cap_dependency_data_size = ARRAY_SIZE(instance_cap_dependency_data_anorak),
+	.csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff,
+	.csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff,
+	.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
+	.ubwc_config = ubwc_config_anorak,
+};
+
+int msm_vidc_anorak_check_ddr_type(void)
+{
+	u32 ddr_type;
+
+	ddr_type = of_fdt_get_ddrtype();
+	if (ddr_type != DDR_TYPE_LPDDR5 &&
+		ddr_type != DDR_TYPE_LPDDR5X) {
+		d_vpr_e("%s: wrong ddr type %d\n", __func__, ddr_type);
+		return -EINVAL;
+	} else {
+		d_vpr_h("%s: ddr type %d\n", __func__, ddr_type);
+	}
+	return 0;
+}
+
+static int msm_vidc_init_data(struct msm_vidc_core *core)
+{
+	int rc = 0;
+
+	if (!core || !core->platform) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return -EINVAL;
+	}
+	d_vpr_h("%s: initialize anorak data\n", __func__);
+
+	core->platform->data = anorak_data;
+	rc = msm_vidc_anorak_check_ddr_type();
+	if (rc)
+		return rc;
+
+	return rc;
+}
+
+int msm_vidc_init_platform_anorak(struct msm_vidc_core *core, struct device *dev)
+{
+	int rc = 0;
+
+	rc = msm_vidc_init_data(core);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+int msm_vidc_deinit_platform_anorak(struct msm_vidc_core *core, struct device *dev)
+{
+	/* do nothing */
+	return 0;
+}

driver/platform/common/src/msm_vidc_platform.c

@@ -23,6 +23,9 @@
 #if defined(CONFIG_MSM_VIDC_KALAMA)
 #include "msm_vidc_kalama.h"
 #endif
+#if defined(CONFIG_MSM_VIDC_ANORAK)
+#include "msm_vidc_anorak.h"
+#endif
 #if defined(CONFIG_MSM_VIDC_IRIS2)
 #include "msm_vidc_iris2.h"
 #endif
@@ -226,6 +229,14 @@ static int msm_vidc_deinit_platform_variant(struct msm_vidc_core *core, struct d
 		return rc;
 	}
 #endif
+#if defined(CONFIG_MSM_VIDC_ANORAK)
+	if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) {
+		rc = msm_vidc_deinit_platform_anorak(core, dev);
+		if (rc)
+			d_vpr_e("%s: failed with %d\n", __func__, rc);
+		return rc;
+	}
+#endif
 
 	return rc;
 }
@@ -257,6 +268,14 @@ static int msm_vidc_init_platform_variant(struct msm_vidc_core *core, struct dev
 		return rc;
 	}
 #endif
+#if defined(CONFIG_MSM_VIDC_ANORAK)
+	if (of_device_is_compatible(dev->of_node, "qcom,msm-vidc-anorak")) {
+		rc = msm_vidc_init_platform_anorak(core, dev);
+		if (rc)
+			d_vpr_e("%s: failed with %d\n", __func__, rc);
+		return rc;
+	}
+#endif
 
 	return rc;
 }

driver/platform/kalama/src/msm_vidc_kalama.c

@@ -23,6 +23,7 @@
 #define DEFAULT_BITRATE         20000000
 #define MINIMUM_FPS             1
 #define MAXIMUM_FPS             480
+#define MAXIMUM_DEC_FPS         960
 #define MAX_QP                  51
 #define DEFAULT_QP              20
 #define MAX_CONSTANT_QUALITY    100
@@ -253,7 +254,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		CAP_FLAG_OUTPUT_PORT},
 
 	{FRAME_RATE, DEC, CODECS_ALL,
-		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		(MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16),
 		1, (DEFAULT_FPS << 16),
 		V4L2_CID_MPEG_VIDC_FRAME_RATE,
 		0,
@@ -273,7 +274,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		1, (DEFAULT_FPS << 16)},
 
 	{OPERATING_RATE, DEC, CODECS_ALL,
-		(MINIMUM_FPS << 16), (MAXIMUM_FPS << 16),
+		(MINIMUM_FPS << 16), (MAXIMUM_DEC_FPS << 16),
 		1, (DEFAULT_FPS << 16),
 		V4L2_CID_MPEG_VIDC_OPERATING_RATE,
 		0,
@@ -1455,6 +1456,11 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		HFI_PROP_AV1_DRAP_CONFIG,
 		CAP_FLAG_INPUT_PORT},
 
+	{LAST_FLAG_EVENT_ENABLE, DEC, CODECS_ALL,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE},
+
 	{META_BITSTREAM_RESOLUTION, DEC, AV1,
 		V4L2_MPEG_VIDC_META_DISABLE,
 		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_INPUT |

driver/vidc/inc/hfi_command.h

@@ -116,6 +116,7 @@ enum hfi_buffer_firmware_flags {
 	HFI_BUF_FW_FLAG_READONLY        = 0x00000010,
 	HFI_BUF_FW_FLAG_CODEC_CONFIG    = 0x00000100,
 	HFI_BUF_FW_FLAG_LAST            = 0x10000000,
+	HFI_BUF_FW_FLAG_PSC_LAST        = 0x20000000,
 };
 
 enum hfi_metapayload_header_flags {
@@ -165,22 +166,23 @@ enum hfi_reserve_type {
 #define HFI_CMD_DELIVERY_MODE                                   0x0100000A
 #define HFI_CMD_SUBSCRIBE_MODE                                  0x0100000B
 #define HFI_CMD_SETTINGS_CHANGE                                 0x0100000C
-#define HFI_CMD_RESERVE                                         0x0100000F
 
 #define HFI_SSR_TYPE_SW_ERR_FATAL       0x1
 #define HFI_SSR_TYPE_SW_DIV_BY_ZERO     0x2
 #define HFI_SSR_TYPE_CPU_WDOG_IRQ       0x3
 #define HFI_SSR_TYPE_NOC_ERROR          0x4
-
 #define HFI_BITMASK_HW_CLIENT_ID                        0x000000f0
 #define HFI_BITMASK_SSR_TYPE                            0x0000000f
 #define HFI_CMD_SSR                                             0x0100000D
 
 #define HFI_STABILITY_TYPE_VCODEC_HUNG        0x1
 #define HFI_STABILITY_TYPE_ENC_BUFFER_FULL    0x2
-#define HFI_BITMASK_STABILITY_TYPE                              0x0000000f
+#define HFI_BITMASK_STABILITY_TYPE                      0x0000000f
 #define HFI_CMD_STABILITY                                       0x0100000E
 
+#define HFI_CMD_RESERVE                                         0x0100000F
+#define HFI_CMD_FLUSH                                           0x01000010
+#define HFI_CMD_PAUSE                                           0x01000011
 #define HFI_CMD_END                                             0x01FFFFFF
 
 #endif //__H_HFI_COMMAND_H__

driver/vidc/inc/hfi_property.h

@@ -607,6 +607,10 @@ enum hfi_saliency_type {
 
 #define HFI_INFO_VCODEC_RESET                                   0x06000005
 
+#define HFI_INFO_HFI_FLAG_DRAIN_LAST                            0x06000006
+
+#define HFI_INFO_HFI_FLAG_PSC_LAST                              0x06000007
+
 #define HFI_INFORMATION_END                                     0x06FFFFFF
 
 #endif //__H_HFI_PROPERTY_H__

driver/vidc/inc/msm_media_info.h

@@ -520,7 +520,6 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt,
 				uv_meta_scanlines, 4096);
 			size = (y_ubwc_plane + uv_ubwc_plane + y_meta_plane +
 				uv_meta_plane);
-			size = MSM_MEDIA_ALIGN(size, 4096);
 		} else {
 			if (pix_width <= INTERLACE_WIDTH_MAX &&
 				pix_height <= INTERLACE_HEIGHT_MAX &&
@@ -597,6 +596,7 @@ static inline unsigned int VIDEO_RAW_BUFFER_SIZE(unsigned int v4l2_fmt,
 	}
 
 invalid_input:
+	size = MSM_MEDIA_ALIGN(size, 4096);
 	return size;
 }
 

driver/vidc/inc/msm_vdec.h

@@ -30,5 +30,9 @@ int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst);
 int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd);
 int msm_vdec_handle_release_buffer(struct msm_vidc_inst *inst,
 	struct msm_vidc_buffer *buf);
+int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst);
+int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst);
+int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst);
+int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst);
 
 #endif // _MSM_VDEC_H_

driver/vidc/inc/msm_vidc_driver.h

@@ -352,6 +352,17 @@ static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst)
 			V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED)));
 }
 
+static inline bool is_state(struct msm_vidc_inst *inst, enum msm_vidc_state state)
+{
+	return inst->state == state;
+}
+
+static inline bool is_sub_state(struct msm_vidc_inst *inst,
+	enum msm_vidc_sub_state sub_state)
+{
+	return (inst->sub_state & sub_state);
+}
+
 const char *cap_name(enum msm_vidc_inst_capability_type cap_id);
 const char *v4l2_pixelfmt_name(u32 pixelfmt);
 const char *v4l2_type_name(u32 port);
@@ -382,10 +393,13 @@ u32 v4l2_matrix_coeff_from_driver(struct msm_vidc_inst *inst,
 int v4l2_type_to_driver_port(struct msm_vidc_inst *inst, u32 type,
 	const char *func);
 const char *allow_name(enum msm_vidc_allow allow);
-const char *state_name(enum msm_vidc_inst_state state);
+const char *state_name(enum msm_vidc_state state);
 const char *core_state_name(enum msm_vidc_core_state state);
-int msm_vidc_change_inst_state(struct msm_vidc_inst *inst,
-	enum msm_vidc_inst_state request_state, const char *func);
+int msm_vidc_change_state(struct msm_vidc_inst *inst,
+	enum msm_vidc_state request_state, const char *func);
+int msm_vidc_change_sub_state(struct msm_vidc_inst *inst,
+	enum msm_vidc_sub_state clear_sub_states,
+	enum msm_vidc_sub_state set_sub_states, const char *func);
 int msm_vidc_create_internal_buffer(struct msm_vidc_inst *inst,
 	enum msm_vidc_buffer_type buffer_type, u32 index);
 int msm_vidc_get_internal_buffers(struct msm_vidc_inst *inst,
@@ -406,8 +420,6 @@ int msm_vidc_session_open(struct msm_vidc_inst *inst);
 int msm_vidc_session_set_codec(struct msm_vidc_inst *inst);
 int msm_vidc_session_set_secure_mode(struct msm_vidc_inst *inst);
 int msm_vidc_session_set_default_header(struct msm_vidc_inst *inst);
-int msm_vidc_session_streamon(struct msm_vidc_inst *inst,
-		enum msm_vidc_port_type port);
 int msm_vidc_session_streamoff(struct msm_vidc_inst *inst,
 		enum msm_vidc_port_type port);
 int msm_vidc_session_close(struct msm_vidc_inst *inst);
@@ -502,13 +514,22 @@ bool msm_vidc_allow_streamon(struct msm_vidc_inst *inst, u32 type);
 enum msm_vidc_allow msm_vidc_allow_streamoff(struct msm_vidc_inst *inst, u32 type);
 enum msm_vidc_allow msm_vidc_allow_qbuf(struct msm_vidc_inst *inst, u32 type);
 enum msm_vidc_allow msm_vidc_allow_input_psc(struct msm_vidc_inst *inst);
-bool msm_vidc_allow_last_flag(struct msm_vidc_inst *inst);
+bool msm_vidc_allow_drain_last_flag(struct msm_vidc_inst *inst);
+bool msm_vidc_allow_psc_last_flag(struct msm_vidc_inst *inst);
 int msm_vidc_state_change_streamon(struct msm_vidc_inst *inst, u32 type);
 int msm_vidc_state_change_streamoff(struct msm_vidc_inst *inst, u32 type);
-int msm_vidc_state_change_stop(struct msm_vidc_inst *inst);
-int msm_vidc_state_change_start(struct msm_vidc_inst *inst);
 int msm_vidc_state_change_input_psc(struct msm_vidc_inst *inst);
-int msm_vidc_state_change_last_flag(struct msm_vidc_inst *inst);
+int msm_vidc_state_change_drain_last_flag(struct msm_vidc_inst *inst);
+int msm_vidc_state_change_psc_last_flag(struct msm_vidc_inst *inst);
+int msm_vidc_process_drain(struct msm_vidc_inst *inst);
+int msm_vidc_process_resume(struct msm_vidc_inst *inst);
+int msm_vidc_process_streamon_input(struct msm_vidc_inst *inst);
+int msm_vidc_process_streamon_output(struct msm_vidc_inst *inst);
+int msm_vidc_process_stop_done(struct msm_vidc_inst *inst,
+	enum signal_session_response signal_type);
+int msm_vidc_process_drain_done(struct msm_vidc_inst *inst);
+int msm_vidc_process_drain_last_flag(struct msm_vidc_inst *inst);
+int msm_vidc_process_psc_last_flag(struct msm_vidc_inst *inst);
 int msm_vidc_get_mbs_per_frame(struct msm_vidc_inst *inst);
 u32 msm_vidc_get_max_bitrate(struct msm_vidc_inst* inst);
 int msm_vidc_get_fps(struct msm_vidc_inst *inst);
@@ -557,6 +578,8 @@ bool res_is_less_than(u32 width, u32 height,
 	u32 ref_width, u32 ref_height);
 bool res_is_less_than_or_equal_to(u32 width, u32 height,
 	u32 ref_width, u32 ref_height);
+int signal_session_msg_receipt(struct msm_vidc_inst *inst,
+	enum signal_session_response cmd);
 int msm_vidc_get_properties(struct msm_vidc_inst *inst);
 int msm_vidc_create_input_metadata_buffer(struct msm_vidc_inst *inst, int buf_fd);
 int msm_vidc_update_input_meta_buffer_index(struct msm_vidc_inst *inst, struct vb2_buffer *vb2);
@@ -564,5 +587,6 @@ int msm_vidc_update_input_rate(struct msm_vidc_inst *inst, u64 time_us);
 int msm_vidc_get_input_rate(struct msm_vidc_inst *inst);
 int msm_vidc_get_frame_rate(struct msm_vidc_inst *inst);
 int msm_vidc_get_operating_rate(struct msm_vidc_inst *inst);
+int msm_vidc_alloc_and_queue_input_internal_buffers(struct msm_vidc_inst *inst);
 #endif // _MSM_VIDC_DRIVER_H_
 

driver/vidc/inc/msm_vidc_inst.h

@@ -75,19 +75,30 @@ struct msm_vidc_buffers_info {
 	struct msm_vidc_buffers        partial_data;
 };
 
-enum msm_vidc_inst_state {
+enum msm_vidc_state {
 	MSM_VIDC_OPEN                      = 1,
-	MSM_VIDC_START_INPUT               = 2,
-	MSM_VIDC_START_OUTPUT              = 3,
-	MSM_VIDC_START                     = 4,
-	MSM_VIDC_DRC                       = 5,
-	MSM_VIDC_DRC_LAST_FLAG             = 6,
-	MSM_VIDC_DRAIN                     = 7,
-	MSM_VIDC_DRAIN_LAST_FLAG           = 8,
-	MSM_VIDC_DRC_DRAIN                 = 9,
-	MSM_VIDC_DRC_DRAIN_LAST_FLAG       = 10,
-	MSM_VIDC_DRAIN_START_INPUT         = 11,
-	MSM_VIDC_ERROR                     = 12,
+	MSM_VIDC_INPUT_STREAMING           = 2,
+	MSM_VIDC_OUTPUT_STREAMING          = 3,
+	MSM_VIDC_STREAMING                 = 4,
+	MSM_VIDC_CLOSE                     = 5,
+	MSM_VIDC_ERROR                     = 6,
+};
+
+#define MSM_VIDC_SUB_STATE_NONE          0
+#define MSM_VIDC_MAX_SUB_STATES          6
+/*
+ * max value of inst->sub_state if all
+ * the 6 valid bits are set i.e 111111==>63
+ */
+#define MSM_VIDC_MAX_SUB_STATE_VALUE     ((1 << MSM_VIDC_MAX_SUB_STATES) - 1)
+
+enum msm_vidc_sub_state {
+	MSM_VIDC_DRAIN                     = BIT(0),
+	MSM_VIDC_DRC                       = BIT(1),
+	MSM_VIDC_DRAIN_LAST_BUFFER         = BIT(2),
+	MSM_VIDC_DRC_LAST_BUFFER           = BIT(3),
+	MSM_VIDC_INPUT_PAUSE               = BIT(4),
+	MSM_VIDC_OUTPUT_PAUSE              = BIT(5),
 };
 
 struct buf_queue {
@@ -99,7 +110,9 @@ struct msm_vidc_inst {
 	struct mutex                       lock;
 	struct mutex                       request_lock;
 	struct mutex                       client_lock;
-	enum msm_vidc_inst_state           state;
+	enum msm_vidc_state                state;
+	enum msm_vidc_sub_state            sub_state;
+	char                               sub_state_name[MAX_NAME_LENGTH];
 	enum msm_vidc_domain_type          domain;
 	enum msm_vidc_codec_type           codec;
 	void                              *core;
@@ -138,12 +151,10 @@ struct msm_vidc_inst {
 	struct msm_vidc_decode_batch       decode_batch;
 	struct msm_vidc_decode_vpp_delay   decode_vpp_delay;
 	struct msm_vidc_session_idle       session_idle;
-	struct delayed_work                response_work;
 	struct delayed_work                stats_work;
 	struct work_struct                 stability_work;
 	struct msm_vidc_stability          stability;
-	struct workqueue_struct           *response_workq;
-	struct list_head                   response_works; /* list of struct response_work */
+	struct workqueue_struct           *workq;
 	struct list_head                   enc_input_crs;
 	struct list_head                   dmabuf_tracker; /* list of struct msm_memory_dmabuf */
 	struct list_head                   input_timer_list; /* list of struct msm_vidc_input_timer */

driver/vidc/inc/msm_vidc_internal.h

@@ -500,6 +500,7 @@ enum msm_vidc_inst_capability_type {
 	CAVLC_MAX_BITRATE,
 	ALLINTRA_MAX_BITRATE,
 	LOWLATENCY_MAX_BITRATE,
+	LAST_FLAG_EVENT_ENABLE,
 	/* place all root(no parent) enums before this line */
 
 	PROFILE,
@@ -940,19 +941,6 @@ enum msm_vidc_allow {
 	MSM_VIDC_IGNORE,
 };
 
-enum response_work_type {
-	RESP_WORK_INPUT_PSC = 1,
-	RESP_WORK_OUTPUT_PSC,
-	RESP_WORK_LAST_FLAG,
-};
-
-struct response_work {
-	struct list_head        list;
-	enum response_work_type type;
-	void                   *data;
-	u32                     data_size;
-};
-
 struct msm_vidc_ssr {
 	bool                               trigger;
 	enum msm_vidc_ssr_trigger_type     ssr_type;

driver/vidc/inc/venus_hfi.h

@@ -49,6 +49,10 @@ int venus_hfi_start(struct msm_vidc_inst *inst, enum msm_vidc_port_type port);
 int venus_hfi_stop(struct msm_vidc_inst *inst, enum msm_vidc_port_type port);
 int venus_hfi_session_close(struct msm_vidc_inst *inst);
 int venus_hfi_session_open(struct msm_vidc_inst *inst);
+int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port);
+int venus_hfi_session_resume(struct msm_vidc_inst *inst,
+	enum msm_vidc_port_type port, u32 payload);
+int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port);
 int venus_hfi_session_set_codec(struct msm_vidc_inst *inst);
 int venus_hfi_session_set_secure_mode(struct msm_vidc_inst *inst);
 int venus_hfi_core_init(struct msm_vidc_core *core);
@@ -68,6 +72,8 @@ int venus_hfi_set_ir_period(struct msm_vidc_inst *inst, u32 ir_type,
 void venus_hfi_pm_work_handler(struct work_struct *work);
 irqreturn_t venus_hfi_isr(int irq, void *data);
 irqreturn_t venus_hfi_isr_handler(int irq, void *data);
+int venus_hfi_interface_queues_init(struct msm_vidc_core *core);
+void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core);
 
 int __write_register_masked(struct msm_vidc_core *core,
 		u32 reg, u32 value, u32 mask);

driver/vidc/inc/venus_hfi_response.h

@@ -16,11 +16,6 @@ bool is_valid_port(struct msm_vidc_inst *inst, u32 port,
 	const char *func);
 bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst,
 	u32 buffer_type, const char *func);
-void handle_session_response_work_handler(struct work_struct *work);
-int handle_session_response_work(struct msm_vidc_inst *inst,
-	struct response_work *work);
-int cancel_response_work(struct msm_vidc_inst *inst);
-int cancel_response_work_sync(struct msm_vidc_inst *inst);
 int handle_system_error(struct msm_vidc_core *core,
 	struct hfi_packet *pkt);
 void fw_coredump(struct msm_vidc_core *core);

driver/vidc/src/msm_vdec.c

@@ -755,7 +755,7 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst)
 	return rc;
 }
 
-static int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst)
+int msm_vdec_get_input_internal_buffers(struct msm_vidc_inst *inst)
 {
 	int rc = 0;
 	u32 i = 0;
@@ -790,7 +790,7 @@ static int msm_vdec_get_output_internal_buffers(struct msm_vidc_inst *inst)
 	return rc;
 }
 
-static int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst)
+int msm_vdec_create_input_internal_buffers(struct msm_vidc_inst *inst)
 {
 	int rc = 0;
 	u32 i = 0;
@@ -815,7 +815,7 @@ static int msm_vdec_create_output_internal_buffers(struct msm_vidc_inst *inst)
 	return 0;
 }
 
-static int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst)
+int msm_vdec_queue_input_internal_buffers(struct msm_vidc_inst *inst)
 {
 	int rc = 0;
 	u32 i = 0;
@@ -840,7 +840,7 @@ static int msm_vdec_queue_output_internal_buffers(struct msm_vidc_inst *inst)
 	return 0;
 }
 
-static int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst)
+int msm_vdec_release_input_internal_buffers(struct msm_vidc_inst *inst)
 {
 	int rc = 0;
 	u32 i = 0;
@@ -1160,24 +1160,6 @@ static int msm_vdec_set_delivery_mode_property(struct msm_vidc_inst *inst,
 	return rc;
 }
 
-static int msm_vdec_session_resume(struct msm_vidc_inst *inst,
-	enum msm_vidc_port_type port)
-{
-	int rc = 0;
-
-	i_vpr_h(inst, "%s()\n", __func__);
-	rc = venus_hfi_session_command(inst,
-			HFI_CMD_RESUME,
-			port,
-			HFI_PAYLOAD_NONE,
-			NULL,
-			0);
-	if (rc)
-		return rc;
-
-	return rc;
-}
-
 int msm_vdec_init_input_subcr_params(struct msm_vidc_inst *inst)
 {
 	struct msm_vidc_subscription_params *subsc_params;
@@ -1330,7 +1312,7 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst)
 		if (inst->buffers.output.min_count != 1) {
 			i_vpr_e(inst, "%s: invalid min count %d in thumbnail case\n",
 				__func__, inst->buffers.output.min_count);
-			msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+			msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		}
 	}
 	inst->crop.top = subsc_params.crop_offsets[0] & 0xFFFF;
@@ -1389,40 +1371,11 @@ int msm_vdec_input_port_settings_change(struct msm_vidc_inst *inst)
 	event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION;
 	v4l2_event_queue_fh(&inst->event_handler, &event);
 
-	rc = msm_vdec_get_input_internal_buffers(inst);
-	if (rc)
-		return rc;
-
-	rc = msm_vdec_release_input_internal_buffers(inst);
-	if (rc)
-		return rc;
-
-	rc = msm_vdec_create_input_internal_buffers(inst);
-	if (rc)
-		return rc;
-
-	rc = msm_vdec_queue_input_internal_buffers(inst);
-	if (rc)
-		return rc;
-
-	rc = msm_vidc_set_stage(inst, STAGE);
-	if (rc)
-		return rc;
-
-	rc = msm_vidc_set_pipe(inst, PIPE);
-	if (rc)
-		return rc;
-
-	rc = msm_vdec_session_resume(inst, INPUT_PORT);
-	if (rc)
-		return rc;
-
 	return rc;
 }
 
 int msm_vdec_output_port_settings_change(struct msm_vidc_inst *inst)
 {
-	//todo
 	return 0;
 }
 
@@ -1496,23 +1449,23 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst)
 		rc = msm_vdec_subscribe_input_port_settings_change(
 			inst, INPUT_PORT);
 		if (rc)
-			return rc;
+			goto error;
 		inst->ipsc_properties_set = true;
 	}
 
 	rc = msm_vdec_subscribe_property(inst, INPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_subscribe_metadata(inst, INPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_set_delivery_mode_metadata(inst, INPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
-	rc = msm_vidc_session_streamon(inst, INPUT_PORT);
+	rc = msm_vidc_process_streamon_input(inst);
 	if (rc)
 		goto error;
 
@@ -1788,11 +1741,11 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst)
 
 	rc = msm_vidc_check_session_supported(inst);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_update_max_map_output_count(inst);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_set_output_properties(inst);
 	if (rc)
@@ -1800,8 +1753,8 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst)
 
 	if (!inst->opsc_properties_set) {
 		memcpy(&inst->subcr_params[OUTPUT_PORT],
-			   &inst->subcr_params[INPUT_PORT],
-			   sizeof(inst->subcr_params[INPUT_PORT]));
+				&inst->subcr_params[INPUT_PORT],
+				sizeof(inst->subcr_params[INPUT_PORT]));
 		rc = msm_vdec_subscribe_output_port_settings_change(inst, OUTPUT_PORT);
 		if (rc)
 			goto error;
@@ -1810,7 +1763,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst)
 
 	rc = msm_vdec_subscribe_property(inst, OUTPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_subscribe_metadata(inst, OUTPUT_PORT);
 	if (rc)
@@ -1818,11 +1771,11 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst)
 
 	rc = msm_vdec_set_delivery_mode_property(inst, OUTPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_set_delivery_mode_metadata(inst, OUTPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_vdec_get_output_internal_buffers(inst);
 	if (rc)
@@ -1832,7 +1785,7 @@ int msm_vdec_streamon_output(struct msm_vidc_inst *inst)
 	if (rc)
 		goto error;
 
-	rc = msm_vidc_session_streamon(inst, OUTPUT_PORT);
+	rc = msm_vidc_process_streamon_output(inst);
 	if (rc)
 		goto error;
 
@@ -1862,10 +1815,6 @@ static inline enum msm_vidc_allow msm_vdec_allow_queue_deferred_buffers(
 	if (inst->power.buffer_counter <= SKIP_BATCH_WINDOW)
 		return MSM_VIDC_ALLOW;
 
-	/* do not defer, if client waiting for last flag FBD */
-	if (inst->state != MSM_VIDC_START)
-		return MSM_VIDC_ALLOW;
-
 	/* defer qbuf, if pending buffers count less than batch size */
 	count = msm_vidc_num_buffers(inst, MSM_VIDC_BUF_OUTPUT, MSM_VIDC_ATTR_DEFERRED);
 	if (count < inst->decode_batch.size)
@@ -2192,7 +2141,6 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 {
 	int rc = 0;
 	enum msm_vidc_allow allow = MSM_VIDC_DISALLOW;
-	enum msm_vidc_port_type port;
 	struct msm_vidc_inst_capability *capability;
 
 	if (!inst || !inst->core || !inst->capabilities) {
@@ -2210,15 +2158,7 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 			return 0;
 		else if (allow != MSM_VIDC_ALLOW)
 			return -EINVAL;
-		rc = venus_hfi_session_command(inst,
-				HFI_CMD_DRAIN,
-				INPUT_PORT,
-				HFI_PAYLOAD_NONE,
-				NULL,
-				0);
-		if (rc)
-			return rc;
-		rc = msm_vidc_state_change_stop(inst);
+		rc = msm_vidc_process_drain(inst);
 		if (rc)
 			return rc;
 	} else if (cmd == V4L2_DEC_CMD_START) {
@@ -2236,26 +2176,47 @@ int msm_vdec_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 
 		if (!msm_vidc_allow_start(inst))
 			return -EBUSY;
-		port = (inst->state == MSM_VIDC_DRAIN_LAST_FLAG) ? INPUT_PORT : OUTPUT_PORT;
-
-		rc = msm_vidc_state_change_start(inst);
-		if (rc)
-			return rc;
 
 		/* tune power features */
 		inst->decode_batch.enable = msm_vidc_allow_decode_batch(inst);
 		msm_vidc_allow_dcvs(inst);
 		msm_vidc_power_data_reset(inst);
 
+		/*
+		 * client is completing partial port reconfiguration,
+		 * hence reallocate input internal buffers before input port
+		 * is resumed.
+		 */
+		if (is_sub_state(inst, MSM_VIDC_DRC) &&
+			is_sub_state(inst, MSM_VIDC_DRC_LAST_BUFFER) &&
+			is_sub_state(inst, MSM_VIDC_INPUT_PAUSE)) {
+			rc = msm_vidc_alloc_and_queue_input_internal_buffers(inst);
+			if (rc)
+				return rc;
+
+			rc = msm_vidc_set_stage(inst, STAGE);
+			if (rc)
+				return rc;
+
+			rc = msm_vidc_set_pipe(inst, PIPE);
+			if (rc)
+				return rc;
+		}
+
 		/* allocate and queue extra dpb buffers */
 		rc = msm_vdec_alloc_and_queue_additional_dpb_buffers(inst);
 		if (rc)
 			return rc;
 
+		/* queue pending deferred buffers */
+		rc = msm_vidc_queue_deferred_buffers(inst, MSM_VIDC_BUF_OUTPUT);
+		if (rc)
+			return rc;
+
 		/* print final buffer counts & size details */
 		msm_vidc_print_buffer_info(inst);
 
-		rc = msm_vdec_session_resume(inst, port);
+		rc = msm_vidc_process_resume(inst);
 		if (rc)
 			return rc;
 
@@ -2592,6 +2553,7 @@ int msm_vdec_subscribe_event(struct msm_vidc_inst *inst,
 	switch (sub->type) {
 	case V4L2_EVENT_EOS:
 	case V4L2_EVENT_VIDC_METADATA:
+	case V4L2_EVENT_VIDC_LAST_FLAG:
 		rc = v4l2_event_subscribe(&inst->event_handler, sub, MAX_EVENTS, NULL);
 		break;
 	case V4L2_EVENT_SOURCE_CHANGE:

driver/vidc/src/msm_venc.c

@@ -857,13 +857,13 @@ int msm_venc_streamon_input(struct msm_vidc_inst *inst)
 
 	rc = msm_venc_property_subscription(inst, INPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
 	rc = msm_venc_metadata_delivery(inst, INPUT_PORT);
 	if (rc)
-		return rc;
+		goto error;
 
-	rc = msm_vidc_session_streamon(inst, INPUT_PORT);
+	rc = msm_vidc_process_streamon_input(inst);
 	if (rc)
 		goto error;
 
@@ -910,15 +910,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 			return 0;
 		else if (allow != MSM_VIDC_ALLOW)
 			return -EINVAL;
-		rc = venus_hfi_session_command(inst,
-				HFI_CMD_DRAIN,
-				INPUT_PORT,
-				HFI_PAYLOAD_NONE,
-				NULL,
-				0);
-		if (rc)
-			return rc;
-		rc = msm_vidc_state_change_stop(inst);
+		rc = msm_vidc_process_drain(inst);
 		if (rc)
 			return rc;
 	} else if (cmd == V4L2_ENC_CMD_START) {
@@ -928,10 +920,6 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 		vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_META_PORT].vb2q);
 		vb2_clear_last_buffer_dequeued(inst->bufq[OUTPUT_PORT].vb2q);
 
-		rc = msm_vidc_state_change_start(inst);
-		if (rc)
-			return rc;
-
 		/* tune power features */
 		msm_vidc_allow_dcvs(inst);
 		msm_vidc_power_data_reset(inst);
@@ -939,12 +927,7 @@ int msm_venc_process_cmd(struct msm_vidc_inst *inst, u32 cmd)
 		/* print final buffer counts & size details */
 		msm_vidc_print_buffer_info(inst);
 
-		rc = venus_hfi_session_command(inst,
-				HFI_CMD_RESUME,
-				INPUT_PORT,
-				HFI_PAYLOAD_NONE,
-				NULL,
-				0);
+		rc = msm_vidc_process_resume(inst);
 		if (rc)
 			return rc;
 	} else {
@@ -1030,7 +1013,7 @@ int msm_venc_streamon_output(struct msm_vidc_inst *inst)
 	if (rc)
 		goto error;
 
-	rc = msm_vidc_session_streamon(inst, OUTPUT_PORT);
+	rc = msm_vidc_process_streamon_output(inst);
 	if (rc)
 		goto error;
 

driver/vidc/src/msm_vidc.c

@@ -889,6 +889,8 @@ void *msm_vidc_open(void *vidc_core, u32 session_type)
 	inst->domain = session_type;
 	inst->session_id = hash32_ptr(inst);
 	inst->state = MSM_VIDC_OPEN;
+	inst->sub_state = MSM_VIDC_SUB_STATE_NONE;
+	strlcpy(inst->sub_state_name, "SUB_STATE_NONE", sizeof(inst->sub_state_name));
 	inst->active = true;
 	inst->request = false;
 	inst->ipsc_properties_set = false;
@@ -908,7 +910,6 @@ void *msm_vidc_open(void *vidc_core, u32 session_type)
 		msm_vidc_vmem_free((void **)&inst);
 		return NULL;
 	}
-	INIT_LIST_HEAD(&inst->response_works);
 	INIT_LIST_HEAD(&inst->caps_list);
 	INIT_LIST_HEAD(&inst->timestamps.list);
 	INIT_LIST_HEAD(&inst->ts_reorder.list);
@@ -959,13 +960,12 @@ void *msm_vidc_open(void *vidc_core, u32 session_type)
 	for (i = 0; i < MAX_SIGNAL; i++)
 		init_completion(&inst->completions[i]);
 
-	inst->response_workq = create_singlethread_workqueue("response_workq");
-	if (!inst->response_workq) {
-		i_vpr_e(inst, "%s: create input_psc_workq failed\n", __func__);
+	inst->workq = create_singlethread_workqueue("workq");
+	if (!inst->workq) {
+		i_vpr_e(inst, "%s: create workq failed\n", __func__);
 		goto error;
 	}
 
-	INIT_DELAYED_WORK(&inst->response_work, handle_session_response_work_handler);
 	INIT_DELAYED_WORK(&inst->stats_work, msm_vidc_stats_handler);
 	INIT_WORK(&inst->stability_work, msm_vidc_stability_handler);
 
@@ -1042,7 +1042,6 @@ int msm_vidc_close(void *instance)
 	msm_vidc_destroy_buffers(inst);
 	inst_unlock(inst, __func__);
 	client_unlock(inst, __func__);
-	cancel_response_work_sync(inst);
 	cancel_stability_work_sync(inst);
 	cancel_stats_work_sync(inst);
 	msm_vidc_show_stats(inst);

driver/vidc/src/msm_vidc_buffer.c

@@ -360,6 +360,11 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst)
 	u32 width, height;
 	struct v4l2_format *f;
 
+	if (!inst || !inst->capabilities) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return 0;
+	}
+
 	f = &inst->fmts[OUTPUT_PORT];
 	/*
 	 * Encoder output size calculation: 32 Align width/height
@@ -376,7 +381,8 @@ u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst)
 	frame_size = (width * height * 3);
 
 	/* Image session: 2 x yuv size */
-	if (is_image_session(inst))
+	if (is_image_session(inst) ||
+		inst->capabilities->cap[BITRATE_MODE].value == V4L2_MPEG_VIDEO_BITRATE_MODE_CQ)
 		goto skip_calc;
 
 	if (mbs_per_frame <= NUM_MBS_360P)

driver/vidc/src/msm_vidc_probe.c

@@ -359,6 +359,8 @@ static int msm_vidc_remove_video_device(struct platform_device *pdev)
 
 	msm_vidc_core_deinit(core, true);
 
+	venus_hfi_interface_queues_deinit(core);
+
 	d_vpr_h("depopulating sub devices\n");
 	/*
 	 * Trigger remove for each sub-device i.e. qcom,msm-vidc,context-bank.
@@ -547,6 +549,12 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev)
 		goto sub_dev_failed;
 	}
 
+	rc = venus_hfi_interface_queues_init(core);
+	if (rc) {
+		d_vpr_e("%s: interface queues init failed\n", __func__);
+		goto queues_init_failed;
+	}
+
 	rc = msm_vidc_core_init(core);
 	if (rc) {
 		d_vpr_e("%s: sys init failed\n", __func__);
@@ -557,6 +565,8 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev)
 	return rc;
 
 core_init_failed:
+	venus_hfi_interface_queues_deinit(core);
+queues_init_failed:
 	of_platform_depopulate(&pdev->dev);
 sub_dev_failed:
 #ifdef CONFIG_MEDIA_CONTROLLER

driver/vidc/src/msm_vidc_vb2.c

@@ -112,7 +112,7 @@ int msm_vidc_queue_setup(struct vb2_queue *q,
 		return -EINVAL;
 	}
 
-	if (inst->state == MSM_VIDC_START) {
+	if (is_state(inst, MSM_VIDC_STREAMING)) {
 		i_vpr_e(inst, "%s: invalid state %d\n", __func__, inst->state);
 		return -EINVAL;
 	}
@@ -217,10 +217,6 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count)
 		goto unlock;
 	}
 
-	rc = msm_vidc_state_change_streamon(inst, q->type);
-	if (rc)
-		goto unlock;
-
 	if (q->type == INPUT_META_PLANE &&
 		inst->capabilities->cap[INPUT_META_VIA_REQUEST].value) {
 		i_vpr_e(inst,
@@ -335,7 +331,7 @@ int msm_vidc_start_streaming(struct vb2_queue *q, unsigned int count)
 unlock:
 	if (rc) {
 		i_vpr_e(inst, "Streamon: %s failed\n", v4l2_type_name(q->type));
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	}
 	inst_unlock(inst, __func__);
 	client_unlock(inst, __func__);
@@ -381,10 +377,6 @@ void msm_vidc_stop_streaming(struct vb2_queue *q)
 		goto unlock;
 	}
 
-	rc = msm_vidc_state_change_streamoff(inst, q->type);
-	if (rc)
-		goto unlock;
-
 	if (!is_decode_session(inst) && !is_encode_session(inst)) {
 		i_vpr_e(inst, "%s: invalid session %d\n",
 			__func__, inst->domain);
@@ -420,7 +412,7 @@ void msm_vidc_stop_streaming(struct vb2_queue *q)
 unlock:
 	if (rc) {
 		i_vpr_e(inst, "Streamoff: %s failed\n", v4l2_type_name(q->type));
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	}
 	inst_unlock(inst, __func__);
 	client_unlock(inst, __func__);
@@ -531,7 +523,7 @@ void msm_vidc_buf_queue(struct vb2_buffer *vb2)
 
 unlock:
 	if (rc) {
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		vb2_buffer_done(vb2, VB2_BUF_STATE_ERROR);
 	}
 	inst_unlock(inst, __func__);

driver/vidc/src/venus_hfi.c

@@ -2203,7 +2203,7 @@ static void __set_queue_hdr_defaults(struct hfi_queue_header *q_hdr)
 	q_hdr->qhdr_write_idx = 0x0;
 }
 
-static void __interface_queues_deinit(struct msm_vidc_core *core)
+void venus_hfi_interface_queues_deinit(struct msm_vidc_core *core)
 {
 	int i;
 
@@ -2227,7 +2227,7 @@ static void __interface_queues_deinit(struct msm_vidc_core *core)
 	core->sfr.align_device_addr = 0;
 }
 
-static int __interface_queues_init(struct msm_vidc_core *core)
+int venus_hfi_interface_queues_init(struct msm_vidc_core *core)
 {
 	int rc = 0;
 	struct hfi_queue_table_header *q_tbl_hdr;
@@ -2342,10 +2342,6 @@ static int __interface_queues_init(struct msm_vidc_core *core)
 	/* write sfr buffer size in first word */
 	*((u32 *)core->sfr.align_virtual_addr) = core->sfr.mem_size;
 
-	rc = call_venus_op(core, setup_ucregion_memmap, core);
-	if (rc)
-		return rc;
-
 	return 0;
 fail_alloc_queue:
 	return -ENOMEM;
@@ -2501,6 +2497,11 @@ int __load_fw(struct msm_vidc_core *core)
 	__hand_off_regulators(core);
 	trace_msm_v4l2_vidc_fw_load("END");
 
+	/* configure interface_queues memory to firmware */
+	rc = call_venus_op(core, setup_ucregion_memmap, core);
+	if (rc)
+		return rc;
+
 	return rc;
 fail_protect_mem:
 	if (core->dt->fw_cookie)
@@ -2704,10 +2705,6 @@ int venus_hfi_core_init(struct msm_vidc_core *core)
 	if (rc)
 		goto error;
 
-	rc = __interface_queues_init(core);
-	if (rc)
-		goto error;
-
 	rc = call_venus_op(core, boot_firmware, core);
 	if (rc)
 		goto error;
@@ -2772,7 +2769,6 @@ int venus_hfi_core_deinit(struct msm_vidc_core *core, bool force)
 	 */
 	if (msm_vidc_fw_dump)
 		fw_coredump(core);
-	__interface_queues_deinit(core);
 
 	return 0;
 }
@@ -3308,6 +3304,137 @@ unlock:
 	return rc;
 }
 
+int venus_hfi_session_pause(struct msm_vidc_inst *inst, enum msm_vidc_port_type port)
+{
+	int rc = 0;
+	struct msm_vidc_core* core;
+
+	if (!inst || !inst->core || !inst->packet) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return -EINVAL;
+	}
+	core = inst->core;
+	core_lock(core, __func__);
+
+	if (!__valdiate_session(core, inst, __func__)) {
+		rc = -EINVAL;
+		goto unlock;
+	}
+
+	if (port != INPUT_PORT && port != OUTPUT_PORT) {
+		i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
+		goto unlock;
+	}
+
+	rc = hfi_packet_session_command(inst,
+				HFI_CMD_PAUSE,
+				(HFI_HOST_FLAGS_RESPONSE_REQUIRED |
+				HFI_HOST_FLAGS_INTR_REQUIRED),
+				get_hfi_port(inst, port),
+				inst->session_id,
+				HFI_PAYLOAD_NONE,
+				NULL,
+				0);
+	if (rc)
+		goto unlock;
+
+	rc = __iface_cmdq_write(inst->core, inst->packet);
+	if (rc)
+		goto unlock;
+
+unlock:
+	core_unlock(core, __func__);
+	return rc;
+}
+
+int venus_hfi_session_resume(struct msm_vidc_inst *inst,
+	enum msm_vidc_port_type port, u32 payload)
+{
+	int rc = 0;
+	struct msm_vidc_core* core;
+
+	if (!inst || !inst->core || !inst->packet) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return -EINVAL;
+	}
+	core = inst->core;
+	core_lock(core, __func__);
+
+	if (!__valdiate_session(core, inst, __func__)) {
+		rc = -EINVAL;
+		goto unlock;
+	}
+
+	if (port != INPUT_PORT && port != OUTPUT_PORT) {
+		i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
+		goto unlock;
+	}
+
+	rc = hfi_packet_session_command(inst,
+				HFI_CMD_RESUME,
+				(HFI_HOST_FLAGS_RESPONSE_REQUIRED |
+				HFI_HOST_FLAGS_INTR_REQUIRED),
+				get_hfi_port(inst, port),
+				inst->session_id,
+				HFI_PAYLOAD_U32,
+				&payload,
+				sizeof(u32));
+	if (rc)
+		goto unlock;
+
+	rc = __iface_cmdq_write(inst->core, inst->packet);
+	if (rc)
+		goto unlock;
+
+unlock:
+	core_unlock(core, __func__);
+	return rc;
+}
+
+int venus_hfi_session_drain(struct msm_vidc_inst *inst, enum msm_vidc_port_type port)
+{
+	int rc = 0;
+	struct msm_vidc_core* core;
+
+	if (!inst || !inst->core || !inst->packet) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return -EINVAL;
+	}
+	core = inst->core;
+	core_lock(core, __func__);
+
+	if (!__valdiate_session(core, inst, __func__)) {
+		rc = -EINVAL;
+		goto unlock;
+	}
+
+	if (port != INPUT_PORT) {
+		i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
+		goto unlock;
+	}
+
+	rc = hfi_packet_session_command(inst,
+				HFI_CMD_DRAIN,
+				(HFI_HOST_FLAGS_RESPONSE_REQUIRED |
+				HFI_HOST_FLAGS_INTR_REQUIRED |
+				HFI_HOST_FLAGS_NON_DISCARDABLE),
+				get_hfi_port(inst, port),
+				inst->session_id,
+				HFI_PAYLOAD_NONE,
+				NULL,
+				0);
+	if (rc)
+		goto unlock;
+
+	rc = __iface_cmdq_write(inst->core, inst->packet);
+	if (rc)
+		goto unlock;
+
+unlock:
+	core_unlock(core, __func__);
+	return rc;
+}
+
 int venus_hfi_session_command(struct msm_vidc_inst *inst,
 	u32 cmd, enum msm_vidc_port_type port, u32 payload_type,
 	void *payload, u32 payload_size)

driver/vidc/src/venus_hfi_response.c

@@ -178,14 +178,6 @@ bool is_valid_hfi_buffer_type(struct msm_vidc_inst *inst,
 	return true;
 }
 
-static int signal_session_msg_receipt(struct msm_vidc_inst *inst,
-	enum signal_session_response cmd)
-{
-	if (cmd < MAX_SIGNAL)
-		complete(&inst->completions[cmd]);
-	return 0;
-}
-
 int validate_packet(u8 *response_pkt, u8 *core_resp_pkt,
 	u32 core_resp_pkt_size, const char *func)
 {
@@ -304,29 +296,35 @@ static bool check_for_packet_payload(struct msm_vidc_inst *inst,
 	return true;
 }
 
-static bool check_last_flag(struct msm_vidc_inst *inst,
-	struct hfi_packet *pkt)
+static int handle_session_last_flag_info(struct msm_vidc_inst *inst,
+		struct hfi_packet *pkt)
 {
-	struct hfi_buffer *buffer;
+	int rc = 0;
 
-	if (!inst || !pkt) {
-		d_vpr_e("%s: invalid params\n", __func__);
-		return false;
+	if (pkt->type == HFI_INFO_HFI_FLAG_PSC_LAST) {
+		if (msm_vidc_allow_psc_last_flag(inst))
+			rc = msm_vidc_process_psc_last_flag(inst);
+		else
+			rc = -EINVAL;
+	} else if (pkt->type == HFI_INFO_HFI_FLAG_DRAIN_LAST) {
+		if (msm_vidc_allow_drain_last_flag(inst))
+			rc = msm_vidc_process_drain_last_flag(inst);
+		else
+			rc = -EINVAL;
+	} else {
+		i_vpr_e(inst, "%s: invalid packet type %#x\n", __func__,
+			pkt->type);
 	}
 
-	buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet));
-	if (buffer->flags & HFI_BUF_FW_FLAG_LAST) {
-		i_vpr_h(inst, "%s: received last flag on FBD, index: %d\n",
-			__func__, buffer->index);
-		return true;
-	}
-	return false;
+	if (rc)
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
+
+	return rc;
 }
 
 static int handle_session_info(struct msm_vidc_inst *inst,
 	struct hfi_packet *pkt)
 {
-
 	int rc = 0;
 	char *info;
 
@@ -342,12 +340,20 @@ static int handle_session_info(struct msm_vidc_inst *inst,
 		info = "buffer overflow";
 		inst->hfi_frame_info.overflow = 1;
 		break;
+	case HFI_INFO_HFI_FLAG_DRAIN_LAST:
+		info = "drain last flag";
+		rc = handle_session_last_flag_info(inst, pkt);
+		break;
+	case HFI_INFO_HFI_FLAG_PSC_LAST:
+		info = "drc last flag";
+		rc = handle_session_last_flag_info(inst, pkt);
+		break;
 	default:
 		info = "unknown";
 		break;
 	}
 
-	i_vpr_e(inst, "session info (%#x): %s\n", pkt->type, info);
+	i_vpr_h(inst, "session info (%#x): %s\n", pkt->type, info);
 
 	return rc;
 }
@@ -385,7 +391,7 @@ static int handle_session_error(struct msm_vidc_inst *inst,
 	i_vpr_e(inst, "%s: session error received %#x: %s\n",
 		__func__, pkt->type, error);
 
-	rc = msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+	rc = msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	return rc;
 }
 
@@ -537,7 +543,8 @@ static int handle_session_start(struct msm_vidc_inst *inst,
 static int handle_session_stop(struct msm_vidc_inst *inst,
 	struct hfi_packet *pkt)
 {
-	int signal_type = -1;
+	int rc = 0;
+	enum signal_session_response signal_type = -1;
 
 	if (pkt->flags & HFI_FW_FLAGS_SUCCESS)
 		i_vpr_h(inst, "%s: successful for port %d\n",
@@ -568,17 +575,28 @@ static int handle_session_stop(struct msm_vidc_inst *inst,
 		return -EINVAL;
 	}
 
-	if (signal_type != -1)
-		signal_session_msg_receipt(inst, signal_type);
+	if (signal_type != -1) {
+		rc = msm_vidc_process_stop_done(inst, signal_type);
+		if (rc)
+			return rc;
+	}
+
 	return 0;
 }
 
 static int handle_session_drain(struct msm_vidc_inst *inst,
 	struct hfi_packet *pkt)
 {
+	int rc = 0;
+
 	if (pkt->flags & HFI_FW_FLAGS_SUCCESS)
 		i_vpr_h(inst, "%s: successful\n", __func__);
-	return 0;
+
+	rc = msm_vidc_process_drain_done(inst);
+	if (rc)
+		return rc;
+
+	return rc;
 }
 
 static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags)
@@ -618,7 +636,18 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags)
 	if (hfi_flags & HFI_BUF_FW_FLAG_CODEC_CONFIG)
 		driver_flags |= MSM_VIDC_BUF_FLAG_CODECCONFIG;
 
-	if (hfi_flags & HFI_BUF_FW_FLAG_LAST)
+	/*
+	 * attach last flag to the buffer for encode session.
+	 * For decode session attach only if control(LAST_FLAG_EVENT_ENABLE)
+	 * is not set by client. If this control is enabled, last flag
+	 * info will be sent via event(V4L2_EVENT_VIDC_LAST_FLAG) to client.
+	 */
+	if ((is_encode_session(inst) &&
+		(hfi_flags & HFI_BUF_FW_FLAG_LAST)) ||
+		(is_decode_session(inst) &&
+		!inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value &&
+		((hfi_flags & HFI_BUF_FW_FLAG_LAST) ||
+		(hfi_flags & HFI_BUF_FW_FLAG_PSC_LAST))))
 		driver_flags |= MSM_VIDC_BUF_FLAG_LAST;
 
 	return driver_flags;
@@ -714,6 +743,48 @@ static int handle_non_read_only_buffer(struct msm_vidc_inst *inst,
 	return 0;
 }
 
+static int handle_psc_last_flag_buffer(struct msm_vidc_inst *inst,
+		struct hfi_buffer *buffer)
+{
+	int rc = 0;
+
+	if (!(buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST))
+		return 0;
+
+	if (!msm_vidc_allow_psc_last_flag(inst))
+		return -EINVAL;
+
+	rc = msm_vidc_process_psc_last_flag(inst);
+	if (rc)
+		return rc;
+
+	return rc;
+}
+
+static int handle_drain_last_flag_buffer(struct msm_vidc_inst *inst,
+		struct hfi_buffer *buffer)
+{
+	int rc = 0;
+
+	if (!(buffer->flags & HFI_BUF_FW_FLAG_LAST))
+		return 0;
+
+	if (!msm_vidc_allow_drain_last_flag(inst))
+		return -EINVAL;
+
+	if (is_decode_session(inst)) {
+		rc = msm_vidc_process_drain_last_flag(inst);
+		if (rc)
+			return rc;
+	} else if (is_encode_session(inst)) {
+		rc = msm_vidc_state_change_drain_last_flag(inst);
+		if (rc)
+			return rc;
+	}
+
+	return rc;
+}
+
 static int handle_input_buffer(struct msm_vidc_inst *inst,
 	struct hfi_buffer *buffer)
 {
@@ -801,11 +872,25 @@ static int handle_output_buffer(struct msm_vidc_inst *inst,
 		return -EINVAL;
 	}
 
+	/* handle drain last flag buffer */
+	if (buffer->flags & HFI_BUF_FW_FLAG_LAST) {
+		rc = handle_drain_last_flag_buffer(inst, buffer);
+		if (rc)
+			msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
+	}
+
 	if (is_decode_session(inst)) {
+		/* handle psc last flag buffer */
+		if (buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST) {
+			rc = handle_psc_last_flag_buffer(inst, buffer);
+			if (rc)
+				msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
+		}
+		/* handle non-read only buffer */
 		if (!(buffer->flags & HFI_BUF_FW_FLAG_READONLY)) {
 			rc = handle_non_read_only_buffer(inst, buffer);
 			if (rc)
-				msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+				msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		}
 	}
 
@@ -861,14 +946,15 @@ static int handle_output_buffer(struct msm_vidc_inst *inst,
 			}
 		}
 		if (fatal)
-			msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+			msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	}
 
 	/*
 	 * reset data size to zero for last flag buffer.
 	 * reset RO flag for last flag buffer.
 	 */
-	if (buffer->flags & HFI_BUF_FW_FLAG_LAST) {
+	if ((buffer->flags & HFI_BUF_FW_FLAG_LAST) ||
+		(buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST)) {
 		if (buffer->data_size) {
 			i_vpr_e(inst, "%s: reset data size to zero for last flag buffer\n",
 				__func__);
@@ -894,7 +980,7 @@ static int handle_output_buffer(struct msm_vidc_inst *inst,
 			buf->attr |= MSM_VIDC_ATTR_READ_ONLY;
 			rc = handle_read_only_buffer(inst, buf);
 			if (rc)
-				msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+				msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		} else {
 			buf->attr &= ~MSM_VIDC_ATTR_READ_ONLY;
 		}
@@ -993,7 +1079,12 @@ static int handle_input_metadata_buffer(struct msm_vidc_inst *inst,
 	buf->attr &= ~MSM_VIDC_ATTR_QUEUED;
 	buf->attr |= MSM_VIDC_ATTR_DEQUEUED;
 	buf->flags = 0;
-	if (buffer->flags & HFI_BUF_FW_FLAG_LAST)
+	if ((is_encode_session(inst) &&
+		(buffer->flags & HFI_BUF_FW_FLAG_LAST)) ||
+		(is_decode_session(inst) &&
+		!inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value &&
+		((buffer->flags & HFI_BUF_FW_FLAG_LAST) ||
+		(buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST))))
 		buf->flags |= MSM_VIDC_BUF_FLAG_LAST;
 
 	print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf);
@@ -1008,6 +1099,11 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst,
 	struct msm_vidc_buffer *buf;
 	bool found;
 
+	if (!inst || !inst->capabilities) {
+		d_vpr_e("%s: Invalid params\n", __func__);
+		return -EINVAL;
+	}
+
 	buffers = msm_vidc_get_buffers(inst, MSM_VIDC_BUF_OUTPUT_META, __func__);
 	if (!buffers)
 		return -EINVAL;
@@ -1035,7 +1131,12 @@ static int handle_output_metadata_buffer(struct msm_vidc_inst *inst,
 	buf->attr &= ~MSM_VIDC_ATTR_QUEUED;
 	buf->attr |= MSM_VIDC_ATTR_DEQUEUED;
 	buf->flags = 0;
-	if (buffer->flags & HFI_BUF_FW_FLAG_LAST)
+	if ((is_encode_session(inst) &&
+		(buffer->flags & HFI_BUF_FW_FLAG_LAST)) ||
+		(is_decode_session(inst) &&
+		!inst->capabilities->cap[LAST_FLAG_EVENT_ENABLE].value &&
+		((buffer->flags & HFI_BUF_FW_FLAG_LAST) ||
+		(buffer->flags & HFI_BUF_FW_FLAG_PSC_LAST))))
 		buf->flags |= MSM_VIDC_BUF_FLAG_LAST;
 
 	print_vidc_buffer(VIDC_LOW, "low ", "dqbuf", inst, buf);
@@ -1267,18 +1368,18 @@ static int handle_session_buffer(struct msm_vidc_inst *inst,
 	}
 
 	if (!check_for_packet_payload(inst, pkt, __func__)) {
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		return 0;
 	}
 
 	buffer = (struct hfi_buffer *)((u8 *)pkt + sizeof(struct hfi_packet));
 	if (!is_valid_hfi_buffer_type(inst, buffer->type, __func__)) {
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		return 0;
 	}
 
 	if (!is_valid_hfi_port(inst, pkt->port, buffer->type, __func__)) {
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 		return 0;
 	}
 	if (is_decode_session(inst) && buffer->type == HFI_BUFFER_RAW &&
@@ -1329,6 +1430,39 @@ static int handle_session_buffer(struct msm_vidc_inst *inst,
 	return rc;
 }
 
+static int handle_input_port_settings_change(struct msm_vidc_inst *inst)
+{
+	int rc = 0;
+	enum msm_vidc_allow allow = MSM_VIDC_DISALLOW;
+
+	allow = msm_vidc_allow_input_psc(inst);
+	if (allow == MSM_VIDC_DISALLOW) {
+		return -EINVAL;
+	} else if (allow == MSM_VIDC_ALLOW) {
+		rc = msm_vidc_state_change_input_psc(inst);
+		if (rc)
+			return rc;
+		print_psc_properties("INPUT_PSC", inst, inst->subcr_params[INPUT_PORT]);
+		rc = msm_vdec_input_port_settings_change(inst);
+		if (rc)
+			return rc;
+	}
+
+	return rc;
+}
+
+static int handle_output_port_settings_change(struct msm_vidc_inst *inst)
+{
+	int rc = 0;
+
+	print_psc_properties("OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]);
+	rc = msm_vdec_output_port_settings_change(inst);
+	if (rc)
+		return rc;
+
+	return rc;
+}
+
 static int handle_port_settings_change(struct msm_vidc_inst *inst,
 	struct hfi_packet *pkt)
 {
@@ -1338,17 +1472,23 @@ static int handle_port_settings_change(struct msm_vidc_inst *inst,
 		__func__, pkt->port);
 
 	if (pkt->port == HFI_PORT_RAW) {
-		print_psc_properties("OUTPUT_PSC", inst, inst->subcr_params[OUTPUT_PORT]);
-		rc = msm_vdec_output_port_settings_change(inst);
+		rc = handle_output_port_settings_change(inst);
+		if (rc)
+			goto exit;
 	} else if (pkt->port == HFI_PORT_BITSTREAM) {
-		print_psc_properties("INPUT_PSC", inst, inst->subcr_params[INPUT_PORT]);
-		rc = msm_vdec_input_port_settings_change(inst);
+		rc = handle_input_port_settings_change(inst);
+		if (rc)
+			goto exit;
 	} else {
 		i_vpr_e(inst, "%s: invalid port type: %#x\n",
 			__func__, pkt->port);
 		rc = -EINVAL;
+		goto exit;
 	}
 
+exit:
+	if (rc)
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	return rc;
 }
 
@@ -1368,6 +1508,14 @@ static int handle_session_delivery_mode(struct msm_vidc_inst *inst,
 	return 0;
 }
 
+static int handle_session_pause(struct msm_vidc_inst *inst,
+	struct hfi_packet *pkt)
+{
+	if (pkt->flags & HFI_FW_FLAGS_SUCCESS)
+		i_vpr_h(inst, "%s: successful\n", __func__);
+	return 0;
+}
+
 static int handle_session_resume(struct msm_vidc_inst *inst,
 	struct hfi_packet *pkt)
 {
@@ -1398,6 +1546,7 @@ static int handle_session_command(struct msm_vidc_inst *inst,
 		{HFI_CMD_SETTINGS_CHANGE,   handle_port_settings_change       },
 		{HFI_CMD_SUBSCRIBE_MODE,    handle_session_subscribe_mode     },
 		{HFI_CMD_DELIVERY_MODE,     handle_session_delivery_mode      },
+		{HFI_CMD_PAUSE,             handle_session_pause              },
 		{HFI_CMD_RESUME,            handle_session_resume             },
 		{HFI_CMD_STABILITY,         handle_session_stability          },
 	};
@@ -1437,7 +1586,7 @@ static int handle_dpb_list_property(struct msm_vidc_inst *inst,
 		i_vpr_e(inst,
 			"%s: dpb list payload size %d exceeds expected max size %d\n",
 			__func__, payload_size, MAX_DPB_LIST_PAYLOAD_SIZE);
-		msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+		msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 	}
 	memcpy(inst->dpb_list_payload, payload_start, payload_size);
 
@@ -1764,7 +1913,7 @@ static int __handle_session_response(struct msm_vidc_inst *inst,
 				dequeue |= (packet->type == HFI_CMD_BUFFER);
 				rc = be[i].handle(inst, packet);
 				if (rc)
-					msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
+					msm_vidc_change_state(inst, MSM_VIDC_ERROR, __func__);
 			}
 			pkt += packet->size;
 		}
@@ -1780,163 +1929,14 @@ static int __handle_session_response(struct msm_vidc_inst *inst,
 	return rc;
 }
 
-int handle_session_response_work(struct msm_vidc_inst *inst,
-		struct response_work *resp_work)
-{
-	int rc = 0;
-	struct hfi_header *hdr = NULL;
-
-	if (!inst || !inst->core || !resp_work) {
-		d_vpr_e("%s: invalid params\n", __func__);
-		return -EINVAL;
-	}
-
-	hdr = (struct hfi_header *)resp_work->data;
-	if (!hdr) {
-		i_vpr_e(inst, "%s: invalid params\n", __func__);
-		return -EINVAL;
-	}
-	if (resp_work->type == RESP_WORK_INPUT_PSC)
-		msm_vdec_init_input_subcr_params(inst);
-
-	rc = __handle_session_response(inst, hdr);
-	if (rc)
-		return rc;
-
-	return 0;
-}
-
-void handle_session_response_work_handler(struct work_struct *work)
-{
-	int rc = 0;
-	struct msm_vidc_inst *inst;
-	struct response_work *resp_work, *dummy = NULL;
-
-	inst = container_of(work, struct msm_vidc_inst, response_work.work);
-	inst = get_inst_ref(g_core, inst);
-	if (!inst) {
-		d_vpr_e("%s: invalid params\n", __func__);
-		return;
-	}
-
-	inst_lock(inst, __func__);
-	list_for_each_entry_safe(resp_work, dummy, &inst->response_works, list) {
-		switch (resp_work->type) {
-		case RESP_WORK_INPUT_PSC:
-		{
-			enum msm_vidc_allow allow = MSM_VIDC_DISALLOW;
-
-			allow = msm_vidc_allow_input_psc(inst);
-			if (allow == MSM_VIDC_DISALLOW) {
-				msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
-				break;
-			} else if (allow == MSM_VIDC_DEFER) {
-				/* continue to next entry processing */
-				continue;
-			} else if (allow == MSM_VIDC_DISCARD) {
-				/* if ipsc is discarded then override the psc properties again */
-				inst->ipsc_properties_set = false;
-				/* discard current entry processing */
-				break;
-			} else if (allow == MSM_VIDC_ALLOW) {
-				rc = handle_session_response_work(inst, resp_work);
-				if (!rc)
-					rc = msm_vidc_state_change_input_psc(inst);
-				/* either handle input psc or state change failed */
-				if (rc)
-					msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
-			}
-			break;
-		}
-		case RESP_WORK_OUTPUT_PSC:
-			rc = handle_session_response_work(inst, resp_work);
-			if (rc)
-				msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
-			break;
-		case RESP_WORK_LAST_FLAG:
-			rc = handle_session_response_work(inst, resp_work);
-			if (rc) {
-				msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
-				break;
-			}
-			if (msm_vidc_allow_last_flag(inst)) {
-				rc = msm_vidc_state_change_last_flag(inst);
-				if (rc)
-					msm_vidc_change_inst_state(inst, MSM_VIDC_ERROR, __func__);
-			}
-			break;
-		default:
-			i_vpr_e(inst, "%s: invalid response work type %d\n", __func__,
-				resp_work->type);
-			break;
-		}
-		list_del(&resp_work->list);
-		msm_vidc_vmem_free((void **)&resp_work->data);
-		msm_vidc_vmem_free((void **)&resp_work);
-	}
-	inst_unlock(inst, __func__);
-
-	put_inst(inst);
-}
-
-static int queue_response_work(struct msm_vidc_inst *inst,
-	enum response_work_type type, void *hdr, u32 hdr_size)
-{
-	struct response_work *work = NULL;
-
-	if (msm_vidc_vmem_alloc(sizeof(struct response_work), (void **)&work, __func__))
-		return -ENOMEM;
-	INIT_LIST_HEAD(&work->list);
-	work->type = type;
-	work->data_size = hdr_size;
-	if (msm_vidc_vmem_alloc(hdr_size, (void **)&work->data, "Work data"))
-		return -ENOMEM;
-	memcpy(work->data, hdr, hdr_size);
-	list_add_tail(&work->list, &inst->response_works);
-	queue_delayed_work(inst->response_workq,
-			&inst->response_work, msecs_to_jiffies(0));
-	return 0;
-}
-
-int cancel_response_work(struct msm_vidc_inst *inst)
-{
-	struct response_work *work, *dummy_work = NULL;
-
-	if (!inst) {
-		d_vpr_e("%s: Invalid arguments\n", __func__);
-		return -EINVAL;
-	}
-	cancel_delayed_work(&inst->response_work);
-
-	list_for_each_entry_safe(work, dummy_work, &inst->response_works, list) {
-		list_del(&work->list);
-		msm_vidc_vmem_free((void **)&work->data);
-		msm_vidc_vmem_free((void **)&work);
-	}
-
-	return 0;
-}
-
-int cancel_response_work_sync(struct msm_vidc_inst *inst)
-{
-	if (!inst || !inst->response_workq) {
-		d_vpr_e("%s: Invalid arguments\n", __func__);
-		return -EINVAL;
-	}
-	cancel_delayed_work_sync(&inst->response_work);
-
-	return 0;
-}
-
 static int handle_session_response(struct msm_vidc_core *core,
 	struct hfi_header *hdr)
 {
 	struct msm_vidc_inst *inst;
 	struct hfi_packet *packet;
 	u8 *pkt;
-	enum response_work_type type;
 	int i, rc = 0;
-	bool offload = false;
+	bool found_ipsc = false;
 
 	if (!core || !hdr) {
 		d_vpr_e("%s: Invalid params\n", __func__);
@@ -1945,47 +1945,27 @@ static int handle_session_response(struct msm_vidc_core *core,
 
 	inst = get_inst(core, hdr->session_id);
 	if (!inst) {
-		d_vpr_e("%s: Invalid params\n", __func__);
+		d_vpr_e("%s: Invalid inst\n", __func__);
 		return -EINVAL;
 	}
 
 	inst_lock(inst, __func__);
-	/* search for special pkt */
+	/* search for cmd settings change pkt */
 	pkt = (u8 *)((u8 *)hdr + sizeof(struct hfi_header));
 	for (i = 0; i < hdr->num_packets; i++) {
 		packet = (struct hfi_packet *)pkt;
-
 		if (packet->type == HFI_CMD_SETTINGS_CHANGE) {
 			if (packet->port == HFI_PORT_BITSTREAM) {
-				offload = true;
-				type = RESP_WORK_INPUT_PSC;
-			} else if (packet->port == HFI_PORT_RAW) {
-				offload = true;
-				type = RESP_WORK_OUTPUT_PSC;
-			}
-		} else if (packet->type == HFI_CMD_BUFFER &&
-			vidc_port_from_hfi(inst, packet->port) ==
-				OUTPUT_PORT) {
-			if (check_last_flag(inst, packet)) {
-				offload = true;
-				type = RESP_WORK_LAST_FLAG;
+				found_ipsc = true;
+				break;
 			}
 		}
-
-		if (offload)
-			break;
-
 		pkt += packet->size;
 	}
 
-	if (offload) {
-		i_vpr_h(inst, "%s: queue response work %#x\n", __func__, type);
-		rc = queue_response_work(inst, type, (void *)hdr, hdr->size);
-		if (rc)
-			i_vpr_e(inst, "%s: Offload response work failed\n", __func__);
-
-		goto exit;
-	}
+	/* if ipsc packet is found, initialise subsc_params */
+	if (found_ipsc)
+		msm_vdec_init_input_subcr_params(inst);
 
 	rc = __handle_session_response(inst, hdr);
 	if (rc)

include/uapi/vidc/media/v4l2_vidc_extensions.h

@@ -268,6 +268,9 @@ enum v4l2_h264_encode_delivery_mode {
 #define V4L2_CID_MPEG_VIDC_CLIENT_ID                                          \
 	(V4L2_CID_MPEG_VIDC_BASE + 0x41)
 
+#define V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE                             \
+	(V4L2_CID_MPEG_VIDC_BASE + 0x42)
+
 /* add new controls above this line */
 /* Deprecate below controls once availble in gki and gsi bionic header */
 #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID
@@ -461,6 +464,19 @@ struct v4l2_event_vidc_metadata {
 	__u32                                offset;
 	__u8                                 reserved[44];
 };
+
+#define V4L2_EVENT_VIDC_LAST_FLAG                                             \
+	(V4L2_EVENT_PRIVATE_START + 0x2)
+
+enum v4l2_event_last_flag {
+	LAST_FLAG_DRC         = (1 << 0),
+	LAST_FLAG_DRAIN       = (1 << 1),
+};
+
+struct v4l2_event_vidc_last_flag {
+	enum v4l2_event_last_flag flag_type;
+};
+
 /* vendor events end */
 
 /* Default metadata size (align to 4KB) */