qcacmn: Add hal_rx_tid_get API

Implement hal_rx_tid_get API based on
the chipset as the macro to retrieve
tid value is chipset dependent.

Change-Id: I37eab3f3c1c2bbba6094b9ddb24d72712b819f73
CRs-Fixed: 2522133

hal/wifi3.0/qca8074v1/hal_8074v1.c

@@ -562,6 +562,32 @@ static bool hal_rx_is_unicast_8074v1(uint8_t *buf)
 
 	return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
 }
+
+/**
+ * hal_rx_tid_get_8074v1: get tid based on qos control valid.
+ *
+ * @ buf: pointer to rx pkt TLV.
+ *
+ * Return: tid
+ */
+static uint32_t hal_rx_tid_get_8074v1(hal_soc_handle_t hal_soc_hdl,
+				      uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_mpdu_start *mpdu_start =
+	&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
+	uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
+	uint8_t qos_control_valid =
+		(_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
+			  RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)),
+			 RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK,
+			 RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB));
+
+	if (qos_control_valid)
+		return hal_rx_mpdu_start_tid_get_8074v1(buf);
+
+	return HAL_RX_NON_QOS_TID;
+}
 struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 
 	/* init and setup */
@@ -626,6 +652,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	hal_rx_mpdu_get_addr4_8074v1,
 	hal_rx_get_mpdu_sequence_control_valid_8074v1,
 	hal_rx_is_unicast_8074v1,
+	hal_rx_tid_get_8074v1,
 };
 
 struct hal_hw_srng_config hw_srng_table_8074[] = {