disp: msm: sde: remove unused output parameter in _get_tearcheck_threshold

Remove the output parameter "extra_frame_trigger_time" from this
function as callers are not using it, so it is not needed.

Change-Id: I98fcfe974c64da9ce62456a693330b898707e6b4
Signed-off-by: Steve Cohen <[email protected]>

msm/sde/sde_encoder_phys_cmd.c

@@ -926,8 +926,7 @@ void sde_encoder_phys_cmd_irq_control(struct sde_encoder_phys *phys_enc,
 	}
 }
 
-static int _get_tearcheck_threshold(struct sde_encoder_phys *phys_enc,
-	u32 *extra_frame_trigger_time)
+static int _get_tearcheck_threshold(struct sde_encoder_phys *phys_enc)
 {
 	struct drm_connector *conn = phys_enc->connector;
 	u32 qsync_mode;
@@ -936,7 +935,6 @@ static int _get_tearcheck_threshold(struct sde_encoder_phys *phys_enc,
 	struct sde_encoder_phys_cmd *cmd_enc =
 			to_sde_encoder_phys_cmd(phys_enc);
 
-	*extra_frame_trigger_time = 0;
 	if (!conn || !conn->state)
 		return 0;
 
@@ -995,8 +993,6 @@ static int _get_tearcheck_threshold(struct sde_encoder_phys *phys_enc,
 
 		SDE_EVT32(qsync_mode, qsync_min_fps, extra_time_ns, default_fps,
 			yres, transfer_time_us, threshold_lines);
-
-		*extra_frame_trigger_time = extra_time_ns;
 	}
 
 exit:
@@ -1012,7 +1008,7 @@ static void sde_encoder_phys_cmd_tearcheck_config(
 	struct sde_hw_tear_check tc_cfg = { 0 };
 	struct drm_display_mode *mode;
 	bool tc_enable = true;
-	u32 vsync_hz, extra_frame_trigger_time;
+	u32 vsync_hz;
 	struct msm_drm_private *priv;
 	struct sde_kms *sde_kms;
 
@@ -1076,8 +1072,7 @@ static void sde_encoder_phys_cmd_tearcheck_config(
 	 */
 	tc_cfg.sync_cfg_height = 0xFFF0;
 	tc_cfg.vsync_init_val = mode->vdisplay;
-	tc_cfg.sync_threshold_start = _get_tearcheck_threshold(phys_enc,
-			&extra_frame_trigger_time);
+	tc_cfg.sync_threshold_start = _get_tearcheck_threshold(phys_enc);
 	tc_cfg.sync_threshold_continue = DEFAULT_TEARCHECK_SYNC_THRESH_CONTINUE;
 	tc_cfg.start_pos = mode->vdisplay;
 	tc_cfg.rd_ptr_irq = mode->vdisplay + 1;
@@ -1393,7 +1388,6 @@ static int sde_encoder_phys_cmd_prepare_for_kickoff(
 	struct sde_encoder_phys_cmd *cmd_enc =
 			to_sde_encoder_phys_cmd(phys_enc);
 	int ret = 0;
-	u32 extra_frame_trigger_time;
 	bool recovery_events;
 
 	if (!phys_enc || !phys_enc->hw_pp) {
@@ -1437,9 +1431,8 @@ static int sde_encoder_phys_cmd_prepare_for_kickoff(
 	}
 
 	if (sde_connector_is_qsync_updated(phys_enc->connector)) {
-		tc_cfg.sync_threshold_start =
-			_get_tearcheck_threshold(phys_enc,
-				&extra_frame_trigger_time);
+		tc_cfg.sync_threshold_start = _get_tearcheck_threshold(
+				phys_enc);
 		if (phys_enc->has_intf_te &&
 				phys_enc->hw_intf->ops.update_tearcheck)
 			phys_enc->hw_intf->ops.update_tearcheck(