diff --git a/drivers/cam_cpas/cam_cpas_intf.c b/drivers/cam_cpas/cam_cpas_intf.c index 8de9601e4d..16c6fd70ff 100644 --- a/drivers/cam_cpas/cam_cpas_intf.c +++ b/drivers/cam_cpas/cam_cpas_intf.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -121,11 +121,37 @@ const char *cam_cpas_axi_util_path_type_to_string( case CAM_AXI_PATH_DATA_CRE_WR_OUT: return "CRE_WR_OUT"; + /* OFE Paths */ + case CAM_AXI_PATH_DATA_OFE_RD_EXT: + return "OFE_RD_EXT"; + case CAM_AXI_PATH_DATA_OFE_RD_INT_PDI: + return "OFE_RD_INT_PDI"; + case CAM_AXI_PATH_DATA_OFE_RD_INT_HDR: + return "OFE_RD_INT_HDR"; + case CAM_AXI_PATH_DATA_OFE_WR_VID: + return "OFE_WR_VID"; + case CAM_AXI_PATH_DATA_OFE_WR_DISP: + return "OFE_WR_DISP"; + case CAM_AXI_PATH_DATA_OFE_WR_IR: + return "OFE_WR_IR"; + case CAM_AXI_PATH_DATA_OFE_WR_HDR_LTM: + return "OFE_WR_HDR_LTM"; + case CAM_AXI_PATH_DATA_OFE_WR_DC4: + return "OFE_WR_DC4"; + case CAM_AXI_PATH_DATA_OFE_WR_AI: + return "OFE_WR_AI"; + case CAM_AXI_PATH_DATA_OFE_WR_PDI: + return "OFE_WR_PDI"; + case CAM_AXI_PATH_DATA_OFE_WR_IDEALRAW: + return "OFE_WR_IDEALRAW"; + case CAM_AXI_PATH_DATA_OFE_WR_STATS: + return "OFE_WR_STATS"; + /* Common Paths */ case CAM_AXI_PATH_DATA_ALL: return "DATA_ALL"; default: - return "IFE_PATH_INVALID"; + return "CPAS_PATH_INVALID"; } } EXPORT_SYMBOL(cam_cpas_axi_util_path_type_to_string); diff --git a/dt-bindings/msm-camera.h b/dt-bindings/msm-camera.h index 311a80ee3c..46bbed4fc8 100644 --- a/dt-bindings/msm-camera.h +++ b/dt-bindings/msm-camera.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __MSM_CAMERA_H @@ -58,6 +58,22 @@ #define CAM_CPAS_PATH_DATA_CRE_MAX_OFFSET \ (CAM_CPAS_PATH_DATA_CRE_START_OFFSET + 31) +#define CAM_CPAS_PATH_DATA_OFE_START_OFFSET (CAM_CPAS_PATH_DATA_CRE_MAX_OFFSET + 1) +#define CAM_CPAS_PATH_DATA_OFE_RD_EXT (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 0) +#define CAM_CPAS_PATH_DATA_OFE_RD_INT_PDI (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 1) +#define CAM_CPAS_PATH_DATA_OFE_RD_INT_HDR (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 2) +#define CAM_CPAS_PATH_DATA_OFE_WR_VID (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 3) +#define CAM_CPAS_PATH_DATA_OFE_WR_DISP (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 4) +#define CAM_CPAS_PATH_DATA_OFE_WR_IR (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 5) +#define CAM_CPAS_PATH_DATA_OFE_WR_HDR_LTM (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 6) +#define CAM_CPAS_PATH_DATA_OFE_WR_DC4 (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 7) +#define CAM_CPAS_PATH_DATA_OFE_WR_AI (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 8) +#define CAM_CPAS_PATH_DATA_OFE_WR_PDI (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 9) +#define CAM_CPAS_PATH_DATA_OFE_WR_IDEALRAW (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 10) +#define CAM_CPAS_PATH_DATA_OFE_WR_STATS (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 11) +#define CAM_CPAS_PATH_DATA_OFE_MAX_OFFSET \ + (CAM_CPAS_PATH_DATA_OFE_START_OFFSET + 31) + #define CAM_CPAS_PATH_DATA_CONSO_OFFSET 256 #define CAM_CPAS_PATH_DATA_ALL (CAM_CPAS_PATH_DATA_CONSO_OFFSET + 0)