qcacmn: Add HAL macros in dp_rx_defrag.c

Add the following HAL macros:
1. HAL_RX_MSDU0_BUFFER_ADDR_LSB
2. HAL_RX_MSDU_DESC_INFO_PTR_GET
3. HAL_ENT_MPDU_DESC_INFO
4. HAL_DST_MPDU_DESC_INFO

Add relevant function pointers to retrieve
descriptor info from the macros based
on chipsets.

Change-Id: I99ce7566a668180c7849eedea915b6f23a8dbf35
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-23 14:16:41 -07:00
committed by nshrivas
parent 38e84d2722
commit 8227240793
14 changed files with 295 additions and 10 deletions

View File

@@ -1038,9 +1038,7 @@ dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
qdf_assert(link_desc_va); qdf_assert(link_desc_va);
msdu0 = (uint8_t *)link_desc_va + msdu0 = hal_rx_msdu0_buffer_addr_lsb(soc->hal_soc, link_desc_va);
RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET;
nbuf_len = qdf_nbuf_len(head) - RX_PKT_TLVS_LEN; nbuf_len = qdf_nbuf_len(head) - RX_PKT_TLVS_LEN;
HAL_RX_UNIFORM_HDR_SET(link_desc_va, OWNER, UNI_DESC_OWNER_SW); HAL_RX_UNIFORM_HDR_SET(link_desc_va, OWNER, UNI_DESC_OWNER_SW);
@@ -1048,8 +1046,7 @@ dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
UNI_DESC_BUF_TYPE_RX_MSDU_LINK); UNI_DESC_BUF_TYPE_RX_MSDU_LINK);
/* msdu reconfig */ /* msdu reconfig */
msdu_desc_info = (uint8_t *)msdu0 + msdu_desc_info = hal_rx_msdu_desc_info_ptr_get(soc->hal_soc, msdu0);
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET;
dst_ind = hal_rx_msdu_reo_dst_ind_get(soc->hal_soc, link_desc_va); dst_ind = hal_rx_msdu_reo_dst_ind_get(soc->hal_soc, link_desc_va);
@@ -1121,11 +1118,10 @@ dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
buf_info.sw_cookie, buf_info.sw_cookie,
HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST); HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST);
/* mpdu desc info */ /* mpdu desc info */
ent_mpdu_desc_info = (uint8_t *)ent_ring_desc + ent_mpdu_desc_info = hal_ent_mpdu_desc_info(soc->hal_soc,
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET; ent_ring_desc);
dst_mpdu_desc_info = hal_dst_mpdu_desc_info(soc->hal_soc,
dst_mpdu_desc_info = (uint8_t *)dst_ring_desc + dst_ring_desc);
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET;
qdf_mem_copy(ent_mpdu_desc_info, dst_mpdu_desc_info, qdf_mem_copy(ent_mpdu_desc_info, dst_mpdu_desc_info,
sizeof(struct rx_mpdu_desc_info)); sizeof(struct rx_mpdu_desc_info));

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@@ -411,6 +411,10 @@ struct hal_hw_txrx_ops {
uint32_t (*hal_rx_hw_desc_get_ppduid_get)(void *hw_desc_addr); uint32_t (*hal_rx_hw_desc_get_ppduid_get)(void *hw_desc_addr);
uint32_t (*hal_rx_mpdu_start_mpdu_qos_control_valid_get)(uint8_t *buf); uint32_t (*hal_rx_mpdu_start_mpdu_qos_control_valid_get)(uint8_t *buf);
uint32_t (*hal_rx_msdu_end_sa_sw_peer_id_get)(uint8_t *buf); uint32_t (*hal_rx_msdu_end_sa_sw_peer_id_get)(uint8_t *buf);
void * (*hal_rx_msdu0_buffer_addr_lsb)(void *link_desc_addr);
void * (*hal_rx_msdu_desc_info_ptr_get)(void *msdu0);
void * (*hal_ent_mpdu_desc_info)(void *hw_addr);
void * (*hal_dst_mpdu_desc_info)(void *hw_addr);
}; };
/** /**

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@@ -3334,4 +3334,40 @@ uint32_t hal_rx_msdu_end_sa_sw_peer_id_get(hal_soc_handle_t hal_soc_hdl,
return QDF_STATUS_E_INVAL; return QDF_STATUS_E_INVAL;
} }
static inline
void *hal_rx_msdu0_buffer_addr_lsb(hal_soc_handle_t hal_soc_hdl,
void *link_desc_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_rx_msdu0_buffer_addr_lsb(link_desc_addr);
}
static inline
void *hal_rx_msdu_desc_info_ptr_get(hal_soc_handle_t hal_soc_hdl,
void *msdu_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_rx_msdu_desc_info_ptr_get(msdu_addr);
}
static inline
void *hal_ent_mpdu_desc_info(hal_soc_handle_t hal_soc_hdl,
void *hw_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_ent_mpdu_desc_info(hw_addr);
}
static inline
void *hal_dst_mpdu_desc_info(hal_soc_handle_t hal_soc_hdl,
void *hw_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_dst_mpdu_desc_info(hw_addr);
}
#endif /* _HAL_RX_H */ #endif /* _HAL_RX_H */

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@@ -758,6 +758,30 @@ void hal_tx_desc_set_mesh_en_6290(void *desc, uint8_t en)
HAL_SET_FLD(desc, TCL_DATA_CMD_4, MESH_ENABLE) |= HAL_SET_FLD(desc, TCL_DATA_CMD_4, MESH_ENABLE) |=
HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_6290(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_6290(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_6290(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_6290(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -825,6 +849,10 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_6290, hal_rx_hw_desc_get_ppduid_get_6290,
hal_rx_mpdu_start_mpdu_qos_control_valid_get_6290, hal_rx_mpdu_start_mpdu_qos_control_valid_get_6290,
hal_rx_msdu_end_sa_sw_peer_id_get_6290, hal_rx_msdu_end_sa_sw_peer_id_get_6290,
hal_rx_msdu0_buffer_addr_lsb_6290,
hal_rx_msdu_desc_info_ptr_get_6290,
hal_ent_mpdu_desc_info_6290,
hal_dst_mpdu_desc_info_6290,
}; };
struct hal_hw_srng_config hw_srng_table_6290[] = { struct hal_hw_srng_config hw_srng_table_6290[] = {

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@@ -233,6 +233,22 @@
RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \ RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
RX_MSDU_END_16_SA_SW_PEER_ID_LSB)) RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET
#define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
(uint8_t *)(msdu0) + \
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET
#define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
(uint8_t *)(ent_ring_desc) + \
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
#define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
(uint8_t *)(dst_ring_desc) + \
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
#if defined(QCA_WIFI_QCA6290_11AX) #if defined(QCA_WIFI_QCA6290_11AX)
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

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@@ -757,6 +757,30 @@ void hal_tx_desc_set_mesh_en_6390(void *desc, uint8_t en)
HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_6390(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_6390(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_6390(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_6390(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -824,6 +848,10 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_6390, hal_rx_hw_desc_get_ppduid_get_6390,
hal_rx_mpdu_start_mpdu_qos_control_valid_get_6390, hal_rx_mpdu_start_mpdu_qos_control_valid_get_6390,
hal_rx_msdu_end_sa_sw_peer_id_get_6390, hal_rx_msdu_end_sa_sw_peer_id_get_6390,
hal_rx_msdu0_buffer_addr_lsb_6390,
hal_rx_msdu_desc_info_ptr_get_6390,
hal_ent_mpdu_desc_info_6390,
hal_dst_mpdu_desc_info_6390,
}; };
struct hal_hw_srng_config hw_srng_table_6390[] = { struct hal_hw_srng_config hw_srng_table_6390[] = {

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@@ -239,6 +239,22 @@
RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \ RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
RX_MSDU_END_16_SA_SW_PEER_ID_LSB)) RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET
#define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
(uint8_t *)(msdu0) + \
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET
#define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
(uint8_t *)(ent_ring_desc) + \
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
#define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
(uint8_t *)(dst_ring_desc) + \
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
/* /*
* hal_rx_msdu_start_nss_get_6390(): API to get the NSS * hal_rx_msdu_start_nss_get_6390(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

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@@ -629,6 +629,30 @@ void hal_tx_desc_set_mesh_en_6490(void *desc, uint8_t en)
HAL_TX_SM(TCL_DATA_CMD_5, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_5, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_6490(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_6490(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_6490(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_6490(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* tx */ /* tx */
hal_tx_desc_set_mesh_en_6490, hal_tx_desc_set_mesh_en_6490,
@@ -658,4 +682,8 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_6490, hal_rx_hw_desc_get_ppduid_get_6490,
NULL, NULL,
NULL, NULL,
hal_rx_msdu0_buffer_addr_lsb_6490,
hal_rx_msdu_desc_info_ptr_get_6490,
hal_ent_mpdu_desc_info_6490,
hal_dst_mpdu_desc_info_6490,
}; };

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@@ -213,3 +213,19 @@
RX_MSDU_END_14_SA_SW_PEER_ID_OFFSET)), \ RX_MSDU_END_14_SA_SW_PEER_ID_OFFSET)), \
RX_MSDU_END_14_SA_SW_PEER_ID_MASK, \ RX_MSDU_END_14_SA_SW_PEER_ID_MASK, \
RX_MSDU_END_14_SA_SW_PEER_ID_LSB)) RX_MSDU_END_14_SA_SW_PEER_ID_LSB))
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_8_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET
#define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
(uint8_t *)(msdu0) + \
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET
#define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
(uint8_t *)(ent_ring_desc) + \
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET
#define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
(uint8_t *)(dst_ring_desc) + \
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET

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@@ -755,6 +755,30 @@ void hal_tx_desc_set_mesh_en_8074v1(void *desc, uint8_t en)
HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_8074v1(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_8074v1(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_8074v1(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_8074v1(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -823,6 +847,10 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_8074v1, hal_rx_hw_desc_get_ppduid_get_8074v1,
hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1, hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1,
hal_rx_msdu_end_sa_sw_peer_id_get_8074v1, hal_rx_msdu_end_sa_sw_peer_id_get_8074v1,
hal_rx_msdu0_buffer_addr_lsb_8074v1,
hal_rx_msdu_desc_info_ptr_get_8074v1,
hal_ent_mpdu_desc_info_8074v1,
hal_dst_mpdu_desc_info_8074v1,
}; };
struct hal_hw_srng_config hw_srng_table_8074[] = { struct hal_hw_srng_config hw_srng_table_8074[] = {

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@@ -221,6 +221,23 @@
RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \ RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \
RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \ RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
RX_MSDU_END_16_SA_SW_PEER_ID_LSB)) RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET
#define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
(uint8_t *)(msdu0) + \
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET
#define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
(uint8_t *)(ent_ring_desc) + \
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
#define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
(uint8_t *)(dst_ring_desc) + \
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
/* /*
* hal_rx_msdu_start_nss_get_8074(): API to get the NSS * hal_rx_msdu_start_nss_get_8074(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

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@@ -752,6 +752,30 @@ void hal_tx_desc_set_mesh_en_8074v2(void *desc, uint8_t en)
HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_8074v2(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_8074v2(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_8074v2(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_8074v2(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -821,6 +845,10 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_8074v2, hal_rx_hw_desc_get_ppduid_get_8074v2,
hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v2, hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v2,
hal_rx_msdu_end_sa_sw_peer_id_get_8074v2, hal_rx_msdu_end_sa_sw_peer_id_get_8074v2,
hal_rx_msdu0_buffer_addr_lsb_8074v2,
hal_rx_msdu_desc_info_ptr_get_8074v2,
hal_ent_mpdu_desc_info_8074v2,
hal_dst_mpdu_desc_info_8074v2,
}; };
struct hal_hw_srng_config hw_srng_table_8074v2[] = { struct hal_hw_srng_config hw_srng_table_8074v2[] = {

View File

@@ -231,6 +231,22 @@
RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \ RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \
RX_MSDU_END_16_SA_SW_PEER_ID_LSB)) RX_MSDU_END_16_SA_SW_PEER_ID_LSB))
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET
#define HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0) \
(uint8_t *)(msdu0) + \
RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET
#define HAL_ENT_MPDU_DESC_INFO(ent_ring_desc) \
(uint8_t *)(ent_ring_desc) + \
RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
#define HAL_DST_MPDU_DESC_INFO(dst_ring_desc) \
(uint8_t *)(dst_ring_desc) + \
REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET
/* /*
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS * hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

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@@ -761,6 +761,30 @@ void hal_tx_desc_set_mesh_en_9000(void *desc, uint8_t en)
HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en); HAL_TX_SM(TCL_DATA_CMD_4, MESH_ENABLE, en);
} }
static
void *hal_rx_msdu0_buffer_addr_lsb_9000(void *link_desc_va)
{
return (void *)HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va);
}
static
void *hal_rx_msdu_desc_info_ptr_get_9000(void *msdu0)
{
return (void *)HAL_RX_MSDU_DESC_INFO_PTR_GET(msdu0);
}
static
void *hal_ent_mpdu_desc_info_9000(void *ent_ring_desc)
{
return (void *)HAL_ENT_MPDU_DESC_INFO(ent_ring_desc);
}
static
void *hal_dst_mpdu_desc_info_9000(void *dst_ring_desc)
{
return (void *)HAL_DST_MPDU_DESC_INFO(dst_ring_desc);
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -830,6 +854,10 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_hw_desc_get_ppduid_get_9000, hal_rx_hw_desc_get_ppduid_get_9000,
hal_rx_mpdu_start_mpdu_qos_control_valid_9000, hal_rx_mpdu_start_mpdu_qos_control_valid_9000,
hal_rx_msdu_end_sa_sw_peer_id_get_9000, hal_rx_msdu_end_sa_sw_peer_id_get_9000,
hal_rx_msdu0_buffer_addr_lsb_9000,
hal_rx_msdu_desc_info_ptr_get_9000,
hal_ent_mpdu_desc_info_9000,
hal_dst_mpdu_desc_info_9000,
}; };
struct hal_hw_srng_config hw_srng_table_9000[] = { struct hal_hw_srng_config hw_srng_table_9000[] = {