msm: eva: Fix NoC Hang When accessing NoC
Acquire xo_reset before accessing CVP NoC. There is a chance the NoC clock, XO clock is disabled during XO reset. Acquiring xo_reset will block the XO clock reset. Change-Id: I51ab201beafbd1a4b998ee33a9d23c1efa3e2a14 Signed-off-by: George Shen <quic_sqiao@quicinc.com>
此提交包含在：
George Shen
@@ -100,6 +100,7 @@ static void power_off_iris2(struct iris_hfi_device *device);
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static int __set_ubwc_config(struct iris_hfi_device *device);
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static void __noc_error_info_iris2(struct iris_hfi_device *device);
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static int __enable_hw_power_collapse(struct iris_hfi_device *device);
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static int __disable_hw_power_collapse(struct iris_hfi_device *device);
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static int __power_off_controller(struct iris_hfi_device *device);
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static int __hwfence_regs_map(struct iris_hfi_device *device);
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@@ -386,6 +387,25 @@ err_reg_handoff_failed:
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return rc;
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}
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static int __take_back_regulators(struct iris_hfi_device *device)
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{
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struct regulator_info *rinfo;
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int rc = 0;
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iris_hfi_for_each_regulator(device, rinfo) {
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rc = __acquire_regulator(rinfo, device);
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/*
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* if one regulator hand off failed, driver should take
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* the control for other regulators back.
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*/
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if (rc)
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return rc;
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}
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return rc;
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}
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static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
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bool *rx_req_is_set)
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{
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@@ -772,38 +792,6 @@ static int __read_register(struct iris_hfi_device *device, u32 reg)
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return rc;
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}
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static bool __noc_access_ok(struct iris_hfi_device *device)
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{
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int ret;
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ret = __read_register(device, CVP_CC_MVS1C_CBCR);
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if (ret & 0x80000000) {
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dprintk(CVP_ERR, "%s MVS1C off\n", __func__);
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return false;
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}
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ret = __read_register(device, CVP_CC_MVS1_CBCR);
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if (ret & 0x80000000) {
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dprintk(CVP_ERR, "%s MVS1 off\n", __func__);
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return false;
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}
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ret = __read_register(device, CVP_CC_AHB_CBCR);
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if (ret & 0x80000000) {
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dprintk(CVP_ERR, "%s AHB off\n", __func__);
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return false;
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}
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ret = __read_register(device, CVP_CC_XO_CBCR);
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if (ret & 0x80000000) {
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dprintk(CVP_ERR, "%s XO off\n", __func__);
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return false;
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}
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ret = __read_register(device, CVP_CC_SLEEP_CBCR);
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if (ret & 0x80000000) {
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dprintk(CVP_ERR, "%s SLEEP off\n", __func__);
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return false;
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}
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return true;
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}
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static int __set_registers(struct iris_hfi_device *device)
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{
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struct msm_cvp_core *core;
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@@ -829,8 +817,11 @@ static int __set_registers(struct iris_hfi_device *device)
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reg_set->reg_tbl[i].value);
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}
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if (!__noc_access_ok(device))
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i = call_iris_op(device, reset_control_acquire_name, device, "cvp_xo_reset");
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if (i) {
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dprintk(CVP_WARN, "%s Fail acquire xo_reset\n", __func__);
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return -EINVAL;
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}
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__write_register(device, CVP_CPU_CS_AXI4_QOS,
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pdata->noc_qos->axi_qos);
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@@ -854,6 +845,22 @@ static int __set_registers(struct iris_hfi_device *device)
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pdata->noc_qos->dangerlut_low);
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__write_register(device, CVP_NOC_CDM_SAFELUT_LOW,
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pdata->noc_qos->safelut_low);
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/* Below registers write moved from FW to SW to enable UBWC */
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__write_register(device, CVP_NOC_RGE_NIU_DECCTL_LOW,
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0x1);
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__write_register(device, CVP_NOC_RGE_NIU_ENCCTL_LOW,
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0x1);
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__write_register(device, CVP_NOC_GCE_VADL_TOF_NIU_DECCTL_LOW,
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0x1);
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__write_register(device, CVP_NOC_GCE_VADL_TOF_NIU_ENCCTL_LOW,
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0x1);
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__write_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS,
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0x3);
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__write_register(device, CVP_NOC_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW,
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0x1);
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call_iris_op(device, reset_control_release_name, device, "cvp_xo_reset");
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return 0;
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}
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@@ -2269,6 +2276,9 @@ static int iris_hfi_core_release(void *dev)
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__resume(device);
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__set_state(device, IRIS_STATE_DEINIT);
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rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
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if (rc)
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dprintk(CVP_WARN, "Failed to suspend cvp FW%d\n", rc);
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__dsp_shutdown(device);
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@@ -3896,6 +3906,23 @@ disable_regulator_failed:
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return rc;
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}
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static int __disable_hw_power_collapse(struct iris_hfi_device *device)
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{
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int rc = 0;
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if (!msm_cvp_fw_low_power_mode) {
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dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
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return 0;
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}
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rc = __take_back_regulators(device);
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if (rc)
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dprintk(CVP_WARN,
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"%s : Failed to disable HW power collapse %d\n",
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__func__, rc);
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return rc;
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}
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static int __enable_hw_power_collapse(struct iris_hfi_device *device)
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{
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int rc = 0;
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@@ -4317,6 +4344,7 @@ static int __iris_power_on(struct iris_hfi_device *device)
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/*
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* Re-program all of the registers that get reset as a result of
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* regulator_disable() and _enable()
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* calling below function requires CORE powered on
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*/
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rc = __set_registers(device);
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if (rc)
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@@ -4379,6 +4407,7 @@ static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
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u32 sbm_ln0_low, axi_cbcr;
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u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
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u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
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int rc;
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sbm_ln0_low =
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__read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
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@@ -4403,12 +4432,18 @@ static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
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goto exit;
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}
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rc = call_iris_op(device, reset_control_acquire_name, device, "cvp_xo_reset");
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if (rc) {
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dprintk(CVP_WARN, "%s Fail acquire xo_reset\n", __func__);
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goto exit;
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}
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main_sbm_ln0_low = __read_register(device,
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CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
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main_sbm_ln0_high = __read_register(device,
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CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_HIGH);
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main_sbm_ln1_high = __read_register(device,
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CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
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call_iris_op(device, reset_control_release_name, device, "cvp_xo_reset");
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exit:
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cpu_cs_x2rpmh = cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK);
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@@ -4431,33 +4466,6 @@ static int __power_off_controller(struct iris_hfi_device *device)
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__write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
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/* HPG 6.2.2 Step 2, noc to low power */
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#ifndef CONFIG_EVA_PINEAPPLE
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__write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
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while (!reg_status && count < max_count) {
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lpi_status =
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__read_register(device,
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CVP_AON_WRAPPER_CVP_NOC_LPI_STATUS);
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reg_status = lpi_status & BIT(0);
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/* Wait for Core noc lpi status to be set */
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usleep_range(50, 100);
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count++;
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}
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dprintk(CVP_PWR,
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"Core Noc: lpi_status %x noc_status %x (count %d)\n",
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lpi_status, reg_status, count);
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if (count == max_count) {
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u32 pc_ready, wfi_status;
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wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
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pc_ready = __read_register(device, CVP_CTRL_STATUS);
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dprintk(CVP_WARN,
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"Core NOC not in qaccept status %x %x %x %x\n",
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reg_status, lpi_status, wfi_status, pc_ready);
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__print_sidebandmanager_regs(device);
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}
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#endif
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/* New addition to put CPU/Tensilica to low power */
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reg_status = 0;
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@@ -4623,6 +4631,15 @@ static int __power_off_core(struct iris_hfi_device *device)
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msm_cvp_disable_unprepare_clk(device, "core_clk");
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msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
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return 0;
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} else if (!(value & 0x2)) {
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/*
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* HW_CONTROL PC disabled, then core is powered on for
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* CVP NoC access
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*/
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__disable_regulator(device, "cvp-core");
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msm_cvp_disable_unprepare_clk(device, "core_clk");
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msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
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return 0;
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}
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dprintk(CVP_PWR, "Driver controls Core power off now\n");
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@@ -4656,41 +4673,6 @@ static int __power_off_core(struct iris_hfi_device *device)
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warn_flag = 1;
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}
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#ifndef CONFIG_EVA_PINEAPPLE
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/* Apply partial reset on MSF interface and wait for ACK */
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__write_register(device, CVP_NOC_RESET_REQ, 0x7);
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count = 0;
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do {
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value = __read_register(device, CVP_NOC_RESET_ACK);
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if ((value & 0x7) == 0x7)
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break;
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else
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usleep_range(100, 200);
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count++;
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} while (count < max_count);
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if (count == max_count) {
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dprintk(CVP_WARN, "Core NoC reset assert failed %x\n", value);
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warn_flag = 1;
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}
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/* De-assert partial reset on MSF interface and wait for ACK */
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__write_register(device, CVP_NOC_RESET_REQ, 0x0);
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count = 0;
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do {
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value = __read_register(device, CVP_NOC_RESET_ACK);
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if ((value & 0x1) == 0x0)
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break;
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else
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usleep_range(100, 200);
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count++;
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} while (count < max_count);
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if (count == max_count) {
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dprintk(CVP_WARN, "Core NoC reset de-assert failed\n");
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warn_flag = 1;
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}
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#else
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count = 0;
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max_count = 1000;
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__write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
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@@ -4720,7 +4702,6 @@ static int __power_off_core(struct iris_hfi_device *device)
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}
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__write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x0);
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#endif
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if (warn_flag)
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__print_sidebandmanager_regs(device);
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@@ -4732,6 +4713,8 @@ static int __power_off_core(struct iris_hfi_device *device)
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__write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
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__disable_hw_power_collapse(device);
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usleep_range(100, 200);
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__disable_regulator(device, "cvp-core");
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msm_cvp_disable_unprepare_clk(device, "core_clk");
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msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
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@@ -4982,8 +4965,9 @@ static void __noc_error_info_iris2(struct iris_hfi_device *device)
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{
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struct msm_cvp_core *core;
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struct cvp_noc_log *noc_log;
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u32 val = 0, regi, i;
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u32 val = 0, regi, regii, regiii, i;
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bool log_required = false;
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int rc;
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core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
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@@ -4998,6 +4982,15 @@ static void __noc_error_info_iris2(struct iris_hfi_device *device)
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}
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noc_log->used = 1;
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__disable_hw_power_collapse(device);
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val = __read_register(device, CVP_CC_MVS1_GDSCR);
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regi = __read_register(device, CVP_AON_WRAPPER_CVP_NOC_CORE_CLK_CONTROL);
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regii = __read_register(device, CVP_CC_MVS1_CBCR);
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regiii = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
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dprintk(CVP_ERR, "noc reg check: %#x %#x %#x %#x\n",
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val, regi, regii, regiii);
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val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
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__err_log(log_required, &noc_log->err_ctrl_swid_low,
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"CVP_NOC_ERL_MAIN_SWID_LOW", val);
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@@ -5038,6 +5031,12 @@ static void __noc_error_info_iris2(struct iris_hfi_device *device)
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__err_log(log_required, &noc_log->err_ctrl_errlog3_high,
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"CVP_NOC_ERL_MAIN_ERRLOG3_HIGH", val);
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rc = call_iris_op(device, reset_control_acquire_name, device, "cvp_xo_reset");
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if (rc) {
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dprintk(CVP_WARN, "%s Fail acquire xo_reset\n", __func__);
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return;
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}
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val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
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__err_log(log_required, &noc_log->err_core_swid_low,
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"CVP_NOC__CORE_ERL_MAIN_SWID_LOW", val);
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@@ -5078,6 +5077,8 @@ static void __noc_error_info_iris2(struct iris_hfi_device *device)
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
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__err_log(log_required, &noc_log->err_core_errlog3_high,
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"CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH", val);
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__write_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS, 0x1);
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call_iris_op(device, reset_control_release_name, device, "cvp_xo_reset");
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#define CVP_SS_CLK_HALT 0x8
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#define CVP_SS_CLK_EN 0xC
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#define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
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