qcacmn: Handle Umac reset for MLO case

1. Add an API to process trigger_umac_recovery T2H message.
2. Synchronize do_pre_reset, do_post_reset_start, do_post_reset_complete
   messages for all the SOCs and then process these messages in the host.
3. Synchronize pre_reset_done, post_reset_start_done,
   post_reset_complete_done for all the SOCs before sending it to FW.
4. Add a new state in host for trigger_umac_recovery message.
   Ignore back to back trigger_umac_recovery messages received from FW.

Change-Id: Id45d326d63e122834090844e83ad6cc7240f96af
CRs-Fixed: 3425833
此提交包含在:
Pavankumar Nandeshwar
2023-02-20 01:54:25 -08:00
提交者 Madan Koyyalamudi
父節點 ff85561570
當前提交 80d41dc9b4
共有 12 個檔案被更改,包括 868 行新增123 行删除

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@@ -2625,14 +2625,16 @@ uint8_t hif_get_max_wmi_ep(struct hif_opaque_softc *scn);
/**
* hif_register_umac_reset_handler() - Register UMAC HW reset handler
* @hif_scn: hif opaque handle
* @handler: callback handler function
* @irq_handler: irq callback handler function
* @tl_handler: tasklet callback handler function
* @cb_ctx: context to passed to @handler
* @irq: irq number to be used for UMAC HW reset interrupt
*
* Return: QDF_STATUS of operation
*/
QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
int (*handler)(void *cb_ctx),
bool (*irq_handler)(void *cb_ctx),
int (*tl_handler)(void *cb_ctx),
void *cb_ctx, int irq);
/**
@@ -2647,7 +2649,8 @@ QDF_STATUS hif_get_umac_reset_irq(struct hif_opaque_softc *hif_scn,
#else
static inline
QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
int (*handler)(void *cb_ctx),
bool (*irq_handler)(void *cb_ctx),
int (*tl_handler)(void *cb_ctx),
void *cb_ctx, int irq)
{
return QDF_STATUS_SUCCESS;

查看文件

@@ -1197,8 +1197,9 @@ static irqreturn_t hif_umac_reset_irq_handler(int irq, void *ctx)
{
struct hif_umac_reset_ctx *umac_reset_ctx = ctx;
/* Schedule the tasklet and exit */
tasklet_hi_schedule(&umac_reset_ctx->intr_tq);
/* Schedule the tasklet if it is umac reset interrupt and exit */
if (umac_reset_ctx->irq_handler(umac_reset_ctx->cb_ctx))
tasklet_hi_schedule(&umac_reset_ctx->intr_tq);
return IRQ_HANDLED;
}
@@ -1224,7 +1225,8 @@ QDF_STATUS hif_get_umac_reset_irq(struct hif_opaque_softc *hif_scn,
qdf_export_symbol(hif_get_umac_reset_irq);
QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
int (*handler)(void *cb_ctx),
bool (*irq_handler)(void *cb_ctx),
int (*tl_handler)(void *cb_ctx),
void *cb_ctx, int irq)
{
struct hif_softc *hif_sc = HIF_GET_SOFTC(hif_scn);
@@ -1238,7 +1240,8 @@ QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
umac_reset_ctx = &hif_sc->umac_reset_ctx;
umac_reset_ctx->cb_handler = handler;
umac_reset_ctx->irq_handler = irq_handler;
umac_reset_ctx->cb_handler = tl_handler;
umac_reset_ctx->cb_ctx = cb_ctx;
umac_reset_ctx->os_irq = irq;

查看文件

@@ -243,6 +243,7 @@ struct hif_cfg {
/**
* struct hif_umac_reset_ctx - UMAC HW reset context at HIF layer
* @intr_tq: Tasklet structure
* @irq_handler: IRQ handler
* @cb_handler: Callback handler
* @cb_ctx: Argument to be passed to @cb_handler
* @os_irq: Interrupt number for this IRQ
@@ -250,6 +251,7 @@ struct hif_cfg {
*/
struct hif_umac_reset_ctx {
struct tasklet_struct intr_tq;
bool (*irq_handler)(void *cb_ctx);
int (*cb_handler)(void *cb_ctx);
void *cb_ctx;
uint32_t os_irq;