qcacmn: Handle Umac reset for MLO case
1. Add an API to process trigger_umac_recovery T2H message. 2. Synchronize do_pre_reset, do_post_reset_start, do_post_reset_complete messages for all the SOCs and then process these messages in the host. 3. Synchronize pre_reset_done, post_reset_start_done, post_reset_complete_done for all the SOCs before sending it to FW. 4. Add a new state in host for trigger_umac_recovery message. Ignore back to back trigger_umac_recovery messages received from FW. Change-Id: Id45d326d63e122834090844e83ad6cc7240f96af CRs-Fixed: 3425833
此提交包含在:

提交者
Madan Koyyalamudi

父節點
ff85561570
當前提交
80d41dc9b4
@@ -2625,14 +2625,16 @@ uint8_t hif_get_max_wmi_ep(struct hif_opaque_softc *scn);
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/**
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* hif_register_umac_reset_handler() - Register UMAC HW reset handler
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* @hif_scn: hif opaque handle
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* @handler: callback handler function
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* @irq_handler: irq callback handler function
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* @tl_handler: tasklet callback handler function
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* @cb_ctx: context to passed to @handler
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* @irq: irq number to be used for UMAC HW reset interrupt
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*
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* Return: QDF_STATUS of operation
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*/
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QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
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int (*handler)(void *cb_ctx),
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bool (*irq_handler)(void *cb_ctx),
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int (*tl_handler)(void *cb_ctx),
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void *cb_ctx, int irq);
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/**
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@@ -2647,7 +2649,8 @@ QDF_STATUS hif_get_umac_reset_irq(struct hif_opaque_softc *hif_scn,
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#else
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static inline
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QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
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int (*handler)(void *cb_ctx),
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bool (*irq_handler)(void *cb_ctx),
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int (*tl_handler)(void *cb_ctx),
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void *cb_ctx, int irq)
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{
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return QDF_STATUS_SUCCESS;
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@@ -1197,8 +1197,9 @@ static irqreturn_t hif_umac_reset_irq_handler(int irq, void *ctx)
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{
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struct hif_umac_reset_ctx *umac_reset_ctx = ctx;
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/* Schedule the tasklet and exit */
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tasklet_hi_schedule(&umac_reset_ctx->intr_tq);
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/* Schedule the tasklet if it is umac reset interrupt and exit */
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if (umac_reset_ctx->irq_handler(umac_reset_ctx->cb_ctx))
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tasklet_hi_schedule(&umac_reset_ctx->intr_tq);
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return IRQ_HANDLED;
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}
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@@ -1224,7 +1225,8 @@ QDF_STATUS hif_get_umac_reset_irq(struct hif_opaque_softc *hif_scn,
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qdf_export_symbol(hif_get_umac_reset_irq);
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QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
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int (*handler)(void *cb_ctx),
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bool (*irq_handler)(void *cb_ctx),
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int (*tl_handler)(void *cb_ctx),
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void *cb_ctx, int irq)
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{
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struct hif_softc *hif_sc = HIF_GET_SOFTC(hif_scn);
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@@ -1238,7 +1240,8 @@ QDF_STATUS hif_register_umac_reset_handler(struct hif_opaque_softc *hif_scn,
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umac_reset_ctx = &hif_sc->umac_reset_ctx;
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umac_reset_ctx->cb_handler = handler;
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umac_reset_ctx->irq_handler = irq_handler;
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umac_reset_ctx->cb_handler = tl_handler;
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umac_reset_ctx->cb_ctx = cb_ctx;
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umac_reset_ctx->os_irq = irq;
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@@ -243,6 +243,7 @@ struct hif_cfg {
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/**
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* struct hif_umac_reset_ctx - UMAC HW reset context at HIF layer
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* @intr_tq: Tasklet structure
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* @irq_handler: IRQ handler
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* @cb_handler: Callback handler
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* @cb_ctx: Argument to be passed to @cb_handler
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* @os_irq: Interrupt number for this IRQ
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@@ -250,6 +251,7 @@ struct hif_cfg {
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*/
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struct hif_umac_reset_ctx {
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struct tasklet_struct intr_tq;
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bool (*irq_handler)(void *cb_ctx);
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int (*cb_handler)(void *cb_ctx);
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void *cb_ctx;
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uint32_t os_irq;
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