msm: eva: add AON mapping for FW

added support to map AON reg range for FW
updated clk_get return check

Change-Id: I93732f840a6354558853d6c6644b569c53fa93db
Signed-off-by: Yu SI <quic_ysi@quicinc.com>

msm/eva/cvp_hfi.c

@@ -1928,27 +1928,44 @@ static int __hwfence_regs_map(struct iris_hfi_device *device)
 		return -EINVAL;
 	}
 
-	rc = iommu_map(cb->domain, device->res->ipclite_iova,
+	if (device->res->ipclite_phyaddr != 0) {
+		rc = iommu_map(cb->domain, device->res->ipclite_iova,
 			device->res->ipclite_phyaddr,
 			device->res->ipclite_size,
 			IOMMU_READ | IOMMU_WRITE);
-	if (rc) {
+		if (rc) {
-		dprintk(CVP_ERR, "map ipclite fail %d %#x %#x %#x\n",
+			dprintk(CVP_ERR, "map ipclite fail %d %#x %#x %#x\n",
-			rc, device->res->ipclite_iova,
+				rc, device->res->ipclite_iova,
-			device->res->ipclite_phyaddr,
+				device->res->ipclite_phyaddr,
-			device->res->ipclite_size);
+				device->res->ipclite_size);
-		return rc;
+			return rc;
+		}
 	}
-	rc = iommu_map(cb->domain, device->res->hwmutex_iova,
+	if (device->res->hwmutex_phyaddr != 0) {
+		rc = iommu_map(cb->domain, device->res->hwmutex_iova,
 			device->res->hwmutex_phyaddr,
 			device->res->hwmutex_size,
 			IOMMU_MMIO | IOMMU_READ | IOMMU_WRITE);
-	if (rc) {
+		if (rc) {
-		dprintk(CVP_ERR, "map hwmutex fail %d %#x %#x %#x\n",
+			dprintk(CVP_ERR, "map hwmutex fail %d %#x %#x %#x\n",
-			rc, device->res->hwmutex_iova,
+				rc, device->res->hwmutex_iova,
-			device->res->hwmutex_phyaddr,
+				device->res->hwmutex_phyaddr,
-			device->res->hwmutex_size);
+				device->res->hwmutex_size);
-		return rc;
+			return rc;
+		}
+	}
+	if (device->res->aon_phyaddr != 0) {
+		rc = iommu_map(cb->domain, device->res->aon_iova,
+			device->res->aon_phyaddr,
+			device->res->aon_size,
+			IOMMU_READ | IOMMU_WRITE);
+		if (rc) {
+			dprintk(CVP_ERR, "map aon fail %d %#x %#x %#x\n",
+				rc, device->res->aon_iova,
+				device->res->aon_phyaddr,
+				device->res->aon_size);
+			return rc;
+		}
 	}
 	return rc;
 }
@@ -1964,10 +1981,18 @@ static int __hwfence_regs_unmap(struct iris_hfi_device *device)
 		return -EINVAL;
 	}
 
-	iommu_unmap(cb->domain, device->res->ipclite_iova,
+	if (device->res->ipclite_iova != 0) {
+		iommu_unmap(cb->domain, device->res->ipclite_iova,
 			device->res->ipclite_size);
-	iommu_unmap(cb->domain, device->res->hwmutex_iova,
+	}
+	if (device->res->hwmutex_iova != 0) {
+		iommu_unmap(cb->domain, device->res->hwmutex_iova,
 			device->res->hwmutex_size);
+	}
+	if (device->res->aon_iova != 0) {
+		iommu_unmap(cb->domain, device->res->aon_iova,
+			device->res->aon_size);
+	}
 	return rc;
 }
 

msm/eva/msm_cvp_clocks.c

@@ -416,10 +416,11 @@ int msm_cvp_init_clocks(struct iris_hfi_device *device)
 	iris_hfi_for_each_clock(device, cl) {
 		if (!cl->clk) {
 			cl->clk = clk_get(&device->res->pdev->dev, cl->name);
-			if (IS_ERR_OR_NULL(cl->clk)) {
+			if (IS_ERR(cl->clk)) {
+				rc = PTR_ERR(cl->clk);
 				dprintk(CVP_ERR,
-					"Failed to get clock: %s\n", cl->name);
+					"Failed to get clock: %s, rc %d\n",
-				rc = PTR_ERR(cl->clk) ? : -EINVAL;
+					cl->name, rc);
 				cl->clk = NULL;
 				goto err_clk_get;
 			}

msm/eva/msm_cvp_res_parse.c

@@ -146,6 +146,7 @@ static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 	int ret = 0;
 	unsigned int ipclite_mapping_config[3];
 	unsigned int hwmutex_mapping_config[3];
+	unsigned int aon_mapping_config[3];
 	struct platform_device *pdev = res->pdev;
 
 	ret = of_property_read_u32_array(pdev->dev.of_node, "ipclite_mappings",
@@ -170,6 +171,20 @@ static int msm_cvp_load_regspace_mapping(struct msm_cvp_platform_resources *res)
 	dprintk(CVP_CORE, "ipclite %#x %#x %#x hwmutex %#x %#x %#x\n",
 		res->ipclite_iova, res->ipclite_phyaddr, res->ipclite_size,
 		res->hwmutex_iova, res->hwmutex_phyaddr, res->hwmutex_size);
+
+
+	ret = of_property_read_u32_array(pdev->dev.of_node, "aon_mappings",
+		aon_mapping_config, 3);
+	if (ret) {
+		dprintk(CVP_ERR, "Failed to read aon reg: %d\n", ret);
+		return ret;
+	}
+	res->aon_iova = aon_mapping_config[0];
+	res->aon_size = aon_mapping_config[1];
+	res->aon_phyaddr = aon_mapping_config[2];
+	dprintk(CVP_CORE, "aon %#x %#x %#x \n",
+		res->hwmutex_iova, res->hwmutex_phyaddr, res->hwmutex_size);
+
 	return ret;
 }
 

msm/eva/msm_cvp_resources.h

@@ -167,6 +167,9 @@ struct msm_cvp_platform_resources {
 	phys_addr_t hwmutex_iova;
 	phys_addr_t hwmutex_phyaddr;
 	uint32_t hwmutex_size;
+	phys_addr_t aon_iova;
+	phys_addr_t aon_phyaddr;
+	uint32_t aon_size;
 	uint32_t irq;
 	uint32_t sku_version;
 	struct allowed_clock_rates_table *allowed_clks_tbl;