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video: driver: add dma mask attribute to context banks

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Upstream driver doesn't support context bank address ranges,
so add dma mask attribute to context bank to specify address
range for upstream driver.

Change-Id: I09191b500006d6c7abf364fbfa22377b480a4b4d
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
This commit is contained in:
Dikshita Agarwal
2022-11-04 12:46:35 +05:30
parent 1ac85a3237
commit 8030903f1e
7 changed files with 38 additions and 25 deletions
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12
driver/platform/anorak/src/msm_vidc_anorak.c
View File

@@ -2451,13 +2451,13 @@ static const struct subcache_table anorak_subcache_table[] = {
{ "vidvsp", LLCC_VIDVSP },
};
/* name, start, size, secure, dma_coherant, region */
/* name, start, size, secure, dma_coherant, region, dma_mask */
const struct context_bank_table anorak_context_bank_table[] = {
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM },
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 },
};
/* freq */

1
driver/platform/common/inc/msm_vidc_platform.h
View File

@@ -74,6 +74,7 @@ struct context_bank_table {
bool secure;
bool dma_coherant;
u32 region;
u64 dma_mask;
};
struct freq_table {

12
driver/platform/kalama/src/msm_vidc_kalama.c
View File

@@ -2662,13 +2662,13 @@ static const struct subcache_table kalama_subcache_table[] = {
{ "vidvsp", LLCC_VIDVSP },
};
/* name, start, size, secure, dma_coherant, region */
/* name, start, size, secure, dma_coherant, region, dma_mask */
const struct context_bank_table kalama_context_bank_table[] = {
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM },
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 },
};
/* freq */

12
driver/platform/pineapple/src/msm_vidc_pineapple.c
View File

@@ -2662,13 +2662,13 @@ static const struct subcache_table pineapple_subcache_table[] = {
{ "vidsc0", LLCC_VIDSC0 },
};
/* name, start, size, secure, dma_coherant */
/* name, start, size, secure, dma_coherant, region, dma_mask */
const struct context_bank_table pineapple_context_bank_table[] = {
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM },
{"qcom,vidc,cb-ns", 0x25800000, 0xba800000, 0, 1, MSM_VIDC_NON_SECURE, 0 },
{"qcom,vidc,cb-ns-pxl", 0x00100000, 0xdff00000, 0, 1, MSM_VIDC_NON_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-pxl", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_PIXEL, 0 },
{"qcom,vidc,cb-sec-non-pxl", 0x01000000, 0x24800000, 1, 0, MSM_VIDC_SECURE_NONPIXEL, 0 },
{"qcom,vidc,cb-sec-bitstream", 0x00500000, 0xdfb00000, 1, 0, MSM_VIDC_SECURE_BITSTREAM, 0 },
};
/* freq */

1
driver/vidc/inc/resources.h
View File

@@ -167,6 +167,7 @@ struct context_bank_info {
struct device *dev;
struct iommu_domain *domain;
u32 region;
u64 dma_mask;
};
struct context_bank_set {

19
driver/vidc/src/msm_vidc_probe.c
View File

@@ -376,6 +376,14 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core,
cb->dev = dev;
cb->domain = iommu_get_domain_for_dev(cb->dev);
if (cb->dma_mask) {
rc = dma_set_mask_and_coherent(cb->dev, cb->dma_mask);
if (rc) {
d_vpr_e("%s: dma_set_mask_and_coherent failed\n", __func__);
return rc;
}
}
/*
* When memory is fragmented, below configuration increases the
* possibility to get a mapping for buffer in the configured CB.
@@ -401,10 +409,11 @@ static int msm_vidc_setup_context_bank(struct msm_vidc_core *core,
msm_vidc_smmu_fault_handler, (void *)core);
d_vpr_h(
"%s: name %s addr start %x size %x secure %d dma_coherant %d region %d dev_name %s domain %pK\n",
"%s: name %s addr start %x size %x secure %d dma_coherant %d "
"region %d dev_name %s domain %pK dma_mask %llu\n",
__func__, cb->name, cb->addr_range.start,
cb->addr_range.size, cb->secure, cb->dma_coherant,
cb->region, dev_name(cb->dev), cb->domain);
cb->region, dev_name(cb->dev), cb->domain, cb->dma_mask);
return rc;
}
@@ -610,7 +619,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev)
struct component_match *match = NULL;
struct msm_vidc_core *core = NULL;
struct device_node *child = NULL;
int sub_device_count = 0, nr = BASE_DEVICE_NUMBER;
int sub_node_count = 0, nr = BASE_DEVICE_NUMBER;
d_vpr_h("%s: %s\n", __func__, dev_name(&pdev->dev));
@@ -709,7 +718,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev)
/* registering sub-device with component model framework */
for_each_available_child_of_node(pdev->dev.of_node, child) {
sub_device_count++;
sub_node_count++;
of_node_get(child);
component_match_add_release(&pdev->dev, &match, msm_vidc_component_release_of,
msm_vidc_component_compare_of, child);
@@ -721,7 +730,7 @@ static int msm_vidc_probe_video_device(struct platform_device *pdev)
}
}
d_vpr_h("populating sub devices. count %d\n", sub_device_count);
d_vpr_h("populating sub devices. count %d\n", sub_node_count);
/*
* Trigger probe for each sub-device i.e. qcom,msm-vidc,context-bank.
* When msm_vidc_probe is called for each sub-device, parse the

6
driver/vidc/src/resources.c
View File

@@ -554,14 +554,16 @@ static int __init_context_banks(struct msm_vidc_core *core)
cbs->context_bank_tbl[cnt].secure = cb_tbl[cnt].secure;
cbs->context_bank_tbl[cnt].dma_coherant = cb_tbl[cnt].dma_coherant;
cbs->context_bank_tbl[cnt].region = cb_tbl[cnt].region;
cbs->context_bank_tbl[cnt].dma_mask = cb_tbl[cnt].dma_mask;
}
/* print context_bank fiels */
venus_hfi_for_each_context_bank(core, cbinfo) {
d_vpr_h("%s: name %s addr start %#x size %#x secure %d coherant %d region %d\n",
d_vpr_h("%s: name %s addr start %#x size %#x secure %d "
"coherant %d region %d dma_mask %llu\n",
__func__, cbinfo->name, cbinfo->addr_range.start,
cbinfo->addr_range.size, cbinfo->secure,
cbinfo->dma_coherant, cbinfo->region);
cbinfo->dma_coherant, cbinfo->region, cbinfo->dma_mask);
}
return rc;